$date
	Sun Nov 22 16:03:39 2020
$end
$version
	QuestaSim Version 2019.4
$end
$timescale
	1ps
$end

$scope module fpga_top $end
$var wire 1 ! io_in [37] $end
$var wire 1 " io_in [36] $end
$var wire 1 # io_in [0] $end

$scope module fpga_core_uut $end
$var wire 1 $ scff_Wires [317] $end
$var wire 1 % scff_Wires [316] $end
$var wire 1 & scff_Wires [315] $end
$var wire 1 ' scff_Wires [314] $end
$var wire 1 ( scff_Wires [313] $end
$var wire 1 ) scff_Wires [312] $end
$var wire 1 * scff_Wires [311] $end
$var wire 1 + scff_Wires [310] $end
$var wire 1 , scff_Wires [309] $end
$var wire 1 - scff_Wires [308] $end
$var wire 1 . scff_Wires [307] $end
$var wire 1 / scff_Wires [306] $end
$var wire 1 0 scff_Wires [305] $end
$var wire 1 1 scff_Wires [304] $end
$var wire 1 2 scff_Wires [303] $end
$var wire 1 3 scff_Wires [302] $end
$var wire 1 4 scff_Wires [301] $end
$var wire 1 5 scff_Wires [300] $end
$var wire 1 6 scff_Wires [299] $end
$var wire 1 7 scff_Wires [298] $end
$var wire 1 8 scff_Wires [297] $end
$var wire 1 9 scff_Wires [296] $end
$var wire 1 : scff_Wires [295] $end
$var wire 1 ; scff_Wires [294] $end
$var wire 1 < scff_Wires [293] $end
$var wire 1 = scff_Wires [292] $end
$var wire 1 > scff_Wires [291] $end
$var wire 1 ? scff_Wires [290] $end
$var wire 1 @ scff_Wires [289] $end
$var wire 1 A scff_Wires [288] $end
$var wire 1 B scff_Wires [287] $end
$var wire 1 C scff_Wires [286] $end
$var wire 1 D scff_Wires [285] $end
$var wire 1 E scff_Wires [284] $end
$var wire 1 F scff_Wires [283] $end
$var wire 1 G scff_Wires [282] $end
$var wire 1 H scff_Wires [281] $end
$var wire 1 I scff_Wires [280] $end
$var wire 1 J scff_Wires [279] $end
$var wire 1 K scff_Wires [278] $end
$var wire 1 L scff_Wires [277] $end
$var wire 1 M scff_Wires [276] $end
$var wire 1 N scff_Wires [275] $end
$var wire 1 O scff_Wires [274] $end
$var wire 1 P scff_Wires [273] $end
$var wire 1 Q scff_Wires [272] $end
$var wire 1 R scff_Wires [271] $end
$var wire 1 S scff_Wires [270] $end
$var wire 1 T scff_Wires [269] $end
$var wire 1 U scff_Wires [268] $end
$var wire 1 V scff_Wires [267] $end
$var wire 1 W scff_Wires [266] $end
$var wire 1 X scff_Wires [265] $end
$var wire 1 Y scff_Wires [264] $end
$var wire 1 Z scff_Wires [263] $end
$var wire 1 [ scff_Wires [262] $end
$var wire 1 \ scff_Wires [261] $end
$var wire 1 ] scff_Wires [260] $end
$var wire 1 ^ scff_Wires [259] $end
$var wire 1 _ scff_Wires [258] $end
$var wire 1 ` scff_Wires [257] $end
$var wire 1 a scff_Wires [256] $end
$var wire 1 b scff_Wires [255] $end
$var wire 1 c scff_Wires [254] $end
$var wire 1 d scff_Wires [253] $end
$var wire 1 e scff_Wires [252] $end
$var wire 1 f scff_Wires [251] $end
$var wire 1 g scff_Wires [250] $end
$var wire 1 h scff_Wires [249] $end
$var wire 1 i scff_Wires [248] $end
$var wire 1 j scff_Wires [247] $end
$var wire 1 k scff_Wires [246] $end
$var wire 1 l scff_Wires [245] $end
$var wire 1 m scff_Wires [244] $end
$var wire 1 n scff_Wires [243] $end
$var wire 1 o scff_Wires [242] $end
$var wire 1 p scff_Wires [241] $end
$var wire 1 q scff_Wires [240] $end
$var wire 1 r scff_Wires [239] $end
$var wire 1 s scff_Wires [238] $end
$var wire 1 t scff_Wires [237] $end
$var wire 1 u scff_Wires [236] $end
$var wire 1 v scff_Wires [235] $end
$var wire 1 w scff_Wires [234] $end
$var wire 1 x scff_Wires [233] $end
$var wire 1 y scff_Wires [232] $end
$var wire 1 z scff_Wires [231] $end
$var wire 1 { scff_Wires [230] $end
$var wire 1 | scff_Wires [229] $end
$var wire 1 } scff_Wires [228] $end
$var wire 1 ~ scff_Wires [227] $end
$var wire 1 !! scff_Wires [226] $end
$var wire 1 "! scff_Wires [225] $end
$var wire 1 #! scff_Wires [224] $end
$var wire 1 $! scff_Wires [223] $end
$var wire 1 %! scff_Wires [222] $end
$var wire 1 &! scff_Wires [221] $end
$var wire 1 '! scff_Wires [220] $end
$var wire 1 (! scff_Wires [219] $end
$var wire 1 )! scff_Wires [218] $end
$var wire 1 *! scff_Wires [217] $end
$var wire 1 +! scff_Wires [216] $end
$var wire 1 ,! scff_Wires [215] $end
$var wire 1 -! scff_Wires [214] $end
$var wire 1 .! scff_Wires [213] $end
$var wire 1 /! scff_Wires [212] $end
$var wire 1 0! scff_Wires [211] $end
$var wire 1 1! scff_Wires [210] $end
$var wire 1 2! scff_Wires [209] $end
$var wire 1 3! scff_Wires [208] $end
$var wire 1 4! scff_Wires [207] $end
$var wire 1 5! scff_Wires [206] $end
$var wire 1 6! scff_Wires [205] $end
$var wire 1 7! scff_Wires [204] $end
$var wire 1 8! scff_Wires [203] $end
$var wire 1 9! scff_Wires [202] $end
$var wire 1 :! scff_Wires [201] $end
$var wire 1 ;! scff_Wires [200] $end
$var wire 1 <! scff_Wires [199] $end
$var wire 1 =! scff_Wires [198] $end
$var wire 1 >! scff_Wires [197] $end
$var wire 1 ?! scff_Wires [196] $end
$var wire 1 @! scff_Wires [195] $end
$var wire 1 A! scff_Wires [194] $end
$var wire 1 B! scff_Wires [193] $end
$var wire 1 C! scff_Wires [192] $end
$var wire 1 D! scff_Wires [191] $end
$var wire 1 E! scff_Wires [190] $end
$var wire 1 F! scff_Wires [189] $end
$var wire 1 G! scff_Wires [188] $end
$var wire 1 H! scff_Wires [187] $end
$var wire 1 I! scff_Wires [186] $end
$var wire 1 J! scff_Wires [185] $end
$var wire 1 K! scff_Wires [184] $end
$var wire 1 L! scff_Wires [183] $end
$var wire 1 M! scff_Wires [182] $end
$var wire 1 N! scff_Wires [181] $end
$var wire 1 O! scff_Wires [180] $end
$var wire 1 P! scff_Wires [179] $end
$var wire 1 Q! scff_Wires [178] $end
$var wire 1 R! scff_Wires [177] $end
$var wire 1 S! scff_Wires [176] $end
$var wire 1 T! scff_Wires [175] $end
$var wire 1 U! scff_Wires [174] $end
$var wire 1 V! scff_Wires [173] $end
$var wire 1 W! scff_Wires [172] $end
$var wire 1 X! scff_Wires [171] $end
$var wire 1 Y! scff_Wires [170] $end
$var wire 1 Z! scff_Wires [169] $end
$var wire 1 [! scff_Wires [168] $end
$var wire 1 \! scff_Wires [167] $end
$var wire 1 ]! scff_Wires [166] $end
$var wire 1 ^! scff_Wires [165] $end
$var wire 1 _! scff_Wires [164] $end
$var wire 1 `! scff_Wires [163] $end
$var wire 1 a! scff_Wires [162] $end
$var wire 1 b! scff_Wires [161] $end
$var wire 1 c! scff_Wires [160] $end
$var wire 1 d! scff_Wires [159] $end
$var wire 1 e! scff_Wires [158] $end
$var wire 1 f! scff_Wires [157] $end
$var wire 1 g! scff_Wires [156] $end
$var wire 1 h! scff_Wires [155] $end
$var wire 1 i! scff_Wires [154] $end
$var wire 1 j! scff_Wires [153] $end
$var wire 1 k! scff_Wires [152] $end
$var wire 1 l! scff_Wires [151] $end
$var wire 1 m! scff_Wires [150] $end
$var wire 1 n! scff_Wires [149] $end
$var wire 1 o! scff_Wires [148] $end
$var wire 1 p! scff_Wires [147] $end
$var wire 1 q! scff_Wires [146] $end
$var wire 1 r! scff_Wires [145] $end
$var wire 1 s! scff_Wires [144] $end
$var wire 1 t! scff_Wires [143] $end
$var wire 1 u! scff_Wires [142] $end
$var wire 1 v! scff_Wires [141] $end
$var wire 1 w! scff_Wires [140] $end
$var wire 1 x! scff_Wires [139] $end
$var wire 1 y! scff_Wires [138] $end
$var wire 1 z! scff_Wires [137] $end
$var wire 1 {! scff_Wires [136] $end
$var wire 1 |! scff_Wires [135] $end
$var wire 1 }! scff_Wires [134] $end
$var wire 1 ~! scff_Wires [133] $end
$var wire 1 !" scff_Wires [132] $end
$var wire 1 "" scff_Wires [131] $end
$var wire 1 #" scff_Wires [130] $end
$var wire 1 $" scff_Wires [129] $end
$var wire 1 %" scff_Wires [128] $end
$var wire 1 &" scff_Wires [127] $end
$var wire 1 '" scff_Wires [126] $end
$var wire 1 (" scff_Wires [125] $end
$var wire 1 )" scff_Wires [124] $end
$var wire 1 *" scff_Wires [123] $end
$var wire 1 +" scff_Wires [122] $end
$var wire 1 ," scff_Wires [121] $end
$var wire 1 -" scff_Wires [120] $end
$var wire 1 ." scff_Wires [119] $end
$var wire 1 /" scff_Wires [118] $end
$var wire 1 0" scff_Wires [117] $end
$var wire 1 1" scff_Wires [116] $end
$var wire 1 2" scff_Wires [115] $end
$var wire 1 3" scff_Wires [114] $end
$var wire 1 4" scff_Wires [113] $end
$var wire 1 5" scff_Wires [112] $end
$var wire 1 6" scff_Wires [111] $end
$var wire 1 7" scff_Wires [110] $end
$var wire 1 8" scff_Wires [109] $end
$var wire 1 9" scff_Wires [108] $end
$var wire 1 :" scff_Wires [107] $end
$var wire 1 ;" scff_Wires [106] $end
$var wire 1 <" scff_Wires [105] $end
$var wire 1 =" scff_Wires [104] $end
$var wire 1 >" scff_Wires [103] $end
$var wire 1 ?" scff_Wires [102] $end
$var wire 1 @" scff_Wires [101] $end
$var wire 1 A" scff_Wires [100] $end
$var wire 1 B" scff_Wires [99] $end
$var wire 1 C" scff_Wires [98] $end
$var wire 1 D" scff_Wires [97] $end
$var wire 1 E" scff_Wires [96] $end
$var wire 1 F" scff_Wires [95] $end
$var wire 1 G" scff_Wires [94] $end
$var wire 1 H" scff_Wires [93] $end
$var wire 1 I" scff_Wires [92] $end
$var wire 1 J" scff_Wires [91] $end
$var wire 1 K" scff_Wires [90] $end
$var wire 1 L" scff_Wires [89] $end
$var wire 1 M" scff_Wires [88] $end
$var wire 1 N" scff_Wires [87] $end
$var wire 1 O" scff_Wires [86] $end
$var wire 1 P" scff_Wires [85] $end
$var wire 1 Q" scff_Wires [84] $end
$var wire 1 R" scff_Wires [83] $end
$var wire 1 S" scff_Wires [82] $end
$var wire 1 T" scff_Wires [81] $end
$var wire 1 U" scff_Wires [80] $end
$var wire 1 V" scff_Wires [79] $end
$var wire 1 W" scff_Wires [78] $end
$var wire 1 X" scff_Wires [77] $end
$var wire 1 Y" scff_Wires [76] $end
$var wire 1 Z" scff_Wires [75] $end
$var wire 1 [" scff_Wires [74] $end
$var wire 1 \" scff_Wires [73] $end
$var wire 1 ]" scff_Wires [72] $end
$var wire 1 ^" scff_Wires [71] $end
$var wire 1 _" scff_Wires [70] $end
$var wire 1 `" scff_Wires [69] $end
$var wire 1 a" scff_Wires [68] $end
$var wire 1 b" scff_Wires [67] $end
$var wire 1 c" scff_Wires [66] $end
$var wire 1 d" scff_Wires [65] $end
$var wire 1 e" scff_Wires [64] $end
$var wire 1 f" scff_Wires [63] $end
$var wire 1 g" scff_Wires [62] $end
$var wire 1 h" scff_Wires [61] $end
$var wire 1 i" scff_Wires [60] $end
$var wire 1 j" scff_Wires [59] $end
$var wire 1 k" scff_Wires [58] $end
$var wire 1 l" scff_Wires [57] $end
$var wire 1 m" scff_Wires [56] $end
$var wire 1 n" scff_Wires [55] $end
$var wire 1 o" scff_Wires [54] $end
$var wire 1 p" scff_Wires [53] $end
$var wire 1 q" scff_Wires [52] $end
$var wire 1 r" scff_Wires [51] $end
$var wire 1 s" scff_Wires [50] $end
$var wire 1 t" scff_Wires [49] $end
$var wire 1 u" scff_Wires [48] $end
$var wire 1 v" scff_Wires [47] $end
$var wire 1 w" scff_Wires [46] $end
$var wire 1 x" scff_Wires [45] $end
$var wire 1 y" scff_Wires [44] $end
$var wire 1 z" scff_Wires [43] $end
$var wire 1 {" scff_Wires [42] $end
$var wire 1 |" scff_Wires [41] $end
$var wire 1 }" scff_Wires [40] $end
$var wire 1 ~" scff_Wires [39] $end
$var wire 1 !# scff_Wires [38] $end
$var wire 1 "# scff_Wires [37] $end
$var wire 1 ## scff_Wires [36] $end
$var wire 1 $# scff_Wires [35] $end
$var wire 1 %# scff_Wires [34] $end
$var wire 1 &# scff_Wires [33] $end
$var wire 1 '# scff_Wires [32] $end
$var wire 1 (# scff_Wires [31] $end
$var wire 1 )# scff_Wires [30] $end
$var wire 1 *# scff_Wires [29] $end
$var wire 1 +# scff_Wires [28] $end
$var wire 1 ,# scff_Wires [27] $end
$var wire 1 -# scff_Wires [26] $end
$var wire 1 .# scff_Wires [25] $end
$var wire 1 /# scff_Wires [24] $end
$var wire 1 0# scff_Wires [23] $end
$var wire 1 1# scff_Wires [22] $end
$var wire 1 2# scff_Wires [21] $end
$var wire 1 3# scff_Wires [20] $end
$var wire 1 4# scff_Wires [19] $end
$var wire 1 5# scff_Wires [18] $end
$var wire 1 6# scff_Wires [17] $end
$var wire 1 7# scff_Wires [16] $end
$var wire 1 8# scff_Wires [15] $end
$var wire 1 9# scff_Wires [14] $end
$var wire 1 :# scff_Wires [13] $end
$var wire 1 ;# scff_Wires [12] $end
$var wire 1 <# scff_Wires [11] $end
$var wire 1 =# scff_Wires [10] $end
$var wire 1 ># scff_Wires [9] $end
$var wire 1 ?# scff_Wires [8] $end
$var wire 1 @# scff_Wires [7] $end
$var wire 1 A# scff_Wires [6] $end
$var wire 1 B# scff_Wires [5] $end
$var wire 1 C# scff_Wires [4] $end
$var wire 1 D# scff_Wires [3] $end
$var wire 1 E# scff_Wires [2] $end
$var wire 1 F# scff_Wires [1] $end
$var wire 1 G# scff_Wires [0] $end
$var wire 1 # Test_en [0] $end

$scope module sb_0__12_ $end
$var wire 1 H# SC_IN_TOP $end
$var wire 1 G# SC_OUT_BOT $end
$upscope $end

$scope module grid_clb_1__12_ $end
$var wire 1 F# SC_IN_TOP $end
$var wire 1 E# SC_OUT_BOT $end
$upscope $end
$upscope $end
$var wire 1 I# sc_head $end
$var wire 1 J# sc_tail $end

$scope module fpga_core_uut $end

$scope module sb_12__12_ $end
$var wire 1 K# chany_bottom_in [0] $end
$var wire 1 L# chany_bottom_in [1] $end
$var wire 1 M# chany_bottom_in [2] $end
$var wire 1 N# chany_bottom_in [3] $end
$var wire 1 O# chany_bottom_in [4] $end
$var wire 1 P# chany_bottom_in [5] $end
$var wire 1 Q# chany_bottom_in [6] $end
$var wire 1 R# chany_bottom_in [7] $end
$var wire 1 S# chany_bottom_in [8] $end
$var wire 1 T# chany_bottom_in [9] $end
$var wire 1 U# chany_bottom_in [10] $end
$var wire 1 V# chany_bottom_in [11] $end
$var wire 1 W# chany_bottom_in [12] $end
$var wire 1 X# chany_bottom_in [13] $end
$var wire 1 Y# chany_bottom_in [14] $end
$var wire 1 Z# chany_bottom_in [15] $end
$var wire 1 [# chany_bottom_in [16] $end
$var wire 1 \# chany_bottom_in [17] $end
$var wire 1 ]# chany_bottom_in [18] $end
$var wire 1 ^# chany_bottom_in [19] $end
$var wire 1 _# bottom_right_grid_pin_1_ [0] $end
$var wire 1 `# bottom_left_grid_pin_42_ [0] $end
$var wire 1 a# bottom_left_grid_pin_43_ [0] $end
$var wire 1 b# bottom_left_grid_pin_44_ [0] $end
$var wire 1 c# bottom_left_grid_pin_45_ [0] $end
$var wire 1 d# bottom_left_grid_pin_46_ [0] $end
$var wire 1 e# bottom_left_grid_pin_47_ [0] $end
$var wire 1 f# bottom_left_grid_pin_48_ [0] $end
$var wire 1 g# bottom_left_grid_pin_49_ [0] $end
$var wire 1 h# chanx_left_in [0] $end
$var wire 1 i# chanx_left_in [1] $end
$var wire 1 j# chanx_left_in [2] $end
$var wire 1 k# chanx_left_in [3] $end
$var wire 1 l# chanx_left_in [4] $end
$var wire 1 m# chanx_left_in [5] $end
$var wire 1 n# chanx_left_in [6] $end
$var wire 1 o# chanx_left_in [7] $end
$var wire 1 p# chanx_left_in [8] $end
$var wire 1 q# chanx_left_in [9] $end
$var wire 1 r# chanx_left_in [10] $end
$var wire 1 s# chanx_left_in [11] $end
$var wire 1 t# chanx_left_in [12] $end
$var wire 1 u# chanx_left_in [13] $end
$var wire 1 v# chanx_left_in [14] $end
$var wire 1 w# chanx_left_in [15] $end
$var wire 1 x# chanx_left_in [16] $end
$var wire 1 y# chanx_left_in [17] $end
$var wire 1 z# chanx_left_in [18] $end
$var wire 1 {# chanx_left_in [19] $end
$var wire 1 |# left_top_grid_pin_1_ [0] $end
$var wire 1 }# left_bottom_grid_pin_34_ [0] $end
$var wire 1 ~# left_bottom_grid_pin_35_ [0] $end
$var wire 1 !$ left_bottom_grid_pin_36_ [0] $end
$var wire 1 "$ left_bottom_grid_pin_37_ [0] $end
$var wire 1 #$ left_bottom_grid_pin_38_ [0] $end
$var wire 1 $$ left_bottom_grid_pin_39_ [0] $end
$var wire 1 %$ left_bottom_grid_pin_40_ [0] $end
$var wire 1 &$ left_bottom_grid_pin_41_ [0] $end
$var wire 1 '$ ccff_head [0] $end
$var wire 1 ($ chany_bottom_out [0] $end
$var wire 1 )$ chany_bottom_out [1] $end
$var wire 1 *$ chany_bottom_out [2] $end
$var wire 1 +$ chany_bottom_out [3] $end
$var wire 1 ,$ chany_bottom_out [4] $end
$var wire 1 -$ chany_bottom_out [5] $end
$var wire 1 .$ chany_bottom_out [6] $end
$var wire 1 /$ chany_bottom_out [7] $end
$var wire 1 0$ chany_bottom_out [8] $end
$var wire 1 1$ chany_bottom_out [9] $end
$var wire 1 2$ chany_bottom_out [10] $end
$var wire 1 3$ chany_bottom_out [11] $end
$var wire 1 4$ chany_bottom_out [12] $end
$var wire 1 5$ chany_bottom_out [13] $end
$var wire 1 6$ chany_bottom_out [14] $end
$var wire 1 7$ chany_bottom_out [15] $end
$var wire 1 8$ chany_bottom_out [16] $end
$var wire 1 9$ chany_bottom_out [17] $end
$var wire 1 :$ chany_bottom_out [18] $end
$var wire 1 ;$ chany_bottom_out [19] $end
$var wire 1 <$ chanx_left_out [0] $end
$var wire 1 =$ chanx_left_out [1] $end
$var wire 1 >$ chanx_left_out [2] $end
$var wire 1 ?$ chanx_left_out [3] $end
$var wire 1 @$ chanx_left_out [4] $end
$var wire 1 A$ chanx_left_out [5] $end
$var wire 1 B$ chanx_left_out [6] $end
$var wire 1 C$ chanx_left_out [7] $end
$var wire 1 D$ chanx_left_out [8] $end
$var wire 1 E$ chanx_left_out [9] $end
$var wire 1 F$ chanx_left_out [10] $end
$var wire 1 G$ chanx_left_out [11] $end
$var wire 1 H$ chanx_left_out [12] $end
$var wire 1 I$ chanx_left_out [13] $end
$var wire 1 J$ chanx_left_out [14] $end
$var wire 1 K$ chanx_left_out [15] $end
$var wire 1 L$ chanx_left_out [16] $end
$var wire 1 M$ chanx_left_out [17] $end
$var wire 1 N$ chanx_left_out [18] $end
$var wire 1 O$ chanx_left_out [19] $end
$var wire 1 P$ ccff_tail [0] $end
$var wire 1 $ SC_IN_BOT $end
$var wire 1 Q$ SC_OUT_BOT $end
$var wire 1 R$ prog_clk_0_S_in $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 T$ prog_clk_0 $end
$var wire 1 U$ mux_tree_tapbuf_size2_0_sram [0] $end
$var wire 1 V$ mux_tree_tapbuf_size2_0_sram [1] $end
$var wire 1 W$ mux_tree_tapbuf_size2_10_sram [0] $end
$var wire 1 X$ mux_tree_tapbuf_size2_10_sram [1] $end
$var wire 1 Y$ mux_tree_tapbuf_size2_11_sram [0] $end
$var wire 1 Z$ mux_tree_tapbuf_size2_11_sram [1] $end
$var wire 1 [$ mux_tree_tapbuf_size2_12_sram [0] $end
$var wire 1 \$ mux_tree_tapbuf_size2_12_sram [1] $end
$var wire 1 ]$ mux_tree_tapbuf_size2_13_sram [0] $end
$var wire 1 ^$ mux_tree_tapbuf_size2_13_sram [1] $end
$var wire 1 _$ mux_tree_tapbuf_size2_14_sram [0] $end
$var wire 1 `$ mux_tree_tapbuf_size2_14_sram [1] $end
$var wire 1 a$ mux_tree_tapbuf_size2_15_sram [0] $end
$var wire 1 b$ mux_tree_tapbuf_size2_15_sram [1] $end
$var wire 1 c$ mux_tree_tapbuf_size2_16_sram [0] $end
$var wire 1 d$ mux_tree_tapbuf_size2_16_sram [1] $end
$var wire 1 e$ mux_tree_tapbuf_size2_17_sram [0] $end
$var wire 1 f$ mux_tree_tapbuf_size2_17_sram [1] $end
$var wire 1 g$ mux_tree_tapbuf_size2_18_sram [0] $end
$var wire 1 h$ mux_tree_tapbuf_size2_18_sram [1] $end
$var wire 1 i$ mux_tree_tapbuf_size2_19_sram [0] $end
$var wire 1 j$ mux_tree_tapbuf_size2_19_sram [1] $end
$var wire 1 k$ mux_tree_tapbuf_size2_1_sram [0] $end
$var wire 1 l$ mux_tree_tapbuf_size2_1_sram [1] $end
$var wire 1 m$ mux_tree_tapbuf_size2_20_sram [0] $end
$var wire 1 n$ mux_tree_tapbuf_size2_20_sram [1] $end
$var wire 1 o$ mux_tree_tapbuf_size2_21_sram [0] $end
$var wire 1 p$ mux_tree_tapbuf_size2_21_sram [1] $end
$var wire 1 q$ mux_tree_tapbuf_size2_22_sram [0] $end
$var wire 1 r$ mux_tree_tapbuf_size2_22_sram [1] $end
$var wire 1 s$ mux_tree_tapbuf_size2_23_sram [0] $end
$var wire 1 t$ mux_tree_tapbuf_size2_23_sram [1] $end
$var wire 1 u$ mux_tree_tapbuf_size2_2_sram [0] $end
$var wire 1 v$ mux_tree_tapbuf_size2_2_sram [1] $end
$var wire 1 w$ mux_tree_tapbuf_size2_3_sram [0] $end
$var wire 1 x$ mux_tree_tapbuf_size2_3_sram [1] $end
$var wire 1 y$ mux_tree_tapbuf_size2_4_sram [0] $end
$var wire 1 z$ mux_tree_tapbuf_size2_4_sram [1] $end
$var wire 1 {$ mux_tree_tapbuf_size2_5_sram [0] $end
$var wire 1 |$ mux_tree_tapbuf_size2_5_sram [1] $end
$var wire 1 }$ mux_tree_tapbuf_size2_6_sram [0] $end
$var wire 1 ~$ mux_tree_tapbuf_size2_6_sram [1] $end
$var wire 1 !% mux_tree_tapbuf_size2_7_sram [0] $end
$var wire 1 "% mux_tree_tapbuf_size2_7_sram [1] $end
$var wire 1 #% mux_tree_tapbuf_size2_8_sram [0] $end
$var wire 1 $% mux_tree_tapbuf_size2_8_sram [1] $end
$var wire 1 %% mux_tree_tapbuf_size2_9_sram [0] $end
$var wire 1 &% mux_tree_tapbuf_size2_9_sram [1] $end
$var wire 1 '% mux_tree_tapbuf_size2_mem_0_ccff_tail [0] $end
$var wire 1 (% mux_tree_tapbuf_size2_mem_10_ccff_tail [0] $end
$var wire 1 )% mux_tree_tapbuf_size2_mem_11_ccff_tail [0] $end
$var wire 1 *% mux_tree_tapbuf_size2_mem_12_ccff_tail [0] $end
$var wire 1 +% mux_tree_tapbuf_size2_mem_13_ccff_tail [0] $end
$var wire 1 ,% mux_tree_tapbuf_size2_mem_14_ccff_tail [0] $end
$var wire 1 -% mux_tree_tapbuf_size2_mem_15_ccff_tail [0] $end
$var wire 1 .% mux_tree_tapbuf_size2_mem_16_ccff_tail [0] $end
$var wire 1 /% mux_tree_tapbuf_size2_mem_17_ccff_tail [0] $end
$var wire 1 0% mux_tree_tapbuf_size2_mem_18_ccff_tail [0] $end
$var wire 1 1% mux_tree_tapbuf_size2_mem_19_ccff_tail [0] $end
$var wire 1 2% mux_tree_tapbuf_size2_mem_1_ccff_tail [0] $end
$var wire 1 3% mux_tree_tapbuf_size2_mem_20_ccff_tail [0] $end
$var wire 1 4% mux_tree_tapbuf_size2_mem_21_ccff_tail [0] $end
$var wire 1 5% mux_tree_tapbuf_size2_mem_22_ccff_tail [0] $end
$var wire 1 6% mux_tree_tapbuf_size2_mem_2_ccff_tail [0] $end
$var wire 1 7% mux_tree_tapbuf_size2_mem_3_ccff_tail [0] $end
$var wire 1 8% mux_tree_tapbuf_size2_mem_4_ccff_tail [0] $end
$var wire 1 9% mux_tree_tapbuf_size2_mem_5_ccff_tail [0] $end
$var wire 1 :% mux_tree_tapbuf_size2_mem_6_ccff_tail [0] $end
$var wire 1 ;% mux_tree_tapbuf_size2_mem_7_ccff_tail [0] $end
$var wire 1 <% mux_tree_tapbuf_size2_mem_8_ccff_tail [0] $end
$var wire 1 =% mux_tree_tapbuf_size2_mem_9_ccff_tail [0] $end
$var wire 1 >% mux_tree_tapbuf_size3_0_sram [0] $end
$var wire 1 ?% mux_tree_tapbuf_size3_0_sram [1] $end
$var wire 1 @% mux_tree_tapbuf_size3_1_sram [0] $end
$var wire 1 A% mux_tree_tapbuf_size3_1_sram [1] $end
$var wire 1 B% mux_tree_tapbuf_size3_2_sram [0] $end
$var wire 1 C% mux_tree_tapbuf_size3_2_sram [1] $end
$var wire 1 D% mux_tree_tapbuf_size3_mem_0_ccff_tail [0] $end
$var wire 1 E% mux_tree_tapbuf_size3_mem_1_ccff_tail [0] $end
$var wire 1 F% mux_tree_tapbuf_size3_mem_2_ccff_tail [0] $end
$var wire 1 G% mux_tree_tapbuf_size5_0_sram [0] $end
$var wire 1 H% mux_tree_tapbuf_size5_0_sram [1] $end
$var wire 1 I% mux_tree_tapbuf_size5_0_sram [2] $end
$var wire 1 J% mux_tree_tapbuf_size5_1_sram [0] $end
$var wire 1 K% mux_tree_tapbuf_size5_1_sram [1] $end
$var wire 1 L% mux_tree_tapbuf_size5_1_sram [2] $end
$var wire 1 M% mux_tree_tapbuf_size5_2_sram [0] $end
$var wire 1 N% mux_tree_tapbuf_size5_2_sram [1] $end
$var wire 1 O% mux_tree_tapbuf_size5_2_sram [2] $end
$var wire 1 P% mux_tree_tapbuf_size5_3_sram [0] $end
$var wire 1 Q% mux_tree_tapbuf_size5_3_sram [1] $end
$var wire 1 R% mux_tree_tapbuf_size5_3_sram [2] $end
$var wire 1 S% mux_tree_tapbuf_size5_mem_0_ccff_tail [0] $end
$var wire 1 T% mux_tree_tapbuf_size5_mem_1_ccff_tail [0] $end
$var wire 1 U% mux_tree_tapbuf_size5_mem_2_ccff_tail [0] $end
$var wire 1 V% mux_tree_tapbuf_size5_mem_3_ccff_tail [0] $end
$var wire 1 W% mux_tree_tapbuf_size6_0_sram [0] $end
$var wire 1 X% mux_tree_tapbuf_size6_0_sram [1] $end
$var wire 1 Y% mux_tree_tapbuf_size6_0_sram [2] $end
$var wire 1 Z% mux_tree_tapbuf_size6_1_sram [0] $end
$var wire 1 [% mux_tree_tapbuf_size6_1_sram [1] $end
$var wire 1 \% mux_tree_tapbuf_size6_1_sram [2] $end
$var wire 1 ]% mux_tree_tapbuf_size6_2_sram [0] $end
$var wire 1 ^% mux_tree_tapbuf_size6_2_sram [1] $end
$var wire 1 _% mux_tree_tapbuf_size6_2_sram [2] $end
$var wire 1 `% mux_tree_tapbuf_size6_3_sram [0] $end
$var wire 1 a% mux_tree_tapbuf_size6_3_sram [1] $end
$var wire 1 b% mux_tree_tapbuf_size6_3_sram [2] $end
$var wire 1 c% mux_tree_tapbuf_size6_mem_0_ccff_tail [0] $end
$var wire 1 d% mux_tree_tapbuf_size6_mem_1_ccff_tail [0] $end
$var wire 1 e% mux_tree_tapbuf_size6_mem_2_ccff_tail [0] $end
$var wire 1 f% mux_tree_tapbuf_size6_mem_3_ccff_tail [0] $end
$var wire 1 g% SYNOPSYS_UNCONNECTED_1 $end
$var wire 1 h% SYNOPSYS_UNCONNECTED_2 $end
$var wire 1 i% SYNOPSYS_UNCONNECTED_3 $end
$var wire 1 j% optlc_net_92 $end
$var wire 1 k% SYNOPSYS_UNCONNECTED_4 $end
$var wire 1 l% SYNOPSYS_UNCONNECTED_5 $end
$var wire 1 m% SYNOPSYS_UNCONNECTED_6 $end
$var wire 1 n% optlc_net_95 $end
$var wire 1 o% SYNOPSYS_UNCONNECTED_7 $end
$var wire 1 p% SYNOPSYS_UNCONNECTED_8 $end
$var wire 1 q% SYNOPSYS_UNCONNECTED_9 $end
$var wire 1 r% optlc_net_93 $end
$var wire 1 s% SYNOPSYS_UNCONNECTED_10 $end
$var wire 1 t% SYNOPSYS_UNCONNECTED_11 $end
$var wire 1 u% SYNOPSYS_UNCONNECTED_12 $end
$var wire 1 v% SYNOPSYS_UNCONNECTED_13 $end
$var wire 1 w% SYNOPSYS_UNCONNECTED_14 $end
$var wire 1 x% SYNOPSYS_UNCONNECTED_15 $end
$var wire 1 y% SYNOPSYS_UNCONNECTED_16 $end
$var wire 1 z% SYNOPSYS_UNCONNECTED_17 $end
$var wire 1 {% SYNOPSYS_UNCONNECTED_18 $end
$var wire 1 |% SYNOPSYS_UNCONNECTED_19 $end
$var wire 1 }% SYNOPSYS_UNCONNECTED_20 $end
$var wire 1 ~% SYNOPSYS_UNCONNECTED_21 $end
$var wire 1 !& SYNOPSYS_UNCONNECTED_22 $end
$var wire 1 "& SYNOPSYS_UNCONNECTED_23 $end
$var wire 1 #& SYNOPSYS_UNCONNECTED_24 $end
$var wire 1 $& SYNOPSYS_UNCONNECTED_25 $end
$var wire 1 %& SYNOPSYS_UNCONNECTED_26 $end
$var wire 1 && SYNOPSYS_UNCONNECTED_27 $end
$var wire 1 '& SYNOPSYS_UNCONNECTED_28 $end
$var wire 1 (& SYNOPSYS_UNCONNECTED_29 $end
$var wire 1 )& SYNOPSYS_UNCONNECTED_30 $end
$var wire 1 *& SYNOPSYS_UNCONNECTED_31 $end
$var wire 1 +& SYNOPSYS_UNCONNECTED_32 $end
$var wire 1 ,& optlc_net_94 $end
$var wire 1 -& SYNOPSYS_UNCONNECTED_33 $end
$var wire 1 .& SYNOPSYS_UNCONNECTED_34 $end
$var wire 1 /& SYNOPSYS_UNCONNECTED_35 $end
$var wire 1 0& SYNOPSYS_UNCONNECTED_36 $end
$var wire 1 1& SYNOPSYS_UNCONNECTED_37 $end
$var wire 1 2& SYNOPSYS_UNCONNECTED_38 $end
$var wire 1 3& SYNOPSYS_UNCONNECTED_39 $end
$var wire 1 4& SYNOPSYS_UNCONNECTED_40 $end
$var wire 1 5& SYNOPSYS_UNCONNECTED_41 $end
$var wire 1 6& SYNOPSYS_UNCONNECTED_42 $end
$var wire 1 7& SYNOPSYS_UNCONNECTED_43 $end
$var wire 1 8& SYNOPSYS_UNCONNECTED_44 $end
$var wire 1 9& SYNOPSYS_UNCONNECTED_45 $end
$var wire 1 :& SYNOPSYS_UNCONNECTED_46 $end
$var wire 1 ;& optlc_net_91 $end
$var wire 1 <& SYNOPSYS_UNCONNECTED_47 $end
$var wire 1 =& SYNOPSYS_UNCONNECTED_48 $end
$var wire 1 >& SYNOPSYS_UNCONNECTED_49 $end
$var wire 1 ?& SYNOPSYS_UNCONNECTED_50 $end
$var wire 1 @& SYNOPSYS_UNCONNECTED_51 $end
$var wire 1 A& SYNOPSYS_UNCONNECTED_52 $end
$var wire 1 B& SYNOPSYS_UNCONNECTED_53 $end
$var wire 1 C& SYNOPSYS_UNCONNECTED_54 $end
$var wire 1 D& SYNOPSYS_UNCONNECTED_55 $end
$var wire 1 E& SYNOPSYS_UNCONNECTED_56 $end
$var wire 1 F& SYNOPSYS_UNCONNECTED_57 $end
$var wire 1 G& SYNOPSYS_UNCONNECTED_58 $end
$var wire 1 H& SYNOPSYS_UNCONNECTED_59 $end
$var wire 1 I& SYNOPSYS_UNCONNECTED_60 $end
$var wire 1 J& SYNOPSYS_UNCONNECTED_61 $end
$var wire 1 K& SYNOPSYS_UNCONNECTED_62 $end
$var wire 1 L& SYNOPSYS_UNCONNECTED_63 $end
$var wire 1 M& SYNOPSYS_UNCONNECTED_64 $end
$var wire 1 N& SYNOPSYS_UNCONNECTED_65 $end
$var wire 1 O& SYNOPSYS_UNCONNECTED_66 $end
$var wire 1 P& SYNOPSYS_UNCONNECTED_67 $end
$var wire 1 Q& SYNOPSYS_UNCONNECTED_68 $end
$var wire 1 R& SYNOPSYS_UNCONNECTED_69 $end
$var wire 1 S& SYNOPSYS_UNCONNECTED_70 $end
$var wire 1 T& SYNOPSYS_UNCONNECTED_71 $end
$var wire 1 U& SYNOPSYS_UNCONNECTED_72 $end
$var wire 1 V& ropt_net_111 $end
$var wire 1 W& SYNOPSYS_UNCONNECTED_73 $end
$var wire 1 X& SYNOPSYS_UNCONNECTED_74 $end
$var wire 1 Y& SYNOPSYS_UNCONNECTED_75 $end
$var wire 1 Z& SYNOPSYS_UNCONNECTED_76 $end
$var wire 1 [& SYNOPSYS_UNCONNECTED_77 $end
$var wire 1 \& SYNOPSYS_UNCONNECTED_78 $end
$var wire 1 ]& SYNOPSYS_UNCONNECTED_79 $end
$var wire 1 ^& SYNOPSYS_UNCONNECTED_80 $end
$var wire 1 _& SYNOPSYS_UNCONNECTED_81 $end
$var wire 1 `& SYNOPSYS_UNCONNECTED_82 $end
$var wire 1 a& SYNOPSYS_UNCONNECTED_83 $end
$var wire 1 b& ropt_net_112 $end
$var wire 1 c& ropt_net_113 $end

$scope module mux_bottom_track_1 $end
$var wire 1 _# in [0] $end
$var wire 1 a# in [1] $end
$var wire 1 c# in [2] $end
$var wire 1 e# in [3] $end
$var wire 1 g# in [4] $end
$var wire 1 i# in [5] $end
$var wire 1 W% sram [0] $end
$var wire 1 X% sram [1] $end
$var wire 1 Y% sram [2] $end
$var wire 1 g% sram_inv [0] $end
$var wire 1 h% sram_inv [1] $end
$var wire 1 i% sram_inv [2] $end
$var wire 1 ($ out [0] $end
$var wire 1 j% p0 $end
$var wire 1 d& sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 e& sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 f& sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 g& sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 h& sky130_fd_sc_hd__mux2_1_4_X [0] $end
$var wire 1 i& sky130_fd_sc_hd__mux2_1_5_X [0] $end

$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 ($ X $end
$var wire 1 i& A $end
$var supply1 1 j& VPWR $end
$var supply0 1 k& VGND $end
$var supply1 1 l& VPB $end
$var supply0 1 m& VNB $end

$scope module base $end
$var wire 1 ($ X $end
$var wire 1 i& A $end
$var wire 1 n& buf0_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_0_ $end
$var wire 1 d& X $end
$var wire 1 a# A0 $end
$var wire 1 _# A1 $end
$var wire 1 W% S $end
$var supply1 1 o& VPWR $end
$var supply0 1 p& VGND $end
$var supply1 1 q& VPB $end
$var supply0 1 r& VNB $end

$scope module base $end
$var wire 1 d& X $end
$var wire 1 a# A0 $end
$var wire 1 _# A1 $end
$var wire 1 W% S $end
$var wire 1 s& mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 e& X $end
$var wire 1 e# A0 $end
$var wire 1 c# A1 $end
$var wire 1 W% S $end
$var supply1 1 t& VPWR $end
$var supply0 1 u& VGND $end
$var supply1 1 v& VPB $end
$var supply0 1 w& VNB $end

$scope module base $end
$var wire 1 e& X $end
$var wire 1 e# A0 $end
$var wire 1 c# A1 $end
$var wire 1 W% S $end
$var wire 1 x& mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_2_ $end
$var wire 1 f& X $end
$var wire 1 i# A0 $end
$var wire 1 g# A1 $end
$var wire 1 W% S $end
$var supply1 1 y& VPWR $end
$var supply0 1 z& VGND $end
$var supply1 1 {& VPB $end
$var supply0 1 |& VNB $end

$scope module base $end
$var wire 1 f& X $end
$var wire 1 i# A0 $end
$var wire 1 g# A1 $end
$var wire 1 W% S $end
$var wire 1 }& mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 g& X $end
$var wire 1 e& A0 $end
$var wire 1 d& A1 $end
$var wire 1 X% S $end
$var supply1 1 ~& VPWR $end
$var supply0 1 !' VGND $end
$var supply1 1 "' VPB $end
$var supply0 1 #' VNB $end

$scope module base $end
$var wire 1 g& X $end
$var wire 1 e& A0 $end
$var wire 1 d& A1 $end
$var wire 1 X% S $end
$var wire 1 $' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_1_ $end
$var wire 1 h& X $end
$var wire 1 j% A0 $end
$var wire 1 f& A1 $end
$var wire 1 X% S $end
$var supply1 1 %' VPWR $end
$var supply0 1 &' VGND $end
$var supply1 1 '' VPB $end
$var supply0 1 (' VNB $end

$scope module base $end
$var wire 1 h& X $end
$var wire 1 j% A0 $end
$var wire 1 f& A1 $end
$var wire 1 X% S $end
$var wire 1 )' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l3_in_0_ $end
$var wire 1 i& X $end
$var wire 1 h& A0 $end
$var wire 1 g& A1 $end
$var wire 1 Y% S $end
$var supply1 1 *' VPWR $end
$var supply0 1 +' VGND $end
$var supply1 1 ,' VPB $end
$var supply0 1 -' VNB $end

$scope module base $end
$var wire 1 i& X $end
$var wire 1 h& A0 $end
$var wire 1 g& A1 $end
$var wire 1 Y% S $end
$var wire 1 .' mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_5 $end
$var wire 1 _# in [0] $end
$var wire 1 a# in [1] $end
$var wire 1 c# in [2] $end
$var wire 1 e# in [3] $end
$var wire 1 g# in [4] $end
$var wire 1 k# in [5] $end
$var wire 1 Z% sram [0] $end
$var wire 1 [% sram [1] $end
$var wire 1 \% sram [2] $end
$var wire 1 k% sram_inv [0] $end
$var wire 1 l% sram_inv [1] $end
$var wire 1 m% sram_inv [2] $end
$var wire 1 *$ out [0] $end
$var wire 1 n% p0 $end
$var wire 1 /' sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 0' sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 1' sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 2' sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 3' sky130_fd_sc_hd__mux2_1_4_X [0] $end
$var wire 1 4' sky130_fd_sc_hd__mux2_1_5_X [0] $end
$var wire 1 5' BUF_net_42 $end

$scope module mux_l1_in_0_ $end
$var wire 1 /' X $end
$var wire 1 a# A0 $end
$var wire 1 _# A1 $end
$var wire 1 Z% S $end
$var supply1 1 6' VPWR $end
$var supply0 1 7' VGND $end
$var supply1 1 8' VPB $end
$var supply0 1 9' VNB $end

$scope module base $end
$var wire 1 /' X $end
$var wire 1 a# A0 $end
$var wire 1 _# A1 $end
$var wire 1 Z% S $end
$var wire 1 :' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 0' X $end
$var wire 1 e# A0 $end
$var wire 1 c# A1 $end
$var wire 1 Z% S $end
$var supply1 1 ;' VPWR $end
$var supply0 1 <' VGND $end
$var supply1 1 =' VPB $end
$var supply0 1 >' VNB $end

$scope module base $end
$var wire 1 0' X $end
$var wire 1 e# A0 $end
$var wire 1 c# A1 $end
$var wire 1 Z% S $end
$var wire 1 ?' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_2_ $end
$var wire 1 1' X $end
$var wire 1 k# A0 $end
$var wire 1 g# A1 $end
$var wire 1 Z% S $end
$var supply1 1 @' VPWR $end
$var supply0 1 A' VGND $end
$var supply1 1 B' VPB $end
$var supply0 1 C' VNB $end

$scope module base $end
$var wire 1 1' X $end
$var wire 1 k# A0 $end
$var wire 1 g# A1 $end
$var wire 1 Z% S $end
$var wire 1 D' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 2' X $end
$var wire 1 0' A0 $end
$var wire 1 /' A1 $end
$var wire 1 [% S $end
$var supply1 1 E' VPWR $end
$var supply0 1 F' VGND $end
$var supply1 1 G' VPB $end
$var supply0 1 H' VNB $end

$scope module base $end
$var wire 1 2' X $end
$var wire 1 0' A0 $end
$var wire 1 /' A1 $end
$var wire 1 [% S $end
$var wire 1 I' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_1_ $end
$var wire 1 3' X $end
$var wire 1 n% A0 $end
$var wire 1 1' A1 $end
$var wire 1 [% S $end
$var supply1 1 J' VPWR $end
$var supply0 1 K' VGND $end
$var supply1 1 L' VPB $end
$var supply0 1 M' VNB $end

$scope module base $end
$var wire 1 3' X $end
$var wire 1 n% A0 $end
$var wire 1 1' A1 $end
$var wire 1 [% S $end
$var wire 1 N' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l3_in_0_ $end
$var wire 1 4' X $end
$var wire 1 3' A0 $end
$var wire 1 2' A1 $end
$var wire 1 \% S $end
$var supply1 1 O' VPWR $end
$var supply0 1 P' VGND $end
$var supply1 1 Q' VPB $end
$var supply0 1 R' VNB $end

$scope module base $end
$var wire 1 4' X $end
$var wire 1 3' A0 $end
$var wire 1 2' A1 $end
$var wire 1 \% S $end
$var wire 1 S' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_41 $end
$var wire 1 *$ Y $end
$var wire 1 5' A $end
$var supply1 1 T' VPWR $end
$var supply0 1 U' VGND $end
$var supply1 1 V' VPB $end
$var supply0 1 W' VNB $end

$scope module base $end
$var wire 1 *$ Y $end
$var wire 1 5' A $end
$var wire 1 X' not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_42 $end
$var wire 1 5' Y $end
$var wire 1 4' A $end
$var supply1 1 Y' VPWR $end
$var supply0 1 Z' VGND $end
$var supply1 1 [' VPB $end
$var supply0 1 \' VNB $end

$scope module base $end
$var wire 1 5' Y $end
$var wire 1 4' A $end
$var wire 1 ]' not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_1 $end
$var wire 1 ^# in [0] $end
$var wire 1 |# in [1] $end
$var wire 1 ~# in [2] $end
$var wire 1 "$ in [3] $end
$var wire 1 $$ in [4] $end
$var wire 1 &$ in [5] $end
$var wire 1 ]% sram [0] $end
$var wire 1 ^% sram [1] $end
$var wire 1 _% sram [2] $end
$var wire 1 o% sram_inv [0] $end
$var wire 1 p% sram_inv [1] $end
$var wire 1 q% sram_inv [2] $end
$var wire 1 <$ out [0] $end
$var wire 1 r% p0 $end
$var wire 1 ^' sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 _' sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 `' sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 a' sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 b' sky130_fd_sc_hd__mux2_1_4_X [0] $end
$var wire 1 c' sky130_fd_sc_hd__mux2_1_5_X [0] $end
$var wire 1 d' BUF_net_44 $end

$scope module mux_l1_in_0_ $end
$var wire 1 ^' X $end
$var wire 1 |# A0 $end
$var wire 1 ^# A1 $end
$var wire 1 ]% S $end
$var supply1 1 e' VPWR $end
$var supply0 1 f' VGND $end
$var supply1 1 g' VPB $end
$var supply0 1 h' VNB $end

$scope module base $end
$var wire 1 ^' X $end
$var wire 1 |# A0 $end
$var wire 1 ^# A1 $end
$var wire 1 ]% S $end
$var wire 1 i' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 _' X $end
$var wire 1 "$ A0 $end
$var wire 1 ~# A1 $end
$var wire 1 ]% S $end
$var supply1 1 j' VPWR $end
$var supply0 1 k' VGND $end
$var supply1 1 l' VPB $end
$var supply0 1 m' VNB $end

$scope module base $end
$var wire 1 _' X $end
$var wire 1 "$ A0 $end
$var wire 1 ~# A1 $end
$var wire 1 ]% S $end
$var wire 1 n' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_2_ $end
$var wire 1 `' X $end
$var wire 1 &$ A0 $end
$var wire 1 $$ A1 $end
$var wire 1 ]% S $end
$var supply1 1 o' VPWR $end
$var supply0 1 p' VGND $end
$var supply1 1 q' VPB $end
$var supply0 1 r' VNB $end

$scope module base $end
$var wire 1 `' X $end
$var wire 1 &$ A0 $end
$var wire 1 $$ A1 $end
$var wire 1 ]% S $end
$var wire 1 s' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 a' X $end
$var wire 1 _' A0 $end
$var wire 1 ^' A1 $end
$var wire 1 ^% S $end
$var supply1 1 t' VPWR $end
$var supply0 1 u' VGND $end
$var supply1 1 v' VPB $end
$var supply0 1 w' VNB $end

$scope module base $end
$var wire 1 a' X $end
$var wire 1 _' A0 $end
$var wire 1 ^' A1 $end
$var wire 1 ^% S $end
$var wire 1 x' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_1_ $end
$var wire 1 b' X $end
$var wire 1 r% A0 $end
$var wire 1 `' A1 $end
$var wire 1 ^% S $end
$var supply1 1 y' VPWR $end
$var supply0 1 z' VGND $end
$var supply1 1 {' VPB $end
$var supply0 1 |' VNB $end

$scope module base $end
$var wire 1 b' X $end
$var wire 1 r% A0 $end
$var wire 1 `' A1 $end
$var wire 1 ^% S $end
$var wire 1 }' mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l3_in_0_ $end
$var wire 1 c' X $end
$var wire 1 b' A0 $end
$var wire 1 a' A1 $end
$var wire 1 _% S $end
$var supply1 1 ~' VPWR $end
$var supply0 1 !( VGND $end
$var supply1 1 "( VPB $end
$var supply0 1 #( VNB $end

$scope module base $end
$var wire 1 c' X $end
$var wire 1 b' A0 $end
$var wire 1 a' A1 $end
$var wire 1 _% S $end
$var wire 1 $( mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_43 $end
$var wire 1 <$ Y $end
$var wire 1 d' A $end
$var supply1 1 %( VPWR $end
$var supply0 1 &( VGND $end
$var supply1 1 '( VPB $end
$var supply0 1 (( VNB $end

$scope module base $end
$var wire 1 <$ Y $end
$var wire 1 d' A $end
$var wire 1 )( not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_44 $end
$var wire 1 d' Y $end
$var wire 1 c' A $end
$var supply1 1 *( VPWR $end
$var supply0 1 +( VGND $end
$var supply1 1 ,( VPB $end
$var supply0 1 -( VNB $end

$scope module base $end
$var wire 1 d' Y $end
$var wire 1 c' A $end
$var wire 1 .( not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_5 $end
$var wire 1 L# in [0] $end
$var wire 1 |# in [1] $end
$var wire 1 ~# in [2] $end
$var wire 1 "$ in [3] $end
$var wire 1 $$ in [4] $end
$var wire 1 &$ in [5] $end
$var wire 1 `% sram [0] $end
$var wire 1 a% sram [1] $end
$var wire 1 b% sram [2] $end
$var wire 1 s% sram_inv [0] $end
$var wire 1 t% sram_inv [1] $end
$var wire 1 u% sram_inv [2] $end
$var wire 1 >$ out [0] $end
$var wire 1 r% p0 $end
$var wire 1 /( sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 0( sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 1( sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 2( sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 3( sky130_fd_sc_hd__mux2_1_4_X [0] $end
$var wire 1 4( sky130_fd_sc_hd__mux2_1_5_X [0] $end
$var wire 1 5( BUF_net_46 $end

$scope module mux_l1_in_0_ $end
$var wire 1 /( X $end
$var wire 1 |# A0 $end
$var wire 1 L# A1 $end
$var wire 1 `% S $end
$var supply1 1 6( VPWR $end
$var supply0 1 7( VGND $end
$var supply1 1 8( VPB $end
$var supply0 1 9( VNB $end

$scope module base $end
$var wire 1 /( X $end
$var wire 1 |# A0 $end
$var wire 1 L# A1 $end
$var wire 1 `% S $end
$var wire 1 :( mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 0( X $end
$var wire 1 "$ A0 $end
$var wire 1 ~# A1 $end
$var wire 1 `% S $end
$var supply1 1 ;( VPWR $end
$var supply0 1 <( VGND $end
$var supply1 1 =( VPB $end
$var supply0 1 >( VNB $end

$scope module base $end
$var wire 1 0( X $end
$var wire 1 "$ A0 $end
$var wire 1 ~# A1 $end
$var wire 1 `% S $end
$var wire 1 ?( mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_2_ $end
$var wire 1 1( X $end
$var wire 1 &$ A0 $end
$var wire 1 $$ A1 $end
$var wire 1 `% S $end
$var supply1 1 @( VPWR $end
$var supply0 1 A( VGND $end
$var supply1 1 B( VPB $end
$var supply0 1 C( VNB $end

$scope module base $end
$var wire 1 1( X $end
$var wire 1 &$ A0 $end
$var wire 1 $$ A1 $end
$var wire 1 `% S $end
$var wire 1 D( mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 2( X $end
$var wire 1 0( A0 $end
$var wire 1 /( A1 $end
$var wire 1 a% S $end
$var supply1 1 E( VPWR $end
$var supply0 1 F( VGND $end
$var supply1 1 G( VPB $end
$var supply0 1 H( VNB $end

$scope module base $end
$var wire 1 2( X $end
$var wire 1 0( A0 $end
$var wire 1 /( A1 $end
$var wire 1 a% S $end
$var wire 1 I( mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_1_ $end
$var wire 1 3( X $end
$var wire 1 r% A0 $end
$var wire 1 1( A1 $end
$var wire 1 a% S $end
$var supply1 1 J( VPWR $end
$var supply0 1 K( VGND $end
$var supply1 1 L( VPB $end
$var supply0 1 M( VNB $end

$scope module base $end
$var wire 1 3( X $end
$var wire 1 r% A0 $end
$var wire 1 1( A1 $end
$var wire 1 a% S $end
$var wire 1 N( mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l3_in_0_ $end
$var wire 1 4( X $end
$var wire 1 3( A0 $end
$var wire 1 2( A1 $end
$var wire 1 b% S $end
$var supply1 1 O( VPWR $end
$var supply0 1 P( VGND $end
$var supply1 1 Q( VPB $end
$var supply0 1 R( VNB $end

$scope module base $end
$var wire 1 4( X $end
$var wire 1 3( A0 $end
$var wire 1 2( A1 $end
$var wire 1 b% S $end
$var wire 1 S( mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_45 $end
$var wire 1 >$ Y $end
$var wire 1 5( A $end
$var supply1 1 T( VPWR $end
$var supply0 1 U( VGND $end
$var supply1 1 V( VPB $end
$var supply0 1 W( VNB $end

$scope module base $end
$var wire 1 >$ Y $end
$var wire 1 5( A $end
$var wire 1 X( not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_46 $end
$var wire 1 5( Y $end
$var wire 1 4( A $end
$var supply1 1 Y( VPWR $end
$var supply0 1 Z( VGND $end
$var supply1 1 [( VPB $end
$var supply0 1 \( VNB $end

$scope module base $end
$var wire 1 5( Y $end
$var wire 1 4( A $end
$var wire 1 ]( not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_1 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 '$ ccff_head [0] $end
$var wire 1 c% ccff_tail [0] $end
$var wire 1 W% mem_out [0] $end
$var wire 1 X% mem_out [1] $end
$var wire 1 Y% mem_out [2] $end
$var wire 1 ^( ropt_net_110 $end
$var wire 1 _( copt_net_96 $end
$var wire 1 `( copt_net_97 $end
$var wire 1 a( copt_net_98 $end
$var wire 1 b( copt_net_99 $end
$var wire 1 c( copt_net_100 $end
$var wire 1 d( copt_net_101 $end
$var wire 1 e( ropt_net_108 $end
$var wire 1 f( ropt_net_109 $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 W% Q $end
$var wire 1 S$ CLK $end
$var wire 1 ^( D $end
$var supply1 1 g( VPWR $end
$var supply0 1 h( VGND $end
$var supply1 1 i( VPB $end
$var supply0 1 j( VNB $end

$scope module base $end
$var wire 1 W% Q $end
$var wire 1 S$ CLK $end
$var wire 1 ^( D $end
$var wire 1 k( buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 X% Q $end
$var wire 1 S$ CLK $end
$var wire 1 W% D $end
$var supply1 1 l( VPWR $end
$var supply0 1 m( VGND $end
$var supply1 1 n( VPB $end
$var supply0 1 o( VNB $end

$scope module base $end
$var wire 1 X% Q $end
$var wire 1 S$ CLK $end
$var wire 1 W% D $end
$var wire 1 p( buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_2_ $end
$var wire 1 Y% Q $end
$var wire 1 S$ CLK $end
$var wire 1 X% D $end
$var supply1 1 q( VPWR $end
$var supply0 1 r( VGND $end
$var supply1 1 s( VPB $end
$var supply0 1 t( VNB $end

$scope module base $end
$var wire 1 Y% Q $end
$var wire 1 S$ CLK $end
$var wire 1 X% D $end
$var wire 1 u( buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_1__0 $end
$var wire 1 c% X $end
$var wire 1 Y% A $end
$var supply1 1 v( VPWR $end
$var supply0 1 w( VGND $end
$var supply1 1 x( VPB $end
$var supply0 1 y( VNB $end

$scope module base $end
$var wire 1 c% X $end
$var wire 1 Y% A $end
$var wire 1 z( buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1262 $end
$var wire 1 _( X $end
$var wire 1 '$ A $end
$var supply1 1 {( VPWR $end
$var supply0 1 |( VGND $end
$var supply1 1 }( VPB $end
$var supply0 1 ~( VNB $end

$scope module base $end
$var wire 1 _( X $end
$var wire 1 '$ A $end
$var wire 1 !) buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1263 $end
$var wire 1 `( X $end
$var wire 1 _( A $end
$var supply1 1 ") VPWR $end
$var supply0 1 #) VGND $end
$var supply1 1 $) VPB $end
$var supply0 1 %) VNB $end

$scope module base $end
$var wire 1 `( X $end
$var wire 1 _( A $end
$var wire 1 &) buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1264 $end
$var wire 1 a( X $end
$var wire 1 `( A $end
$var supply1 1 ') VPWR $end
$var supply0 1 () VGND $end
$var supply1 1 )) VPB $end
$var supply0 1 *) VNB $end

$scope module base $end
$var wire 1 a( X $end
$var wire 1 `( A $end
$var wire 1 +) buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1265 $end
$var wire 1 b( X $end
$var wire 1 a( A $end
$var supply1 1 ,) VPWR $end
$var supply0 1 -) VGND $end
$var supply1 1 .) VPB $end
$var supply0 1 /) VNB $end

$scope module base $end
$var wire 1 b( X $end
$var wire 1 a( A $end
$var wire 1 0) buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1266 $end
$var wire 1 c( X $end
$var wire 1 b( A $end
$var supply1 1 1) VPWR $end
$var supply0 1 2) VGND $end
$var supply1 1 3) VPB $end
$var supply0 1 4) VNB $end

$scope module base $end
$var wire 1 c( X $end
$var wire 1 b( A $end
$var wire 1 5) buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1267 $end
$var wire 1 d( X $end
$var wire 1 c( A $end
$var supply1 1 6) VPWR $end
$var supply0 1 7) VGND $end
$var supply1 1 8) VPB $end
$var supply0 1 9) VNB $end

$scope module base $end
$var wire 1 d( X $end
$var wire 1 c( A $end
$var wire 1 :) buf0_out_X $end
$upscope $end
$upscope $end

$scope module ropt_h_inst_1274 $end
$var wire 1 e( X $end
$var wire 1 d( A $end
$var supply1 1 ;) VPWR $end
$var supply0 1 <) VGND $end
$var supply1 1 =) VPB $end
$var supply0 1 >) VNB $end

$scope module base $end
$var wire 1 e( X $end
$var wire 1 d( A $end
$var wire 1 ?) buf0_out_X $end
$upscope $end
$upscope $end

$scope module ropt_h_inst_1275 $end
$var wire 1 f( X $end
$var wire 1 e( A $end
$var supply1 1 @) VPWR $end
$var supply0 1 A) VGND $end
$var supply1 1 B) VPB $end
$var supply0 1 C) VNB $end

$scope module base $end
$var wire 1 f( X $end
$var wire 1 e( A $end
$var wire 1 D) buf0_out_X $end
$upscope $end
$upscope $end

$scope module ropt_h_inst_1276 $end
$var wire 1 ^( X $end
$var wire 1 f( A $end
$var supply1 1 E) VPWR $end
$var supply0 1 F) VGND $end
$var supply1 1 G) VPB $end
$var supply0 1 H) VNB $end

$scope module base $end
$var wire 1 ^( X $end
$var wire 1 f( A $end
$var wire 1 I) buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_5 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 S% ccff_head [0] $end
$var wire 1 d% ccff_tail [0] $end
$var wire 1 Z% mem_out [0] $end
$var wire 1 [% mem_out [1] $end
$var wire 1 \% mem_out [2] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 Z% Q $end
$var wire 1 S$ CLK $end
$var wire 1 S% D $end
$var supply1 1 J) VPWR $end
$var supply0 1 K) VGND $end
$var supply1 1 L) VPB $end
$var supply0 1 M) VNB $end

$scope module base $end
$var wire 1 Z% Q $end
$var wire 1 S$ CLK $end
$var wire 1 S% D $end
$var wire 1 N) buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 [% Q $end
$var wire 1 S$ CLK $end
$var wire 1 Z% D $end
$var supply1 1 O) VPWR $end
$var supply0 1 P) VGND $end
$var supply1 1 Q) VPB $end
$var supply0 1 R) VNB $end

$scope module base $end
$var wire 1 [% Q $end
$var wire 1 S$ CLK $end
$var wire 1 Z% D $end
$var wire 1 S) buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_2_ $end
$var wire 1 \% Q $end
$var wire 1 S$ CLK $end
$var wire 1 [% D $end
$var supply1 1 T) VPWR $end
$var supply0 1 U) VGND $end
$var supply1 1 V) VPB $end
$var supply0 1 W) VNB $end

$scope module base $end
$var wire 1 \% Q $end
$var wire 1 S$ CLK $end
$var wire 1 [% D $end
$var wire 1 X) buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_2__1 $end
$var wire 1 d% X $end
$var wire 1 \% A $end
$var supply1 1 Y) VPWR $end
$var supply0 1 Z) VGND $end
$var supply1 1 [) VPB $end
$var supply0 1 \) VNB $end

$scope module base $end
$var wire 1 d% X $end
$var wire 1 \% A $end
$var wire 1 ]) buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_1 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 =% ccff_head [0] $end
$var wire 1 e% ccff_tail [0] $end
$var wire 1 ]% mem_out [0] $end
$var wire 1 ^% mem_out [1] $end
$var wire 1 _% mem_out [2] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 ]% Q $end
$var wire 1 S$ CLK $end
$var wire 1 =% D $end
$var supply1 1 ^) VPWR $end
$var supply0 1 _) VGND $end
$var supply1 1 `) VPB $end
$var supply0 1 a) VNB $end

$scope module base $end
$var wire 1 ]% Q $end
$var wire 1 S$ CLK $end
$var wire 1 =% D $end
$var wire 1 b) buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 ^% Q $end
$var wire 1 S$ CLK $end
$var wire 1 ]% D $end
$var supply1 1 c) VPWR $end
$var supply0 1 d) VGND $end
$var supply1 1 e) VPB $end
$var supply0 1 f) VNB $end

$scope module base $end
$var wire 1 ^% Q $end
$var wire 1 S$ CLK $end
$var wire 1 ]% D $end
$var wire 1 g) buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_2_ $end
$var wire 1 _% Q $end
$var wire 1 S$ CLK $end
$var wire 1 ^% D $end
$var supply1 1 h) VPWR $end
$var supply0 1 i) VGND $end
$var supply1 1 j) VPB $end
$var supply0 1 k) VNB $end

$scope module base $end
$var wire 1 _% Q $end
$var wire 1 S$ CLK $end
$var wire 1 ^% D $end
$var wire 1 l) buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_3__2 $end
$var wire 1 e% X $end
$var wire 1 _% A $end
$var supply1 1 m) VPWR $end
$var supply0 1 n) VGND $end
$var supply1 1 o) VPB $end
$var supply0 1 p) VNB $end

$scope module base $end
$var wire 1 e% X $end
$var wire 1 _% A $end
$var wire 1 q) buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_5 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 U% ccff_head [0] $end
$var wire 1 f% ccff_tail [0] $end
$var wire 1 `% mem_out [0] $end
$var wire 1 a% mem_out [1] $end
$var wire 1 b% mem_out [2] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 `% Q $end
$var wire 1 S$ CLK $end
$var wire 1 U% D $end
$var supply1 1 r) VPWR $end
$var supply0 1 s) VGND $end
$var supply1 1 t) VPB $end
$var supply0 1 u) VNB $end

$scope module base $end
$var wire 1 `% Q $end
$var wire 1 S$ CLK $end
$var wire 1 U% D $end
$var wire 1 v) buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 a% Q $end
$var wire 1 S$ CLK $end
$var wire 1 `% D $end
$var supply1 1 w) VPWR $end
$var supply0 1 x) VGND $end
$var supply1 1 y) VPB $end
$var supply0 1 z) VNB $end

$scope module base $end
$var wire 1 a% Q $end
$var wire 1 S$ CLK $end
$var wire 1 `% D $end
$var wire 1 {) buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_2_ $end
$var wire 1 b% Q $end
$var wire 1 S$ CLK $end
$var wire 1 a% D $end
$var supply1 1 |) VPWR $end
$var supply0 1 }) VGND $end
$var supply1 1 ~) VPB $end
$var supply0 1 !* VNB $end

$scope module base $end
$var wire 1 b% Q $end
$var wire 1 S$ CLK $end
$var wire 1 a% D $end
$var wire 1 "* buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_4__3 $end
$var wire 1 f% X $end
$var wire 1 b% A $end
$var supply1 1 #* VPWR $end
$var supply0 1 $* VGND $end
$var supply1 1 %* VPB $end
$var supply0 1 &* VNB $end

$scope module base $end
$var wire 1 f% X $end
$var wire 1 b% A $end
$var wire 1 '* buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_3 $end
$var wire 1 `# in [0] $end
$var wire 1 b# in [1] $end
$var wire 1 d# in [2] $end
$var wire 1 f# in [3] $end
$var wire 1 j# in [4] $end
$var wire 1 G% sram [0] $end
$var wire 1 H% sram [1] $end
$var wire 1 I% sram [2] $end
$var wire 1 v% sram_inv [0] $end
$var wire 1 w% sram_inv [1] $end
$var wire 1 x% sram_inv [2] $end
$var wire 1 )$ out [0] $end
$var wire 1 n% p0 $end
$var wire 1 (* sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 )* sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 ** sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 +* sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 ,* sky130_fd_sc_hd__mux2_1_4_X [0] $end
$var wire 1 -* BUF_net_48 $end

$scope module mux_l1_in_0_ $end
$var wire 1 (* X $end
$var wire 1 b# A0 $end
$var wire 1 `# A1 $end
$var wire 1 G% S $end
$var supply1 1 .* VPWR $end
$var supply0 1 /* VGND $end
$var supply1 1 0* VPB $end
$var supply0 1 1* VNB $end

$scope module base $end
$var wire 1 (* X $end
$var wire 1 b# A0 $end
$var wire 1 `# A1 $end
$var wire 1 G% S $end
$var wire 1 2* mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 )* X $end
$var wire 1 f# A0 $end
$var wire 1 d# A1 $end
$var wire 1 G% S $end
$var supply1 1 3* VPWR $end
$var supply0 1 4* VGND $end
$var supply1 1 5* VPB $end
$var supply0 1 6* VNB $end

$scope module base $end
$var wire 1 )* X $end
$var wire 1 f# A0 $end
$var wire 1 d# A1 $end
$var wire 1 G% S $end
$var wire 1 7* mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 ** X $end
$var wire 1 )* A0 $end
$var wire 1 (* A1 $end
$var wire 1 H% S $end
$var supply1 1 8* VPWR $end
$var supply0 1 9* VGND $end
$var supply1 1 :* VPB $end
$var supply0 1 ;* VNB $end

$scope module base $end
$var wire 1 ** X $end
$var wire 1 )* A0 $end
$var wire 1 (* A1 $end
$var wire 1 H% S $end
$var wire 1 <* mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_1_ $end
$var wire 1 +* X $end
$var wire 1 n% A0 $end
$var wire 1 j# A1 $end
$var wire 1 H% S $end
$var supply1 1 =* VPWR $end
$var supply0 1 >* VGND $end
$var supply1 1 ?* VPB $end
$var supply0 1 @* VNB $end

$scope module base $end
$var wire 1 +* X $end
$var wire 1 n% A0 $end
$var wire 1 j# A1 $end
$var wire 1 H% S $end
$var wire 1 A* mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l3_in_0_ $end
$var wire 1 ,* X $end
$var wire 1 +* A0 $end
$var wire 1 ** A1 $end
$var wire 1 I% S $end
$var supply1 1 B* VPWR $end
$var supply0 1 C* VGND $end
$var supply1 1 D* VPB $end
$var supply0 1 E* VNB $end

$scope module base $end
$var wire 1 ,* X $end
$var wire 1 +* A0 $end
$var wire 1 ** A1 $end
$var wire 1 I% S $end
$var wire 1 F* mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_47 $end
$var wire 1 )$ Y $end
$var wire 1 -* A $end
$var supply1 1 G* VPWR $end
$var supply0 1 H* VGND $end
$var supply1 1 I* VPB $end
$var supply0 1 J* VNB $end

$scope module base $end
$var wire 1 )$ Y $end
$var wire 1 -* A $end
$var wire 1 K* not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_48 $end
$var wire 1 -* Y $end
$var wire 1 ,* A $end
$var supply1 1 L* VPWR $end
$var supply0 1 M* VGND $end
$var supply1 1 N* VPB $end
$var supply0 1 O* VNB $end

$scope module base $end
$var wire 1 -* Y $end
$var wire 1 ,* A $end
$var wire 1 P* not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_7 $end
$var wire 1 `# in [0] $end
$var wire 1 b# in [1] $end
$var wire 1 d# in [2] $end
$var wire 1 f# in [3] $end
$var wire 1 l# in [4] $end
$var wire 1 J% sram [0] $end
$var wire 1 K% sram [1] $end
$var wire 1 L% sram [2] $end
$var wire 1 y% sram_inv [0] $end
$var wire 1 z% sram_inv [1] $end
$var wire 1 {% sram_inv [2] $end
$var wire 1 +$ out [0] $end
$var wire 1 n% p0 $end
$var wire 1 Q* sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 R* sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 S* sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 T* sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 U* sky130_fd_sc_hd__mux2_1_4_X [0] $end
$var wire 1 V* BUF_net_50 $end

$scope module mux_l1_in_0_ $end
$var wire 1 Q* X $end
$var wire 1 b# A0 $end
$var wire 1 `# A1 $end
$var wire 1 J% S $end
$var supply1 1 W* VPWR $end
$var supply0 1 X* VGND $end
$var supply1 1 Y* VPB $end
$var supply0 1 Z* VNB $end

$scope module base $end
$var wire 1 Q* X $end
$var wire 1 b# A0 $end
$var wire 1 `# A1 $end
$var wire 1 J% S $end
$var wire 1 [* mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 R* X $end
$var wire 1 f# A0 $end
$var wire 1 d# A1 $end
$var wire 1 J% S $end
$var supply1 1 \* VPWR $end
$var supply0 1 ]* VGND $end
$var supply1 1 ^* VPB $end
$var supply0 1 _* VNB $end

$scope module base $end
$var wire 1 R* X $end
$var wire 1 f# A0 $end
$var wire 1 d# A1 $end
$var wire 1 J% S $end
$var wire 1 `* mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 S* X $end
$var wire 1 R* A0 $end
$var wire 1 Q* A1 $end
$var wire 1 K% S $end
$var supply1 1 a* VPWR $end
$var supply0 1 b* VGND $end
$var supply1 1 c* VPB $end
$var supply0 1 d* VNB $end

$scope module base $end
$var wire 1 S* X $end
$var wire 1 R* A0 $end
$var wire 1 Q* A1 $end
$var wire 1 K% S $end
$var wire 1 e* mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_1_ $end
$var wire 1 T* X $end
$var wire 1 n% A0 $end
$var wire 1 l# A1 $end
$var wire 1 K% S $end
$var supply1 1 f* VPWR $end
$var supply0 1 g* VGND $end
$var supply1 1 h* VPB $end
$var supply0 1 i* VNB $end

$scope module base $end
$var wire 1 T* X $end
$var wire 1 n% A0 $end
$var wire 1 l# A1 $end
$var wire 1 K% S $end
$var wire 1 j* mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l3_in_0_ $end
$var wire 1 U* X $end
$var wire 1 T* A0 $end
$var wire 1 S* A1 $end
$var wire 1 L% S $end
$var supply1 1 k* VPWR $end
$var supply0 1 l* VGND $end
$var supply1 1 m* VPB $end
$var supply0 1 n* VNB $end

$scope module base $end
$var wire 1 U* X $end
$var wire 1 T* A0 $end
$var wire 1 S* A1 $end
$var wire 1 L% S $end
$var wire 1 o* mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_49 $end
$var wire 1 +$ Y $end
$var wire 1 V* A $end
$var supply1 1 p* VPWR $end
$var supply0 1 q* VGND $end
$var supply1 1 r* VPB $end
$var supply0 1 s* VNB $end

$scope module base $end
$var wire 1 +$ Y $end
$var wire 1 V* A $end
$var wire 1 t* not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_50 $end
$var wire 1 V* Y $end
$var wire 1 U* A $end
$var supply1 1 u* VPWR $end
$var supply0 1 v* VGND $end
$var supply1 1 w* VPB $end
$var supply0 1 x* VNB $end

$scope module base $end
$var wire 1 V* Y $end
$var wire 1 U* A $end
$var wire 1 y* not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_3 $end
$var wire 1 K# in [0] $end
$var wire 1 }# in [1] $end
$var wire 1 !$ in [2] $end
$var wire 1 #$ in [3] $end
$var wire 1 %$ in [4] $end
$var wire 1 M% sram [0] $end
$var wire 1 N% sram [1] $end
$var wire 1 O% sram [2] $end
$var wire 1 |% sram_inv [0] $end
$var wire 1 }% sram_inv [1] $end
$var wire 1 ~% sram_inv [2] $end
$var wire 1 =$ out [0] $end
$var wire 1 j% p0 $end
$var wire 1 z* sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 {* sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 |* sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 }* sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 ~* sky130_fd_sc_hd__mux2_1_4_X [0] $end
$var wire 1 !+ BUF_net_52 $end

$scope module mux_l1_in_0_ $end
$var wire 1 z* X $end
$var wire 1 }# A0 $end
$var wire 1 K# A1 $end
$var wire 1 M% S $end
$var supply1 1 "+ VPWR $end
$var supply0 1 #+ VGND $end
$var supply1 1 $+ VPB $end
$var supply0 1 %+ VNB $end

$scope module base $end
$var wire 1 z* X $end
$var wire 1 }# A0 $end
$var wire 1 K# A1 $end
$var wire 1 M% S $end
$var wire 1 &+ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 {* X $end
$var wire 1 #$ A0 $end
$var wire 1 !$ A1 $end
$var wire 1 M% S $end
$var supply1 1 '+ VPWR $end
$var supply0 1 (+ VGND $end
$var supply1 1 )+ VPB $end
$var supply0 1 *+ VNB $end

$scope module base $end
$var wire 1 {* X $end
$var wire 1 #$ A0 $end
$var wire 1 !$ A1 $end
$var wire 1 M% S $end
$var wire 1 ++ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 |* X $end
$var wire 1 {* A0 $end
$var wire 1 z* A1 $end
$var wire 1 N% S $end
$var supply1 1 ,+ VPWR $end
$var supply0 1 -+ VGND $end
$var supply1 1 .+ VPB $end
$var supply0 1 /+ VNB $end

$scope module base $end
$var wire 1 |* X $end
$var wire 1 {* A0 $end
$var wire 1 z* A1 $end
$var wire 1 N% S $end
$var wire 1 0+ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_1_ $end
$var wire 1 }* X $end
$var wire 1 j% A0 $end
$var wire 1 %$ A1 $end
$var wire 1 N% S $end
$var supply1 1 1+ VPWR $end
$var supply0 1 2+ VGND $end
$var supply1 1 3+ VPB $end
$var supply0 1 4+ VNB $end

$scope module base $end
$var wire 1 }* X $end
$var wire 1 j% A0 $end
$var wire 1 %$ A1 $end
$var wire 1 N% S $end
$var wire 1 5+ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l3_in_0_ $end
$var wire 1 ~* X $end
$var wire 1 }* A0 $end
$var wire 1 |* A1 $end
$var wire 1 O% S $end
$var supply1 1 6+ VPWR $end
$var supply0 1 7+ VGND $end
$var supply1 1 8+ VPB $end
$var supply0 1 9+ VNB $end

$scope module base $end
$var wire 1 ~* X $end
$var wire 1 }* A0 $end
$var wire 1 |* A1 $end
$var wire 1 O% S $end
$var wire 1 :+ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_51 $end
$var wire 1 =$ Y $end
$var wire 1 !+ A $end
$var supply1 1 ;+ VPWR $end
$var supply0 1 <+ VGND $end
$var supply1 1 =+ VPB $end
$var supply0 1 >+ VNB $end

$scope module base $end
$var wire 1 =$ Y $end
$var wire 1 !+ A $end
$var wire 1 ?+ not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_52 $end
$var wire 1 !+ Y $end
$var wire 1 ~* A $end
$var supply1 1 @+ VPWR $end
$var supply0 1 A+ VGND $end
$var supply1 1 B+ VPB $end
$var supply0 1 C+ VNB $end

$scope module base $end
$var wire 1 !+ Y $end
$var wire 1 ~* A $end
$var wire 1 D+ not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_7 $end
$var wire 1 M# in [0] $end
$var wire 1 }# in [1] $end
$var wire 1 !$ in [2] $end
$var wire 1 #$ in [3] $end
$var wire 1 %$ in [4] $end
$var wire 1 P% sram [0] $end
$var wire 1 Q% sram [1] $end
$var wire 1 R% sram [2] $end
$var wire 1 !& sram_inv [0] $end
$var wire 1 "& sram_inv [1] $end
$var wire 1 #& sram_inv [2] $end
$var wire 1 ?$ out [0] $end
$var wire 1 j% p0 $end
$var wire 1 E+ sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 F+ sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 G+ sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 H+ sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 I+ sky130_fd_sc_hd__mux2_1_4_X [0] $end
$var wire 1 J+ BUF_net_54 $end

$scope module mux_l1_in_0_ $end
$var wire 1 E+ X $end
$var wire 1 }# A0 $end
$var wire 1 M# A1 $end
$var wire 1 P% S $end
$var supply1 1 K+ VPWR $end
$var supply0 1 L+ VGND $end
$var supply1 1 M+ VPB $end
$var supply0 1 N+ VNB $end

$scope module base $end
$var wire 1 E+ X $end
$var wire 1 }# A0 $end
$var wire 1 M# A1 $end
$var wire 1 P% S $end
$var wire 1 O+ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 F+ X $end
$var wire 1 #$ A0 $end
$var wire 1 !$ A1 $end
$var wire 1 P% S $end
$var supply1 1 P+ VPWR $end
$var supply0 1 Q+ VGND $end
$var supply1 1 R+ VPB $end
$var supply0 1 S+ VNB $end

$scope module base $end
$var wire 1 F+ X $end
$var wire 1 #$ A0 $end
$var wire 1 !$ A1 $end
$var wire 1 P% S $end
$var wire 1 T+ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 G+ X $end
$var wire 1 F+ A0 $end
$var wire 1 E+ A1 $end
$var wire 1 Q% S $end
$var supply1 1 U+ VPWR $end
$var supply0 1 V+ VGND $end
$var supply1 1 W+ VPB $end
$var supply0 1 X+ VNB $end

$scope module base $end
$var wire 1 G+ X $end
$var wire 1 F+ A0 $end
$var wire 1 E+ A1 $end
$var wire 1 Q% S $end
$var wire 1 Y+ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_1_ $end
$var wire 1 H+ X $end
$var wire 1 j% A0 $end
$var wire 1 %$ A1 $end
$var wire 1 Q% S $end
$var supply1 1 Z+ VPWR $end
$var supply0 1 [+ VGND $end
$var supply1 1 \+ VPB $end
$var supply0 1 ]+ VNB $end

$scope module base $end
$var wire 1 H+ X $end
$var wire 1 j% A0 $end
$var wire 1 %$ A1 $end
$var wire 1 Q% S $end
$var wire 1 ^+ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l3_in_0_ $end
$var wire 1 I+ X $end
$var wire 1 H+ A0 $end
$var wire 1 G+ A1 $end
$var wire 1 R% S $end
$var supply1 1 _+ VPWR $end
$var supply0 1 `+ VGND $end
$var supply1 1 a+ VPB $end
$var supply0 1 b+ VNB $end

$scope module base $end
$var wire 1 I+ X $end
$var wire 1 H+ A0 $end
$var wire 1 G+ A1 $end
$var wire 1 R% S $end
$var wire 1 c+ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_53 $end
$var wire 1 ?$ Y $end
$var wire 1 J+ A $end
$var supply1 1 d+ VPWR $end
$var supply0 1 e+ VGND $end
$var supply1 1 f+ VPB $end
$var supply0 1 g+ VNB $end

$scope module base $end
$var wire 1 ?$ Y $end
$var wire 1 J+ A $end
$var wire 1 h+ not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_54 $end
$var wire 1 J+ Y $end
$var wire 1 I+ A $end
$var supply1 1 i+ VPWR $end
$var supply0 1 j+ VGND $end
$var supply1 1 k+ VPB $end
$var supply0 1 l+ VNB $end

$scope module base $end
$var wire 1 J+ Y $end
$var wire 1 I+ A $end
$var wire 1 m+ not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_3 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 c% ccff_head [0] $end
$var wire 1 S% ccff_tail [0] $end
$var wire 1 G% mem_out [0] $end
$var wire 1 H% mem_out [1] $end
$var wire 1 I% mem_out [2] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 G% Q $end
$var wire 1 S$ CLK $end
$var wire 1 c% D $end
$var supply1 1 n+ VPWR $end
$var supply0 1 o+ VGND $end
$var supply1 1 p+ VPB $end
$var supply0 1 q+ VNB $end

$scope module base $end
$var wire 1 G% Q $end
$var wire 1 S$ CLK $end
$var wire 1 c% D $end
$var wire 1 r+ buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 H% Q $end
$var wire 1 S$ CLK $end
$var wire 1 G% D $end
$var supply1 1 s+ VPWR $end
$var supply0 1 t+ VGND $end
$var supply1 1 u+ VPB $end
$var supply0 1 v+ VNB $end

$scope module base $end
$var wire 1 H% Q $end
$var wire 1 S$ CLK $end
$var wire 1 G% D $end
$var wire 1 w+ buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_2_ $end
$var wire 1 I% Q $end
$var wire 1 S$ CLK $end
$var wire 1 H% D $end
$var supply1 1 x+ VPWR $end
$var supply0 1 y+ VGND $end
$var supply1 1 z+ VPB $end
$var supply0 1 {+ VNB $end

$scope module base $end
$var wire 1 I% Q $end
$var wire 1 S$ CLK $end
$var wire 1 H% D $end
$var wire 1 |+ buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_5__4 $end
$var wire 1 S% X $end
$var wire 1 I% A $end
$var supply1 1 }+ VPWR $end
$var supply0 1 ~+ VGND $end
$var supply1 1 !, VPB $end
$var supply0 1 ", VNB $end

$scope module base $end
$var wire 1 S% X $end
$var wire 1 I% A $end
$var wire 1 #, buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_7 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 d% ccff_head [0] $end
$var wire 1 T% ccff_tail [0] $end
$var wire 1 J% mem_out [0] $end
$var wire 1 K% mem_out [1] $end
$var wire 1 L% mem_out [2] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 J% Q $end
$var wire 1 S$ CLK $end
$var wire 1 d% D $end
$var supply1 1 $, VPWR $end
$var supply0 1 %, VGND $end
$var supply1 1 &, VPB $end
$var supply0 1 ', VNB $end

$scope module base $end
$var wire 1 J% Q $end
$var wire 1 S$ CLK $end
$var wire 1 d% D $end
$var wire 1 (, buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 K% Q $end
$var wire 1 S$ CLK $end
$var wire 1 J% D $end
$var supply1 1 ), VPWR $end
$var supply0 1 *, VGND $end
$var supply1 1 +, VPB $end
$var supply0 1 ,, VNB $end

$scope module base $end
$var wire 1 K% Q $end
$var wire 1 S$ CLK $end
$var wire 1 J% D $end
$var wire 1 -, buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_2_ $end
$var wire 1 L% Q $end
$var wire 1 S$ CLK $end
$var wire 1 K% D $end
$var supply1 1 ., VPWR $end
$var supply0 1 /, VGND $end
$var supply1 1 0, VPB $end
$var supply0 1 1, VNB $end

$scope module base $end
$var wire 1 L% Q $end
$var wire 1 S$ CLK $end
$var wire 1 K% D $end
$var wire 1 2, buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_6__5 $end
$var wire 1 T% X $end
$var wire 1 L% A $end
$var supply1 1 3, VPWR $end
$var supply0 1 4, VGND $end
$var supply1 1 5, VPB $end
$var supply0 1 6, VNB $end

$scope module base $end
$var wire 1 T% X $end
$var wire 1 L% A $end
$var wire 1 7, buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_3 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 e% ccff_head [0] $end
$var wire 1 U% ccff_tail [0] $end
$var wire 1 M% mem_out [0] $end
$var wire 1 N% mem_out [1] $end
$var wire 1 O% mem_out [2] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 M% Q $end
$var wire 1 S$ CLK $end
$var wire 1 e% D $end
$var supply1 1 8, VPWR $end
$var supply0 1 9, VGND $end
$var supply1 1 :, VPB $end
$var supply0 1 ;, VNB $end

$scope module base $end
$var wire 1 M% Q $end
$var wire 1 S$ CLK $end
$var wire 1 e% D $end
$var wire 1 <, buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 N% Q $end
$var wire 1 S$ CLK $end
$var wire 1 M% D $end
$var supply1 1 =, VPWR $end
$var supply0 1 >, VGND $end
$var supply1 1 ?, VPB $end
$var supply0 1 @, VNB $end

$scope module base $end
$var wire 1 N% Q $end
$var wire 1 S$ CLK $end
$var wire 1 M% D $end
$var wire 1 A, buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_2_ $end
$var wire 1 O% Q $end
$var wire 1 S$ CLK $end
$var wire 1 N% D $end
$var supply1 1 B, VPWR $end
$var supply0 1 C, VGND $end
$var supply1 1 D, VPB $end
$var supply0 1 E, VNB $end

$scope module base $end
$var wire 1 O% Q $end
$var wire 1 S$ CLK $end
$var wire 1 N% D $end
$var wire 1 F, buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_7__6 $end
$var wire 1 U% X $end
$var wire 1 O% A $end
$var supply1 1 G, VPWR $end
$var supply0 1 H, VGND $end
$var supply1 1 I, VPB $end
$var supply0 1 J, VNB $end

$scope module base $end
$var wire 1 U% X $end
$var wire 1 O% A $end
$var wire 1 K, buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_7 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 f% ccff_head [0] $end
$var wire 1 V% ccff_tail [0] $end
$var wire 1 P% mem_out [0] $end
$var wire 1 Q% mem_out [1] $end
$var wire 1 R% mem_out [2] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 P% Q $end
$var wire 1 S$ CLK $end
$var wire 1 f% D $end
$var supply1 1 L, VPWR $end
$var supply0 1 M, VGND $end
$var supply1 1 N, VPB $end
$var supply0 1 O, VNB $end

$scope module base $end
$var wire 1 P% Q $end
$var wire 1 S$ CLK $end
$var wire 1 f% D $end
$var wire 1 P, buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 Q% Q $end
$var wire 1 S$ CLK $end
$var wire 1 P% D $end
$var supply1 1 Q, VPWR $end
$var supply0 1 R, VGND $end
$var supply1 1 S, VPB $end
$var supply0 1 T, VNB $end

$scope module base $end
$var wire 1 Q% Q $end
$var wire 1 S$ CLK $end
$var wire 1 P% D $end
$var wire 1 U, buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_2_ $end
$var wire 1 R% Q $end
$var wire 1 S$ CLK $end
$var wire 1 Q% D $end
$var supply1 1 V, VPWR $end
$var supply0 1 W, VGND $end
$var supply1 1 X, VPB $end
$var supply0 1 Y, VNB $end

$scope module base $end
$var wire 1 R% Q $end
$var wire 1 S$ CLK $end
$var wire 1 Q% D $end
$var wire 1 Z, buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_8__7 $end
$var wire 1 V% X $end
$var wire 1 R% A $end
$var supply1 1 [, VPWR $end
$var supply0 1 \, VGND $end
$var supply1 1 ], VPB $end
$var supply0 1 ^, VNB $end

$scope module base $end
$var wire 1 V% X $end
$var wire 1 R% A $end
$var wire 1 _, buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_9 $end
$var wire 1 _# in [0] $end
$var wire 1 m# in [1] $end
$var wire 1 U$ sram [0] $end
$var wire 1 V$ sram [1] $end
$var wire 1 $& sram_inv [0] $end
$var wire 1 %& sram_inv [1] $end
$var wire 1 ,$ out [0] $end
$var wire 1 j% p0 $end
$var wire 1 `, sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 a, sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 b, BUF_net_56 $end

$scope module mux_l1_in_0_ $end
$var wire 1 `, X $end
$var wire 1 m# A0 $end
$var wire 1 _# A1 $end
$var wire 1 U$ S $end
$var supply1 1 c, VPWR $end
$var supply0 1 d, VGND $end
$var supply1 1 e, VPB $end
$var supply0 1 f, VNB $end

$scope module base $end
$var wire 1 `, X $end
$var wire 1 m# A0 $end
$var wire 1 _# A1 $end
$var wire 1 U$ S $end
$var wire 1 g, mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 a, X $end
$var wire 1 j% A0 $end
$var wire 1 `, A1 $end
$var wire 1 V$ S $end
$var supply1 1 h, VPWR $end
$var supply0 1 i, VGND $end
$var supply1 1 j, VPB $end
$var supply0 1 k, VNB $end

$scope module base $end
$var wire 1 a, X $end
$var wire 1 j% A0 $end
$var wire 1 `, A1 $end
$var wire 1 V$ S $end
$var wire 1 l, mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_55 $end
$var wire 1 ,$ Y $end
$var wire 1 b, A $end
$var supply1 1 m, VPWR $end
$var supply0 1 n, VGND $end
$var supply1 1 o, VPB $end
$var supply0 1 p, VNB $end

$scope module base $end
$var wire 1 ,$ Y $end
$var wire 1 b, A $end
$var wire 1 q, not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_56 $end
$var wire 1 b, Y $end
$var wire 1 a, A $end
$var supply1 1 r, VPWR $end
$var supply0 1 s, VGND $end
$var supply1 1 t, VPB $end
$var supply0 1 u, VNB $end

$scope module base $end
$var wire 1 b, Y $end
$var wire 1 a, A $end
$var wire 1 v, not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_11 $end
$var wire 1 `# in [0] $end
$var wire 1 n# in [1] $end
$var wire 1 k$ sram [0] $end
$var wire 1 l$ sram [1] $end
$var wire 1 && sram_inv [0] $end
$var wire 1 '& sram_inv [1] $end
$var wire 1 -$ out [0] $end
$var wire 1 j% p0 $end
$var wire 1 w, sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 x, sky130_fd_sc_hd__mux2_1_1_X [0] $end

$scope module mux_l1_in_0_ $end
$var wire 1 w, X $end
$var wire 1 n# A0 $end
$var wire 1 `# A1 $end
$var wire 1 k$ S $end
$var supply1 1 y, VPWR $end
$var supply0 1 z, VGND $end
$var supply1 1 {, VPB $end
$var supply0 1 |, VNB $end

$scope module base $end
$var wire 1 w, X $end
$var wire 1 n# A0 $end
$var wire 1 `# A1 $end
$var wire 1 k$ S $end
$var wire 1 }, mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 x, X $end
$var wire 1 j% A0 $end
$var wire 1 w, A1 $end
$var wire 1 l$ S $end
$var supply1 1 ~, VPWR $end
$var supply0 1 !- VGND $end
$var supply1 1 "- VPB $end
$var supply0 1 #- VNB $end

$scope module base $end
$var wire 1 x, X $end
$var wire 1 j% A0 $end
$var wire 1 w, A1 $end
$var wire 1 l$ S $end
$var wire 1 $- mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BUFT_RR_57 $end
$var wire 1 -$ X $end
$var wire 1 x, A $end
$var supply1 1 %- VPWR $end
$var supply0 1 &- VGND $end
$var supply1 1 '- VPB $end
$var supply0 1 (- VNB $end

$scope module base $end
$var wire 1 -$ X $end
$var wire 1 x, A $end
$var wire 1 )- buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_13 $end
$var wire 1 a# in [0] $end
$var wire 1 o# in [1] $end
$var wire 1 u$ sram [0] $end
$var wire 1 v$ sram [1] $end
$var wire 1 (& sram_inv [0] $end
$var wire 1 )& sram_inv [1] $end
$var wire 1 .$ out [0] $end
$var wire 1 j% p0 $end
$var wire 1 *- sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 +- sky130_fd_sc_hd__mux2_1_1_X [0] $end

$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 .$ X $end
$var wire 1 +- A $end
$var supply1 1 ,- VPWR $end
$var supply0 1 -- VGND $end
$var supply1 1 .- VPB $end
$var supply0 1 /- VNB $end

$scope module base $end
$var wire 1 .$ X $end
$var wire 1 +- A $end
$var wire 1 0- buf0_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_0_ $end
$var wire 1 *- X $end
$var wire 1 o# A0 $end
$var wire 1 a# A1 $end
$var wire 1 u$ S $end
$var supply1 1 1- VPWR $end
$var supply0 1 2- VGND $end
$var supply1 1 3- VPB $end
$var supply0 1 4- VNB $end

$scope module base $end
$var wire 1 *- X $end
$var wire 1 o# A0 $end
$var wire 1 a# A1 $end
$var wire 1 u$ S $end
$var wire 1 5- mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 +- X $end
$var wire 1 j% A0 $end
$var wire 1 *- A1 $end
$var wire 1 v$ S $end
$var supply1 1 6- VPWR $end
$var supply0 1 7- VGND $end
$var supply1 1 8- VPB $end
$var supply0 1 9- VNB $end

$scope module base $end
$var wire 1 +- X $end
$var wire 1 j% A0 $end
$var wire 1 *- A1 $end
$var wire 1 v$ S $end
$var wire 1 :- mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_15 $end
$var wire 1 b# in [0] $end
$var wire 1 p# in [1] $end
$var wire 1 w$ sram [0] $end
$var wire 1 x$ sram [1] $end
$var wire 1 *& sram_inv [0] $end
$var wire 1 +& sram_inv [1] $end
$var wire 1 /$ out [0] $end
$var wire 1 ,& p0 $end
$var wire 1 ;- sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 <- sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 =- BUF_net_59 $end

$scope module mux_l1_in_0_ $end
$var wire 1 ;- X $end
$var wire 1 p# A0 $end
$var wire 1 b# A1 $end
$var wire 1 w$ S $end
$var supply1 1 >- VPWR $end
$var supply0 1 ?- VGND $end
$var supply1 1 @- VPB $end
$var supply0 1 A- VNB $end

$scope module base $end
$var wire 1 ;- X $end
$var wire 1 p# A0 $end
$var wire 1 b# A1 $end
$var wire 1 w$ S $end
$var wire 1 B- mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 <- X $end
$var wire 1 ,& A0 $end
$var wire 1 ;- A1 $end
$var wire 1 x$ S $end
$var supply1 1 C- VPWR $end
$var supply0 1 D- VGND $end
$var supply1 1 E- VPB $end
$var supply0 1 F- VNB $end

$scope module base $end
$var wire 1 <- X $end
$var wire 1 ,& A0 $end
$var wire 1 ;- A1 $end
$var wire 1 x$ S $end
$var wire 1 G- mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_58 $end
$var wire 1 /$ Y $end
$var wire 1 =- A $end
$var supply1 1 H- VPWR $end
$var supply0 1 I- VGND $end
$var supply1 1 J- VPB $end
$var supply0 1 K- VNB $end

$scope module base $end
$var wire 1 /$ Y $end
$var wire 1 =- A $end
$var wire 1 L- not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_59 $end
$var wire 1 =- Y $end
$var wire 1 <- A $end
$var supply1 1 M- VPWR $end
$var supply0 1 N- VGND $end
$var supply1 1 O- VPB $end
$var supply0 1 P- VNB $end

$scope module base $end
$var wire 1 =- Y $end
$var wire 1 <- A $end
$var wire 1 Q- not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_17 $end
$var wire 1 c# in [0] $end
$var wire 1 q# in [1] $end
$var wire 1 y$ sram [0] $end
$var wire 1 z$ sram [1] $end
$var wire 1 -& sram_inv [0] $end
$var wire 1 .& sram_inv [1] $end
$var wire 1 0$ out [0] $end
$var wire 1 ,& p0 $end
$var wire 1 R- sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 S- sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 T- BUF_net_61 $end

$scope module mux_l1_in_0_ $end
$var wire 1 R- X $end
$var wire 1 q# A0 $end
$var wire 1 c# A1 $end
$var wire 1 y$ S $end
$var supply1 1 U- VPWR $end
$var supply0 1 V- VGND $end
$var supply1 1 W- VPB $end
$var supply0 1 X- VNB $end

$scope module base $end
$var wire 1 R- X $end
$var wire 1 q# A0 $end
$var wire 1 c# A1 $end
$var wire 1 y$ S $end
$var wire 1 Y- mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 S- X $end
$var wire 1 ,& A0 $end
$var wire 1 R- A1 $end
$var wire 1 z$ S $end
$var supply1 1 Z- VPWR $end
$var supply0 1 [- VGND $end
$var supply1 1 \- VPB $end
$var supply0 1 ]- VNB $end

$scope module base $end
$var wire 1 S- X $end
$var wire 1 ,& A0 $end
$var wire 1 R- A1 $end
$var wire 1 z$ S $end
$var wire 1 ^- mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_60 $end
$var wire 1 0$ Y $end
$var wire 1 T- A $end
$var supply1 1 _- VPWR $end
$var supply0 1 `- VGND $end
$var supply1 1 a- VPB $end
$var supply0 1 b- VNB $end

$scope module base $end
$var wire 1 0$ Y $end
$var wire 1 T- A $end
$var wire 1 c- not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_61 $end
$var wire 1 T- Y $end
$var wire 1 S- A $end
$var supply1 1 d- VPWR $end
$var supply0 1 e- VGND $end
$var supply1 1 f- VPB $end
$var supply0 1 g- VNB $end

$scope module base $end
$var wire 1 T- Y $end
$var wire 1 S- A $end
$var wire 1 h- not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_19 $end
$var wire 1 d# in [0] $end
$var wire 1 r# in [1] $end
$var wire 1 {$ sram [0] $end
$var wire 1 |$ sram [1] $end
$var wire 1 /& sram_inv [0] $end
$var wire 1 0& sram_inv [1] $end
$var wire 1 1$ out [0] $end
$var wire 1 ,& p0 $end
$var wire 1 i- sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 j- sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 k- BUF_net_63 $end

$scope module mux_l1_in_0_ $end
$var wire 1 i- X $end
$var wire 1 r# A0 $end
$var wire 1 d# A1 $end
$var wire 1 {$ S $end
$var supply1 1 l- VPWR $end
$var supply0 1 m- VGND $end
$var supply1 1 n- VPB $end
$var supply0 1 o- VNB $end

$scope module base $end
$var wire 1 i- X $end
$var wire 1 r# A0 $end
$var wire 1 d# A1 $end
$var wire 1 {$ S $end
$var wire 1 p- mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 j- X $end
$var wire 1 ,& A0 $end
$var wire 1 i- A1 $end
$var wire 1 |$ S $end
$var supply1 1 q- VPWR $end
$var supply0 1 r- VGND $end
$var supply1 1 s- VPB $end
$var supply0 1 t- VNB $end

$scope module base $end
$var wire 1 j- X $end
$var wire 1 ,& A0 $end
$var wire 1 i- A1 $end
$var wire 1 |$ S $end
$var wire 1 u- mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_62 $end
$var wire 1 1$ Y $end
$var wire 1 k- A $end
$var supply1 1 v- VPWR $end
$var supply0 1 w- VGND $end
$var supply1 1 x- VPB $end
$var supply0 1 y- VNB $end

$scope module base $end
$var wire 1 1$ Y $end
$var wire 1 k- A $end
$var wire 1 z- not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_63 $end
$var wire 1 k- Y $end
$var wire 1 j- A $end
$var supply1 1 {- VPWR $end
$var supply0 1 |- VGND $end
$var supply1 1 }- VPB $end
$var supply0 1 ~- VNB $end

$scope module base $end
$var wire 1 k- Y $end
$var wire 1 j- A $end
$var wire 1 !. not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_21 $end
$var wire 1 e# in [0] $end
$var wire 1 s# in [1] $end
$var wire 1 }$ sram [0] $end
$var wire 1 ~$ sram [1] $end
$var wire 1 1& sram_inv [0] $end
$var wire 1 2& sram_inv [1] $end
$var wire 1 2$ out [0] $end
$var wire 1 ,& p0 $end
$var wire 1 ". sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 #. sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 $. BUF_net_65 $end

$scope module mux_l1_in_0_ $end
$var wire 1 ". X $end
$var wire 1 s# A0 $end
$var wire 1 e# A1 $end
$var wire 1 }$ S $end
$var supply1 1 %. VPWR $end
$var supply0 1 &. VGND $end
$var supply1 1 '. VPB $end
$var supply0 1 (. VNB $end

$scope module base $end
$var wire 1 ". X $end
$var wire 1 s# A0 $end
$var wire 1 e# A1 $end
$var wire 1 }$ S $end
$var wire 1 ). mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 #. X $end
$var wire 1 ,& A0 $end
$var wire 1 ". A1 $end
$var wire 1 ~$ S $end
$var supply1 1 *. VPWR $end
$var supply0 1 +. VGND $end
$var supply1 1 ,. VPB $end
$var supply0 1 -. VNB $end

$scope module base $end
$var wire 1 #. X $end
$var wire 1 ,& A0 $end
$var wire 1 ". A1 $end
$var wire 1 ~$ S $end
$var wire 1 .. mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_64 $end
$var wire 1 2$ Y $end
$var wire 1 $. A $end
$var supply1 1 /. VPWR $end
$var supply0 1 0. VGND $end
$var supply1 1 1. VPB $end
$var supply0 1 2. VNB $end

$scope module base $end
$var wire 1 2$ Y $end
$var wire 1 $. A $end
$var wire 1 3. not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_65 $end
$var wire 1 $. Y $end
$var wire 1 #. A $end
$var supply1 1 4. VPWR $end
$var supply0 1 5. VGND $end
$var supply1 1 6. VPB $end
$var supply0 1 7. VNB $end

$scope module base $end
$var wire 1 $. Y $end
$var wire 1 #. A $end
$var wire 1 8. not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_23 $end
$var wire 1 f# in [0] $end
$var wire 1 t# in [1] $end
$var wire 1 !% sram [0] $end
$var wire 1 "% sram [1] $end
$var wire 1 3& sram_inv [0] $end
$var wire 1 4& sram_inv [1] $end
$var wire 1 3$ out [0] $end
$var wire 1 ,& p0 $end
$var wire 1 9. sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 :. sky130_fd_sc_hd__mux2_1_1_X [0] $end

$scope module mux_l1_in_0_ $end
$var wire 1 9. X $end
$var wire 1 t# A0 $end
$var wire 1 f# A1 $end
$var wire 1 !% S $end
$var supply1 1 ;. VPWR $end
$var supply0 1 <. VGND $end
$var supply1 1 =. VPB $end
$var supply0 1 >. VNB $end

$scope module base $end
$var wire 1 9. X $end
$var wire 1 t# A0 $end
$var wire 1 f# A1 $end
$var wire 1 !% S $end
$var wire 1 ?. mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 :. X $end
$var wire 1 ,& A0 $end
$var wire 1 9. A1 $end
$var wire 1 "% S $end
$var supply1 1 @. VPWR $end
$var supply0 1 A. VGND $end
$var supply1 1 B. VPB $end
$var supply0 1 C. VNB $end

$scope module base $end
$var wire 1 :. X $end
$var wire 1 ,& A0 $end
$var wire 1 9. A1 $end
$var wire 1 "% S $end
$var wire 1 D. mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BUFT_RR_66 $end
$var wire 1 3$ X $end
$var wire 1 :. A $end
$var supply1 1 E. VPWR $end
$var supply0 1 F. VGND $end
$var supply1 1 G. VPB $end
$var supply0 1 H. VNB $end

$scope module base $end
$var wire 1 3$ X $end
$var wire 1 :. A $end
$var wire 1 I. buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_27 $end
$var wire 1 `# in [0] $end
$var wire 1 v# in [1] $end
$var wire 1 #% sram [0] $end
$var wire 1 $% sram [1] $end
$var wire 1 5& sram_inv [0] $end
$var wire 1 6& sram_inv [1] $end
$var wire 1 5$ out [0] $end
$var wire 1 j% p0 $end
$var wire 1 J. sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 K. sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 L. BUF_net_68 $end

$scope module mux_l1_in_0_ $end
$var wire 1 J. X $end
$var wire 1 v# A0 $end
$var wire 1 `# A1 $end
$var wire 1 #% S $end
$var supply1 1 M. VPWR $end
$var supply0 1 N. VGND $end
$var supply1 1 O. VPB $end
$var supply0 1 P. VNB $end

$scope module base $end
$var wire 1 J. X $end
$var wire 1 v# A0 $end
$var wire 1 `# A1 $end
$var wire 1 #% S $end
$var wire 1 Q. mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 K. X $end
$var wire 1 j% A0 $end
$var wire 1 J. A1 $end
$var wire 1 $% S $end
$var supply1 1 R. VPWR $end
$var supply0 1 S. VGND $end
$var supply1 1 T. VPB $end
$var supply0 1 U. VNB $end

$scope module base $end
$var wire 1 K. X $end
$var wire 1 j% A0 $end
$var wire 1 J. A1 $end
$var wire 1 $% S $end
$var wire 1 V. mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_67 $end
$var wire 1 5$ Y $end
$var wire 1 L. A $end
$var supply1 1 W. VPWR $end
$var supply0 1 X. VGND $end
$var supply1 1 Y. VPB $end
$var supply0 1 Z. VNB $end

$scope module base $end
$var wire 1 5$ Y $end
$var wire 1 L. A $end
$var wire 1 [. not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_68 $end
$var wire 1 L. Y $end
$var wire 1 K. A $end
$var supply1 1 \. VPWR $end
$var supply0 1 ]. VGND $end
$var supply1 1 ^. VPB $end
$var supply0 1 _. VNB $end

$scope module base $end
$var wire 1 L. Y $end
$var wire 1 K. A $end
$var wire 1 `. not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_29 $end
$var wire 1 a# in [0] $end
$var wire 1 w# in [1] $end
$var wire 1 %% sram [0] $end
$var wire 1 &% sram [1] $end
$var wire 1 7& sram_inv [0] $end
$var wire 1 8& sram_inv [1] $end
$var wire 1 6$ out [0] $end
$var wire 1 r% p0 $end
$var wire 1 a. sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 b. sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 c. BUF_net_70 $end

$scope module mux_l1_in_0_ $end
$var wire 1 a. X $end
$var wire 1 w# A0 $end
$var wire 1 a# A1 $end
$var wire 1 %% S $end
$var supply1 1 d. VPWR $end
$var supply0 1 e. VGND $end
$var supply1 1 f. VPB $end
$var supply0 1 g. VNB $end

$scope module base $end
$var wire 1 a. X $end
$var wire 1 w# A0 $end
$var wire 1 a# A1 $end
$var wire 1 %% S $end
$var wire 1 h. mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 b. X $end
$var wire 1 r% A0 $end
$var wire 1 a. A1 $end
$var wire 1 &% S $end
$var supply1 1 i. VPWR $end
$var supply0 1 j. VGND $end
$var supply1 1 k. VPB $end
$var supply0 1 l. VNB $end

$scope module base $end
$var wire 1 b. X $end
$var wire 1 r% A0 $end
$var wire 1 a. A1 $end
$var wire 1 &% S $end
$var wire 1 m. mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_69 $end
$var wire 1 6$ Y $end
$var wire 1 c. A $end
$var supply1 1 n. VPWR $end
$var supply0 1 o. VGND $end
$var supply1 1 p. VPB $end
$var supply0 1 q. VNB $end

$scope module base $end
$var wire 1 6$ Y $end
$var wire 1 c. A $end
$var wire 1 r. not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_70 $end
$var wire 1 c. Y $end
$var wire 1 b. A $end
$var supply1 1 s. VPWR $end
$var supply0 1 t. VGND $end
$var supply1 1 u. VPB $end
$var supply0 1 v. VNB $end

$scope module base $end
$var wire 1 c. Y $end
$var wire 1 b. A $end
$var wire 1 w. not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_11 $end
$var wire 1 O# in [0] $end
$var wire 1 }# in [1] $end
$var wire 1 W$ sram [0] $end
$var wire 1 X$ sram [1] $end
$var wire 1 9& sram_inv [0] $end
$var wire 1 :& sram_inv [1] $end
$var wire 1 A$ out [0] $end
$var wire 1 ;& p0 $end
$var wire 1 x. sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 y. sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 z. BUF_net_72 $end

$scope module mux_l1_in_0_ $end
$var wire 1 x. X $end
$var wire 1 }# A0 $end
$var wire 1 O# A1 $end
$var wire 1 W$ S $end
$var supply1 1 {. VPWR $end
$var supply0 1 |. VGND $end
$var supply1 1 }. VPB $end
$var supply0 1 ~. VNB $end

$scope module base $end
$var wire 1 x. X $end
$var wire 1 }# A0 $end
$var wire 1 O# A1 $end
$var wire 1 W$ S $end
$var wire 1 !/ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 y. X $end
$var wire 1 ;& A0 $end
$var wire 1 x. A1 $end
$var wire 1 X$ S $end
$var supply1 1 "/ VPWR $end
$var supply0 1 #/ VGND $end
$var supply1 1 $/ VPB $end
$var supply0 1 %/ VNB $end

$scope module base $end
$var wire 1 y. X $end
$var wire 1 ;& A0 $end
$var wire 1 x. A1 $end
$var wire 1 X$ S $end
$var wire 1 &/ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_71 $end
$var wire 1 A$ Y $end
$var wire 1 z. A $end
$var supply1 1 '/ VPWR $end
$var supply0 1 (/ VGND $end
$var supply1 1 )/ VPB $end
$var supply0 1 */ VNB $end

$scope module base $end
$var wire 1 A$ Y $end
$var wire 1 z. A $end
$var wire 1 +/ not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_72 $end
$var wire 1 z. Y $end
$var wire 1 y. A $end
$var supply1 1 ,/ VPWR $end
$var supply0 1 -/ VGND $end
$var supply1 1 ./ VPB $end
$var supply0 1 // VNB $end

$scope module base $end
$var wire 1 z. Y $end
$var wire 1 y. A $end
$var wire 1 0/ not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_13 $end
$var wire 1 P# in [0] $end
$var wire 1 ~# in [1] $end
$var wire 1 Y$ sram [0] $end
$var wire 1 Z$ sram [1] $end
$var wire 1 <& sram_inv [0] $end
$var wire 1 =& sram_inv [1] $end
$var wire 1 B$ out [0] $end
$var wire 1 r% p0 $end
$var wire 1 1/ sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 2/ sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 3/ BUF_net_74 $end

$scope module mux_l1_in_0_ $end
$var wire 1 1/ X $end
$var wire 1 ~# A0 $end
$var wire 1 P# A1 $end
$var wire 1 Y$ S $end
$var supply1 1 4/ VPWR $end
$var supply0 1 5/ VGND $end
$var supply1 1 6/ VPB $end
$var supply0 1 7/ VNB $end

$scope module base $end
$var wire 1 1/ X $end
$var wire 1 ~# A0 $end
$var wire 1 P# A1 $end
$var wire 1 Y$ S $end
$var wire 1 8/ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 2/ X $end
$var wire 1 r% A0 $end
$var wire 1 1/ A1 $end
$var wire 1 Z$ S $end
$var supply1 1 9/ VPWR $end
$var supply0 1 :/ VGND $end
$var supply1 1 ;/ VPB $end
$var supply0 1 </ VNB $end

$scope module base $end
$var wire 1 2/ X $end
$var wire 1 r% A0 $end
$var wire 1 1/ A1 $end
$var wire 1 Z$ S $end
$var wire 1 =/ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_73 $end
$var wire 1 B$ Y $end
$var wire 1 3/ A $end
$var supply1 1 >/ VPWR $end
$var supply0 1 ?/ VGND $end
$var supply1 1 @/ VPB $end
$var supply0 1 A/ VNB $end

$scope module base $end
$var wire 1 B$ Y $end
$var wire 1 3/ A $end
$var wire 1 B/ not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_74 $end
$var wire 1 3/ Y $end
$var wire 1 2/ A $end
$var supply1 1 C/ VPWR $end
$var supply0 1 D/ VGND $end
$var supply1 1 E/ VPB $end
$var supply0 1 F/ VNB $end

$scope module base $end
$var wire 1 3/ Y $end
$var wire 1 2/ A $end
$var wire 1 G/ not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_15 $end
$var wire 1 Q# in [0] $end
$var wire 1 !$ in [1] $end
$var wire 1 [$ sram [0] $end
$var wire 1 \$ sram [1] $end
$var wire 1 >& sram_inv [0] $end
$var wire 1 ?& sram_inv [1] $end
$var wire 1 C$ out [0] $end
$var wire 1 ;& p0 $end
$var wire 1 H/ sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 I/ sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 J/ BUF_net_76 $end

$scope module mux_l1_in_0_ $end
$var wire 1 H/ X $end
$var wire 1 !$ A0 $end
$var wire 1 Q# A1 $end
$var wire 1 [$ S $end
$var supply1 1 K/ VPWR $end
$var supply0 1 L/ VGND $end
$var supply1 1 M/ VPB $end
$var supply0 1 N/ VNB $end

$scope module base $end
$var wire 1 H/ X $end
$var wire 1 !$ A0 $end
$var wire 1 Q# A1 $end
$var wire 1 [$ S $end
$var wire 1 O/ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 I/ X $end
$var wire 1 ;& A0 $end
$var wire 1 H/ A1 $end
$var wire 1 \$ S $end
$var supply1 1 P/ VPWR $end
$var supply0 1 Q/ VGND $end
$var supply1 1 R/ VPB $end
$var supply0 1 S/ VNB $end

$scope module base $end
$var wire 1 I/ X $end
$var wire 1 ;& A0 $end
$var wire 1 H/ A1 $end
$var wire 1 \$ S $end
$var wire 1 T/ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_75 $end
$var wire 1 C$ Y $end
$var wire 1 J/ A $end
$var supply1 1 U/ VPWR $end
$var supply0 1 V/ VGND $end
$var supply1 1 W/ VPB $end
$var supply0 1 X/ VNB $end

$scope module base $end
$var wire 1 C$ Y $end
$var wire 1 J/ A $end
$var wire 1 Y/ not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_76 $end
$var wire 1 J/ Y $end
$var wire 1 I/ A $end
$var supply1 1 Z/ VPWR $end
$var supply0 1 [/ VGND $end
$var supply1 1 \/ VPB $end
$var supply0 1 ]/ VNB $end

$scope module base $end
$var wire 1 J/ Y $end
$var wire 1 I/ A $end
$var wire 1 ^/ not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_17 $end
$var wire 1 R# in [0] $end
$var wire 1 "$ in [1] $end
$var wire 1 ]$ sram [0] $end
$var wire 1 ^$ sram [1] $end
$var wire 1 @& sram_inv [0] $end
$var wire 1 A& sram_inv [1] $end
$var wire 1 D$ out [0] $end
$var wire 1 r% p0 $end
$var wire 1 _/ sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 `/ sky130_fd_sc_hd__mux2_1_1_X [0] $end

$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 D$ X $end
$var wire 1 `/ A $end
$var supply1 1 a/ VPWR $end
$var supply0 1 b/ VGND $end
$var supply1 1 c/ VPB $end
$var supply0 1 d/ VNB $end

$scope module base $end
$var wire 1 D$ X $end
$var wire 1 `/ A $end
$var wire 1 e/ buf0_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_0_ $end
$var wire 1 _/ X $end
$var wire 1 "$ A0 $end
$var wire 1 R# A1 $end
$var wire 1 ]$ S $end
$var supply1 1 f/ VPWR $end
$var supply0 1 g/ VGND $end
$var supply1 1 h/ VPB $end
$var supply0 1 i/ VNB $end

$scope module base $end
$var wire 1 _/ X $end
$var wire 1 "$ A0 $end
$var wire 1 R# A1 $end
$var wire 1 ]$ S $end
$var wire 1 j/ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 `/ X $end
$var wire 1 r% A0 $end
$var wire 1 _/ A1 $end
$var wire 1 ^$ S $end
$var supply1 1 k/ VPWR $end
$var supply0 1 l/ VGND $end
$var supply1 1 m/ VPB $end
$var supply0 1 n/ VNB $end

$scope module base $end
$var wire 1 `/ X $end
$var wire 1 r% A0 $end
$var wire 1 _/ A1 $end
$var wire 1 ^$ S $end
$var wire 1 o/ mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_19 $end
$var wire 1 S# in [0] $end
$var wire 1 #$ in [1] $end
$var wire 1 _$ sram [0] $end
$var wire 1 `$ sram [1] $end
$var wire 1 B& sram_inv [0] $end
$var wire 1 C& sram_inv [1] $end
$var wire 1 E$ out [0] $end
$var wire 1 ;& p0 $end
$var wire 1 p/ sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 q/ sky130_fd_sc_hd__mux2_1_1_X [0] $end

$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 E$ X $end
$var wire 1 q/ A $end
$var supply1 1 r/ VPWR $end
$var supply0 1 s/ VGND $end
$var supply1 1 t/ VPB $end
$var supply0 1 u/ VNB $end

$scope module base $end
$var wire 1 E$ X $end
$var wire 1 q/ A $end
$var wire 1 v/ buf0_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_0_ $end
$var wire 1 p/ X $end
$var wire 1 #$ A0 $end
$var wire 1 S# A1 $end
$var wire 1 _$ S $end
$var supply1 1 w/ VPWR $end
$var supply0 1 x/ VGND $end
$var supply1 1 y/ VPB $end
$var supply0 1 z/ VNB $end

$scope module base $end
$var wire 1 p/ X $end
$var wire 1 #$ A0 $end
$var wire 1 S# A1 $end
$var wire 1 _$ S $end
$var wire 1 {/ mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 q/ X $end
$var wire 1 ;& A0 $end
$var wire 1 p/ A1 $end
$var wire 1 `$ S $end
$var supply1 1 |/ VPWR $end
$var supply0 1 }/ VGND $end
$var supply1 1 ~/ VPB $end
$var supply0 1 !0 VNB $end

$scope module base $end
$var wire 1 q/ X $end
$var wire 1 ;& A0 $end
$var wire 1 p/ A1 $end
$var wire 1 `$ S $end
$var wire 1 "0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_21 $end
$var wire 1 T# in [0] $end
$var wire 1 $$ in [1] $end
$var wire 1 a$ sram [0] $end
$var wire 1 b$ sram [1] $end
$var wire 1 D& sram_inv [0] $end
$var wire 1 E& sram_inv [1] $end
$var wire 1 F$ out [0] $end
$var wire 1 j% p0 $end
$var wire 1 #0 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 $0 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 %0 BUF_net_78 $end

$scope module mux_l1_in_0_ $end
$var wire 1 #0 X $end
$var wire 1 $$ A0 $end
$var wire 1 T# A1 $end
$var wire 1 a$ S $end
$var supply1 1 &0 VPWR $end
$var supply0 1 '0 VGND $end
$var supply1 1 (0 VPB $end
$var supply0 1 )0 VNB $end

$scope module base $end
$var wire 1 #0 X $end
$var wire 1 $$ A0 $end
$var wire 1 T# A1 $end
$var wire 1 a$ S $end
$var wire 1 *0 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 $0 X $end
$var wire 1 j% A0 $end
$var wire 1 #0 A1 $end
$var wire 1 b$ S $end
$var supply1 1 +0 VPWR $end
$var supply0 1 ,0 VGND $end
$var supply1 1 -0 VPB $end
$var supply0 1 .0 VNB $end

$scope module base $end
$var wire 1 $0 X $end
$var wire 1 j% A0 $end
$var wire 1 #0 A1 $end
$var wire 1 b$ S $end
$var wire 1 /0 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_77 $end
$var wire 1 F$ Y $end
$var wire 1 %0 A $end
$var supply1 1 00 VPWR $end
$var supply0 1 10 VGND $end
$var supply1 1 20 VPB $end
$var supply0 1 30 VNB $end

$scope module base $end
$var wire 1 F$ Y $end
$var wire 1 %0 A $end
$var wire 1 40 not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_78 $end
$var wire 1 %0 Y $end
$var wire 1 $0 A $end
$var supply1 1 50 VPWR $end
$var supply0 1 60 VGND $end
$var supply1 1 70 VPB $end
$var supply0 1 80 VNB $end

$scope module base $end
$var wire 1 %0 Y $end
$var wire 1 $0 A $end
$var wire 1 90 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_23 $end
$var wire 1 U# in [0] $end
$var wire 1 %$ in [1] $end
$var wire 1 c$ sram [0] $end
$var wire 1 d$ sram [1] $end
$var wire 1 F& sram_inv [0] $end
$var wire 1 G& sram_inv [1] $end
$var wire 1 G$ out [0] $end
$var wire 1 ,& p0 $end
$var wire 1 :0 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 ;0 sky130_fd_sc_hd__mux2_1_1_X [0] $end

$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 G$ X $end
$var wire 1 ;0 A $end
$var supply1 1 <0 VPWR $end
$var supply0 1 =0 VGND $end
$var supply1 1 >0 VPB $end
$var supply0 1 ?0 VNB $end

$scope module base $end
$var wire 1 G$ X $end
$var wire 1 ;0 A $end
$var wire 1 @0 buf0_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_0_ $end
$var wire 1 :0 X $end
$var wire 1 %$ A0 $end
$var wire 1 U# A1 $end
$var wire 1 c$ S $end
$var supply1 1 A0 VPWR $end
$var supply0 1 B0 VGND $end
$var supply1 1 C0 VPB $end
$var supply0 1 D0 VNB $end

$scope module base $end
$var wire 1 :0 X $end
$var wire 1 %$ A0 $end
$var wire 1 U# A1 $end
$var wire 1 c$ S $end
$var wire 1 E0 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 ;0 X $end
$var wire 1 ,& A0 $end
$var wire 1 :0 A1 $end
$var wire 1 d$ S $end
$var supply1 1 F0 VPWR $end
$var supply0 1 G0 VGND $end
$var supply1 1 H0 VPB $end
$var supply0 1 I0 VNB $end

$scope module base $end
$var wire 1 ;0 X $end
$var wire 1 ,& A0 $end
$var wire 1 :0 A1 $end
$var wire 1 d$ S $end
$var wire 1 J0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_27 $end
$var wire 1 W# in [0] $end
$var wire 1 }# in [1] $end
$var wire 1 e$ sram [0] $end
$var wire 1 f$ sram [1] $end
$var wire 1 H& sram_inv [0] $end
$var wire 1 I& sram_inv [1] $end
$var wire 1 I$ out [0] $end
$var wire 1 ;& p0 $end
$var wire 1 K0 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 L0 sky130_fd_sc_hd__mux2_1_1_X [0] $end

$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 I$ X $end
$var wire 1 L0 A $end
$var supply1 1 M0 VPWR $end
$var supply0 1 N0 VGND $end
$var supply1 1 O0 VPB $end
$var supply0 1 P0 VNB $end

$scope module base $end
$var wire 1 I$ X $end
$var wire 1 L0 A $end
$var wire 1 Q0 buf0_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_0_ $end
$var wire 1 K0 X $end
$var wire 1 }# A0 $end
$var wire 1 W# A1 $end
$var wire 1 e$ S $end
$var supply1 1 R0 VPWR $end
$var supply0 1 S0 VGND $end
$var supply1 1 T0 VPB $end
$var supply0 1 U0 VNB $end

$scope module base $end
$var wire 1 K0 X $end
$var wire 1 }# A0 $end
$var wire 1 W# A1 $end
$var wire 1 e$ S $end
$var wire 1 V0 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 L0 X $end
$var wire 1 ;& A0 $end
$var wire 1 K0 A1 $end
$var wire 1 f$ S $end
$var supply1 1 W0 VPWR $end
$var supply0 1 X0 VGND $end
$var supply1 1 Y0 VPB $end
$var supply0 1 Z0 VNB $end

$scope module base $end
$var wire 1 L0 X $end
$var wire 1 ;& A0 $end
$var wire 1 K0 A1 $end
$var wire 1 f$ S $end
$var wire 1 [0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_29 $end
$var wire 1 X# in [0] $end
$var wire 1 ~# in [1] $end
$var wire 1 g$ sram [0] $end
$var wire 1 h$ sram [1] $end
$var wire 1 J& sram_inv [0] $end
$var wire 1 K& sram_inv [1] $end
$var wire 1 J$ out [0] $end
$var wire 1 ;& p0 $end
$var wire 1 \0 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 ]0 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 ^0 BUF_net_80 $end

$scope module mux_l1_in_0_ $end
$var wire 1 \0 X $end
$var wire 1 ~# A0 $end
$var wire 1 X# A1 $end
$var wire 1 g$ S $end
$var supply1 1 _0 VPWR $end
$var supply0 1 `0 VGND $end
$var supply1 1 a0 VPB $end
$var supply0 1 b0 VNB $end

$scope module base $end
$var wire 1 \0 X $end
$var wire 1 ~# A0 $end
$var wire 1 X# A1 $end
$var wire 1 g$ S $end
$var wire 1 c0 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 ]0 X $end
$var wire 1 ;& A0 $end
$var wire 1 \0 A1 $end
$var wire 1 h$ S $end
$var supply1 1 d0 VPWR $end
$var supply0 1 e0 VGND $end
$var supply1 1 f0 VPB $end
$var supply0 1 g0 VNB $end

$scope module base $end
$var wire 1 ]0 X $end
$var wire 1 ;& A0 $end
$var wire 1 \0 A1 $end
$var wire 1 h$ S $end
$var wire 1 h0 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_79 $end
$var wire 1 J$ Y $end
$var wire 1 ^0 A $end
$var supply1 1 i0 VPWR $end
$var supply0 1 j0 VGND $end
$var supply1 1 k0 VPB $end
$var supply0 1 l0 VNB $end

$scope module base $end
$var wire 1 J$ Y $end
$var wire 1 ^0 A $end
$var wire 1 m0 not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_80 $end
$var wire 1 ^0 Y $end
$var wire 1 ]0 A $end
$var supply1 1 n0 VPWR $end
$var supply0 1 o0 VGND $end
$var supply1 1 p0 VPB $end
$var supply0 1 q0 VNB $end

$scope module base $end
$var wire 1 ^0 Y $end
$var wire 1 ]0 A $end
$var wire 1 r0 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_31 $end
$var wire 1 Y# in [0] $end
$var wire 1 !$ in [1] $end
$var wire 1 i$ sram [0] $end
$var wire 1 j$ sram [1] $end
$var wire 1 L& sram_inv [0] $end
$var wire 1 M& sram_inv [1] $end
$var wire 1 K$ out [0] $end
$var wire 1 ;& p0 $end
$var wire 1 s0 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 t0 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 u0 BUF_net_82 $end

$scope module mux_l1_in_0_ $end
$var wire 1 s0 X $end
$var wire 1 !$ A0 $end
$var wire 1 Y# A1 $end
$var wire 1 i$ S $end
$var supply1 1 v0 VPWR $end
$var supply0 1 w0 VGND $end
$var supply1 1 x0 VPB $end
$var supply0 1 y0 VNB $end

$scope module base $end
$var wire 1 s0 X $end
$var wire 1 !$ A0 $end
$var wire 1 Y# A1 $end
$var wire 1 i$ S $end
$var wire 1 z0 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 t0 X $end
$var wire 1 ;& A0 $end
$var wire 1 s0 A1 $end
$var wire 1 j$ S $end
$var supply1 1 {0 VPWR $end
$var supply0 1 |0 VGND $end
$var supply1 1 }0 VPB $end
$var supply0 1 ~0 VNB $end

$scope module base $end
$var wire 1 t0 X $end
$var wire 1 ;& A0 $end
$var wire 1 s0 A1 $end
$var wire 1 j$ S $end
$var wire 1 !1 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_81 $end
$var wire 1 K$ Y $end
$var wire 1 u0 A $end
$var supply1 1 "1 VPWR $end
$var supply0 1 #1 VGND $end
$var supply1 1 $1 VPB $end
$var supply0 1 %1 VNB $end

$scope module base $end
$var wire 1 K$ Y $end
$var wire 1 u0 A $end
$var wire 1 &1 not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_82 $end
$var wire 1 u0 Y $end
$var wire 1 t0 A $end
$var supply1 1 '1 VPWR $end
$var supply0 1 (1 VGND $end
$var supply1 1 )1 VPB $end
$var supply0 1 *1 VNB $end

$scope module base $end
$var wire 1 u0 Y $end
$var wire 1 t0 A $end
$var wire 1 +1 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_33 $end
$var wire 1 Z# in [0] $end
$var wire 1 "$ in [1] $end
$var wire 1 m$ sram [0] $end
$var wire 1 n$ sram [1] $end
$var wire 1 N& sram_inv [0] $end
$var wire 1 O& sram_inv [1] $end
$var wire 1 L$ out [0] $end
$var wire 1 ;& p0 $end
$var wire 1 ,1 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 -1 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 .1 BUF_net_84 $end

$scope module mux_l1_in_0_ $end
$var wire 1 ,1 X $end
$var wire 1 "$ A0 $end
$var wire 1 Z# A1 $end
$var wire 1 m$ S $end
$var supply1 1 /1 VPWR $end
$var supply0 1 01 VGND $end
$var supply1 1 11 VPB $end
$var supply0 1 21 VNB $end

$scope module base $end
$var wire 1 ,1 X $end
$var wire 1 "$ A0 $end
$var wire 1 Z# A1 $end
$var wire 1 m$ S $end
$var wire 1 31 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 -1 X $end
$var wire 1 ;& A0 $end
$var wire 1 ,1 A1 $end
$var wire 1 n$ S $end
$var supply1 1 41 VPWR $end
$var supply0 1 51 VGND $end
$var supply1 1 61 VPB $end
$var supply0 1 71 VNB $end

$scope module base $end
$var wire 1 -1 X $end
$var wire 1 ;& A0 $end
$var wire 1 ,1 A1 $end
$var wire 1 n$ S $end
$var wire 1 81 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_83 $end
$var wire 1 L$ Y $end
$var wire 1 .1 A $end
$var supply1 1 91 VPWR $end
$var supply0 1 :1 VGND $end
$var supply1 1 ;1 VPB $end
$var supply0 1 <1 VNB $end

$scope module base $end
$var wire 1 L$ Y $end
$var wire 1 .1 A $end
$var wire 1 =1 not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_84 $end
$var wire 1 .1 Y $end
$var wire 1 -1 A $end
$var supply1 1 >1 VPWR $end
$var supply0 1 ?1 VGND $end
$var supply1 1 @1 VPB $end
$var supply0 1 A1 VNB $end

$scope module base $end
$var wire 1 .1 Y $end
$var wire 1 -1 A $end
$var wire 1 B1 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_35 $end
$var wire 1 [# in [0] $end
$var wire 1 #$ in [1] $end
$var wire 1 o$ sram [0] $end
$var wire 1 p$ sram [1] $end
$var wire 1 P& sram_inv [0] $end
$var wire 1 Q& sram_inv [1] $end
$var wire 1 M$ out [0] $end
$var wire 1 ;& p0 $end
$var wire 1 C1 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 D1 sky130_fd_sc_hd__mux2_1_1_X [0] $end

$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 M$ X $end
$var wire 1 D1 A $end
$var supply1 1 E1 VPWR $end
$var supply0 1 F1 VGND $end
$var supply1 1 G1 VPB $end
$var supply0 1 H1 VNB $end

$scope module base $end
$var wire 1 M$ X $end
$var wire 1 D1 A $end
$var wire 1 I1 buf0_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_0_ $end
$var wire 1 C1 X $end
$var wire 1 #$ A0 $end
$var wire 1 [# A1 $end
$var wire 1 o$ S $end
$var supply1 1 J1 VPWR $end
$var supply0 1 K1 VGND $end
$var supply1 1 L1 VPB $end
$var supply0 1 M1 VNB $end

$scope module base $end
$var wire 1 C1 X $end
$var wire 1 #$ A0 $end
$var wire 1 [# A1 $end
$var wire 1 o$ S $end
$var wire 1 N1 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 D1 X $end
$var wire 1 ;& A0 $end
$var wire 1 C1 A1 $end
$var wire 1 p$ S $end
$var supply1 1 O1 VPWR $end
$var supply0 1 P1 VGND $end
$var supply1 1 Q1 VPB $end
$var supply0 1 R1 VNB $end

$scope module base $end
$var wire 1 D1 X $end
$var wire 1 ;& A0 $end
$var wire 1 C1 A1 $end
$var wire 1 p$ S $end
$var wire 1 S1 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_37 $end
$var wire 1 \# in [0] $end
$var wire 1 $$ in [1] $end
$var wire 1 q$ sram [0] $end
$var wire 1 r$ sram [1] $end
$var wire 1 R& sram_inv [0] $end
$var wire 1 S& sram_inv [1] $end
$var wire 1 N$ out [0] $end
$var wire 1 ;& p0 $end
$var wire 1 T1 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 U1 sky130_fd_sc_hd__mux2_1_1_X [0] $end

$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 N$ X $end
$var wire 1 U1 A $end
$var supply1 1 V1 VPWR $end
$var supply0 1 W1 VGND $end
$var supply1 1 X1 VPB $end
$var supply0 1 Y1 VNB $end

$scope module base $end
$var wire 1 N$ X $end
$var wire 1 U1 A $end
$var wire 1 Z1 buf0_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_0_ $end
$var wire 1 T1 X $end
$var wire 1 $$ A0 $end
$var wire 1 \# A1 $end
$var wire 1 q$ S $end
$var supply1 1 [1 VPWR $end
$var supply0 1 \1 VGND $end
$var supply1 1 ]1 VPB $end
$var supply0 1 ^1 VNB $end

$scope module base $end
$var wire 1 T1 X $end
$var wire 1 $$ A0 $end
$var wire 1 \# A1 $end
$var wire 1 q$ S $end
$var wire 1 _1 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 U1 X $end
$var wire 1 ;& A0 $end
$var wire 1 T1 A1 $end
$var wire 1 r$ S $end
$var supply1 1 `1 VPWR $end
$var supply0 1 a1 VGND $end
$var supply1 1 b1 VPB $end
$var supply0 1 c1 VNB $end

$scope module base $end
$var wire 1 U1 X $end
$var wire 1 ;& A0 $end
$var wire 1 T1 A1 $end
$var wire 1 r$ S $end
$var wire 1 d1 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_39 $end
$var wire 1 ]# in [0] $end
$var wire 1 %$ in [1] $end
$var wire 1 s$ sram [0] $end
$var wire 1 t$ sram [1] $end
$var wire 1 T& sram_inv [0] $end
$var wire 1 U& sram_inv [1] $end
$var wire 1 O$ out [0] $end
$var wire 1 ,& p0 $end
$var wire 1 e1 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 f1 sky130_fd_sc_hd__mux2_1_1_X [0] $end

$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 O$ X $end
$var wire 1 f1 A $end
$var supply1 1 g1 VPWR $end
$var supply0 1 h1 VGND $end
$var supply1 1 i1 VPB $end
$var supply0 1 j1 VNB $end

$scope module base $end
$var wire 1 O$ X $end
$var wire 1 f1 A $end
$var wire 1 k1 buf0_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_0_ $end
$var wire 1 e1 X $end
$var wire 1 %$ A0 $end
$var wire 1 ]# A1 $end
$var wire 1 s$ S $end
$var supply1 1 l1 VPWR $end
$var supply0 1 m1 VGND $end
$var supply1 1 n1 VPB $end
$var supply0 1 o1 VNB $end

$scope module base $end
$var wire 1 e1 X $end
$var wire 1 %$ A0 $end
$var wire 1 ]# A1 $end
$var wire 1 s$ S $end
$var wire 1 p1 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 f1 X $end
$var wire 1 ,& A0 $end
$var wire 1 e1 A1 $end
$var wire 1 t$ S $end
$var supply1 1 q1 VPWR $end
$var supply0 1 r1 VGND $end
$var supply1 1 s1 VPB $end
$var supply0 1 t1 VNB $end

$scope module base $end
$var wire 1 f1 X $end
$var wire 1 ,& A0 $end
$var wire 1 e1 A1 $end
$var wire 1 t$ S $end
$var wire 1 u1 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_9 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 T% ccff_head [0] $end
$var wire 1 '% ccff_tail [0] $end
$var wire 1 U$ mem_out [0] $end
$var wire 1 V$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 U$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 T% D $end
$var supply1 1 v1 VPWR $end
$var supply0 1 w1 VGND $end
$var supply1 1 x1 VPB $end
$var supply0 1 y1 VNB $end

$scope module base $end
$var wire 1 U$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 T% D $end
$var wire 1 z1 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 V$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 U$ D $end
$var supply1 1 {1 VPWR $end
$var supply0 1 |1 VGND $end
$var supply1 1 }1 VPB $end
$var supply0 1 ~1 VNB $end

$scope module base $end
$var wire 1 V$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 U$ D $end
$var wire 1 !2 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_9__8 $end
$var wire 1 '% X $end
$var wire 1 V$ A $end
$var supply1 1 "2 VPWR $end
$var supply0 1 #2 VGND $end
$var supply1 1 $2 VPB $end
$var supply0 1 %2 VNB $end

$scope module base $end
$var wire 1 '% X $end
$var wire 1 V$ A $end
$var wire 1 &2 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_11 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 '% ccff_head [0] $end
$var wire 1 2% ccff_tail [0] $end
$var wire 1 k$ mem_out [0] $end
$var wire 1 l$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 k$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 '% D $end
$var supply1 1 '2 VPWR $end
$var supply0 1 (2 VGND $end
$var supply1 1 )2 VPB $end
$var supply0 1 *2 VNB $end

$scope module base $end
$var wire 1 k$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 '% D $end
$var wire 1 +2 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 l$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 k$ D $end
$var supply1 1 ,2 VPWR $end
$var supply0 1 -2 VGND $end
$var supply1 1 .2 VPB $end
$var supply0 1 /2 VNB $end

$scope module base $end
$var wire 1 l$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 k$ D $end
$var wire 1 02 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_10__9 $end
$var wire 1 2% X $end
$var wire 1 l$ A $end
$var supply1 1 12 VPWR $end
$var supply0 1 22 VGND $end
$var supply1 1 32 VPB $end
$var supply0 1 42 VNB $end

$scope module base $end
$var wire 1 2% X $end
$var wire 1 l$ A $end
$var wire 1 52 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_13 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 2% ccff_head [0] $end
$var wire 1 6% ccff_tail [0] $end
$var wire 1 u$ mem_out [0] $end
$var wire 1 v$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 u$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 2% D $end
$var supply1 1 62 VPWR $end
$var supply0 1 72 VGND $end
$var supply1 1 82 VPB $end
$var supply0 1 92 VNB $end

$scope module base $end
$var wire 1 u$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 2% D $end
$var wire 1 :2 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 v$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 u$ D $end
$var supply1 1 ;2 VPWR $end
$var supply0 1 <2 VGND $end
$var supply1 1 =2 VPB $end
$var supply0 1 >2 VNB $end

$scope module base $end
$var wire 1 v$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 u$ D $end
$var wire 1 ?2 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_11__10 $end
$var wire 1 6% X $end
$var wire 1 v$ A $end
$var supply1 1 @2 VPWR $end
$var supply0 1 A2 VGND $end
$var supply1 1 B2 VPB $end
$var supply0 1 C2 VNB $end

$scope module base $end
$var wire 1 6% X $end
$var wire 1 v$ A $end
$var wire 1 D2 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_15 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 6% ccff_head [0] $end
$var wire 1 7% ccff_tail [0] $end
$var wire 1 w$ mem_out [0] $end
$var wire 1 x$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 w$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 6% D $end
$var supply1 1 E2 VPWR $end
$var supply0 1 F2 VGND $end
$var supply1 1 G2 VPB $end
$var supply0 1 H2 VNB $end

$scope module base $end
$var wire 1 w$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 6% D $end
$var wire 1 I2 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 x$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 w$ D $end
$var supply1 1 J2 VPWR $end
$var supply0 1 K2 VGND $end
$var supply1 1 L2 VPB $end
$var supply0 1 M2 VNB $end

$scope module base $end
$var wire 1 x$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 w$ D $end
$var wire 1 N2 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_12__11 $end
$var wire 1 7% X $end
$var wire 1 x$ A $end
$var supply1 1 O2 VPWR $end
$var supply0 1 P2 VGND $end
$var supply1 1 Q2 VPB $end
$var supply0 1 R2 VNB $end

$scope module base $end
$var wire 1 7% X $end
$var wire 1 x$ A $end
$var wire 1 S2 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_17 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 7% ccff_head [0] $end
$var wire 1 8% ccff_tail [0] $end
$var wire 1 y$ mem_out [0] $end
$var wire 1 z$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 y$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 7% D $end
$var supply1 1 T2 VPWR $end
$var supply0 1 U2 VGND $end
$var supply1 1 V2 VPB $end
$var supply0 1 W2 VNB $end

$scope module base $end
$var wire 1 y$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 7% D $end
$var wire 1 X2 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 z$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 y$ D $end
$var supply1 1 Y2 VPWR $end
$var supply0 1 Z2 VGND $end
$var supply1 1 [2 VPB $end
$var supply0 1 \2 VNB $end

$scope module base $end
$var wire 1 z$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 y$ D $end
$var wire 1 ]2 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_13__12 $end
$var wire 1 8% X $end
$var wire 1 z$ A $end
$var supply1 1 ^2 VPWR $end
$var supply0 1 _2 VGND $end
$var supply1 1 `2 VPB $end
$var supply0 1 a2 VNB $end

$scope module base $end
$var wire 1 8% X $end
$var wire 1 z$ A $end
$var wire 1 b2 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_19 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 8% ccff_head [0] $end
$var wire 1 9% ccff_tail [0] $end
$var wire 1 {$ mem_out [0] $end
$var wire 1 |$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 {$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 8% D $end
$var supply1 1 c2 VPWR $end
$var supply0 1 d2 VGND $end
$var supply1 1 e2 VPB $end
$var supply0 1 f2 VNB $end

$scope module base $end
$var wire 1 {$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 8% D $end
$var wire 1 g2 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 |$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 {$ D $end
$var supply1 1 h2 VPWR $end
$var supply0 1 i2 VGND $end
$var supply1 1 j2 VPB $end
$var supply0 1 k2 VNB $end

$scope module base $end
$var wire 1 |$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 {$ D $end
$var wire 1 l2 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_14__13 $end
$var wire 1 9% X $end
$var wire 1 |$ A $end
$var supply1 1 m2 VPWR $end
$var supply0 1 n2 VGND $end
$var supply1 1 o2 VPB $end
$var supply0 1 p2 VNB $end

$scope module base $end
$var wire 1 9% X $end
$var wire 1 |$ A $end
$var wire 1 q2 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_21 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 9% ccff_head [0] $end
$var wire 1 :% ccff_tail [0] $end
$var wire 1 }$ mem_out [0] $end
$var wire 1 ~$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 }$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 9% D $end
$var supply1 1 r2 VPWR $end
$var supply0 1 s2 VGND $end
$var supply1 1 t2 VPB $end
$var supply0 1 u2 VNB $end

$scope module base $end
$var wire 1 }$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 9% D $end
$var wire 1 v2 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 ~$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 }$ D $end
$var supply1 1 w2 VPWR $end
$var supply0 1 x2 VGND $end
$var supply1 1 y2 VPB $end
$var supply0 1 z2 VNB $end

$scope module base $end
$var wire 1 ~$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 }$ D $end
$var wire 1 {2 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_15__14 $end
$var wire 1 :% X $end
$var wire 1 ~$ A $end
$var supply1 1 |2 VPWR $end
$var supply0 1 }2 VGND $end
$var supply1 1 ~2 VPB $end
$var supply0 1 !3 VNB $end

$scope module base $end
$var wire 1 :% X $end
$var wire 1 ~$ A $end
$var wire 1 "3 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_23 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 :% ccff_head [0] $end
$var wire 1 ;% ccff_tail [0] $end
$var wire 1 !% mem_out [0] $end
$var wire 1 "% mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 !% Q $end
$var wire 1 S$ CLK $end
$var wire 1 :% D $end
$var supply1 1 #3 VPWR $end
$var supply0 1 $3 VGND $end
$var supply1 1 %3 VPB $end
$var supply0 1 &3 VNB $end

$scope module base $end
$var wire 1 !% Q $end
$var wire 1 S$ CLK $end
$var wire 1 :% D $end
$var wire 1 '3 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 "% Q $end
$var wire 1 S$ CLK $end
$var wire 1 !% D $end
$var supply1 1 (3 VPWR $end
$var supply0 1 )3 VGND $end
$var supply1 1 *3 VPB $end
$var supply0 1 +3 VNB $end

$scope module base $end
$var wire 1 "% Q $end
$var wire 1 S$ CLK $end
$var wire 1 !% D $end
$var wire 1 ,3 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_16__15 $end
$var wire 1 ;% X $end
$var wire 1 "% A $end
$var supply1 1 -3 VPWR $end
$var supply0 1 .3 VGND $end
$var supply1 1 /3 VPB $end
$var supply0 1 03 VNB $end

$scope module base $end
$var wire 1 ;% X $end
$var wire 1 "% A $end
$var wire 1 13 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_27 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 D% ccff_head [0] $end
$var wire 1 <% ccff_tail [0] $end
$var wire 1 #% mem_out [0] $end
$var wire 1 $% mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 #% Q $end
$var wire 1 S$ CLK $end
$var wire 1 D% D $end
$var supply1 1 23 VPWR $end
$var supply0 1 33 VGND $end
$var supply1 1 43 VPB $end
$var supply0 1 53 VNB $end

$scope module base $end
$var wire 1 #% Q $end
$var wire 1 S$ CLK $end
$var wire 1 D% D $end
$var wire 1 63 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 $% Q $end
$var wire 1 S$ CLK $end
$var wire 1 #% D $end
$var supply1 1 73 VPWR $end
$var supply0 1 83 VGND $end
$var supply1 1 93 VPB $end
$var supply0 1 :3 VNB $end

$scope module base $end
$var wire 1 $% Q $end
$var wire 1 S$ CLK $end
$var wire 1 #% D $end
$var wire 1 ;3 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_17__16 $end
$var wire 1 <% X $end
$var wire 1 $% A $end
$var supply1 1 <3 VPWR $end
$var supply0 1 =3 VGND $end
$var supply1 1 >3 VPB $end
$var supply0 1 ?3 VNB $end

$scope module base $end
$var wire 1 <% X $end
$var wire 1 $% A $end
$var wire 1 @3 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_29 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 <% ccff_head [0] $end
$var wire 1 =% ccff_tail [0] $end
$var wire 1 %% mem_out [0] $end
$var wire 1 &% mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 %% Q $end
$var wire 1 S$ CLK $end
$var wire 1 <% D $end
$var supply1 1 A3 VPWR $end
$var supply0 1 B3 VGND $end
$var supply1 1 C3 VPB $end
$var supply0 1 D3 VNB $end

$scope module base $end
$var wire 1 %% Q $end
$var wire 1 S$ CLK $end
$var wire 1 <% D $end
$var wire 1 E3 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 &% Q $end
$var wire 1 S$ CLK $end
$var wire 1 %% D $end
$var supply1 1 F3 VPWR $end
$var supply0 1 G3 VGND $end
$var supply1 1 H3 VPB $end
$var supply0 1 I3 VNB $end

$scope module base $end
$var wire 1 &% Q $end
$var wire 1 S$ CLK $end
$var wire 1 %% D $end
$var wire 1 J3 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_18__17 $end
$var wire 1 =% X $end
$var wire 1 &% A $end
$var supply1 1 K3 VPWR $end
$var supply0 1 L3 VGND $end
$var supply1 1 M3 VPB $end
$var supply0 1 N3 VNB $end

$scope module base $end
$var wire 1 =% X $end
$var wire 1 &% A $end
$var wire 1 O3 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_11 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 E% ccff_head [0] $end
$var wire 1 (% ccff_tail [0] $end
$var wire 1 W$ mem_out [0] $end
$var wire 1 X$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 W$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 E% D $end
$var supply1 1 P3 VPWR $end
$var supply0 1 Q3 VGND $end
$var supply1 1 R3 VPB $end
$var supply0 1 S3 VNB $end

$scope module base $end
$var wire 1 W$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 E% D $end
$var wire 1 T3 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 X$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 W$ D $end
$var supply1 1 U3 VPWR $end
$var supply0 1 V3 VGND $end
$var supply1 1 W3 VPB $end
$var supply0 1 X3 VNB $end

$scope module base $end
$var wire 1 X$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 W$ D $end
$var wire 1 Y3 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_19__18 $end
$var wire 1 (% X $end
$var wire 1 X$ A $end
$var supply1 1 Z3 VPWR $end
$var supply0 1 [3 VGND $end
$var supply1 1 \3 VPB $end
$var supply0 1 ]3 VNB $end

$scope module base $end
$var wire 1 (% X $end
$var wire 1 X$ A $end
$var wire 1 ^3 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_13 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 (% ccff_head [0] $end
$var wire 1 )% ccff_tail [0] $end
$var wire 1 Y$ mem_out [0] $end
$var wire 1 Z$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 Y$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 (% D $end
$var supply1 1 _3 VPWR $end
$var supply0 1 `3 VGND $end
$var supply1 1 a3 VPB $end
$var supply0 1 b3 VNB $end

$scope module base $end
$var wire 1 Y$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 (% D $end
$var wire 1 c3 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 Z$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 Y$ D $end
$var supply1 1 d3 VPWR $end
$var supply0 1 e3 VGND $end
$var supply1 1 f3 VPB $end
$var supply0 1 g3 VNB $end

$scope module base $end
$var wire 1 Z$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 Y$ D $end
$var wire 1 h3 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_20__19 $end
$var wire 1 )% X $end
$var wire 1 Z$ A $end
$var supply1 1 i3 VPWR $end
$var supply0 1 j3 VGND $end
$var supply1 1 k3 VPB $end
$var supply0 1 l3 VNB $end

$scope module base $end
$var wire 1 )% X $end
$var wire 1 Z$ A $end
$var wire 1 m3 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_15 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 )% ccff_head [0] $end
$var wire 1 *% ccff_tail [0] $end
$var wire 1 [$ mem_out [0] $end
$var wire 1 \$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 [$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 )% D $end
$var supply1 1 n3 VPWR $end
$var supply0 1 o3 VGND $end
$var supply1 1 p3 VPB $end
$var supply0 1 q3 VNB $end

$scope module base $end
$var wire 1 [$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 )% D $end
$var wire 1 r3 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 \$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 [$ D $end
$var supply1 1 s3 VPWR $end
$var supply0 1 t3 VGND $end
$var supply1 1 u3 VPB $end
$var supply0 1 v3 VNB $end

$scope module base $end
$var wire 1 \$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 [$ D $end
$var wire 1 w3 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_21__20 $end
$var wire 1 *% X $end
$var wire 1 \$ A $end
$var supply1 1 x3 VPWR $end
$var supply0 1 y3 VGND $end
$var supply1 1 z3 VPB $end
$var supply0 1 {3 VNB $end

$scope module base $end
$var wire 1 *% X $end
$var wire 1 \$ A $end
$var wire 1 |3 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_17 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 *% ccff_head [0] $end
$var wire 1 +% ccff_tail [0] $end
$var wire 1 ]$ mem_out [0] $end
$var wire 1 ^$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 ]$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 *% D $end
$var supply1 1 }3 VPWR $end
$var supply0 1 ~3 VGND $end
$var supply1 1 !4 VPB $end
$var supply0 1 "4 VNB $end

$scope module base $end
$var wire 1 ]$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 *% D $end
$var wire 1 #4 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 ^$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 ]$ D $end
$var supply1 1 $4 VPWR $end
$var supply0 1 %4 VGND $end
$var supply1 1 &4 VPB $end
$var supply0 1 '4 VNB $end

$scope module base $end
$var wire 1 ^$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 ]$ D $end
$var wire 1 (4 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_22__21 $end
$var wire 1 +% X $end
$var wire 1 ^$ A $end
$var supply1 1 )4 VPWR $end
$var supply0 1 *4 VGND $end
$var supply1 1 +4 VPB $end
$var supply0 1 ,4 VNB $end

$scope module base $end
$var wire 1 +% X $end
$var wire 1 ^$ A $end
$var wire 1 -4 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_19 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 +% ccff_head [0] $end
$var wire 1 ,% ccff_tail [0] $end
$var wire 1 _$ mem_out [0] $end
$var wire 1 `$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 _$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 +% D $end
$var supply1 1 .4 VPWR $end
$var supply0 1 /4 VGND $end
$var supply1 1 04 VPB $end
$var supply0 1 14 VNB $end

$scope module base $end
$var wire 1 _$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 +% D $end
$var wire 1 24 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 `$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 _$ D $end
$var supply1 1 34 VPWR $end
$var supply0 1 44 VGND $end
$var supply1 1 54 VPB $end
$var supply0 1 64 VNB $end

$scope module base $end
$var wire 1 `$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 _$ D $end
$var wire 1 74 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_23__22 $end
$var wire 1 ,% X $end
$var wire 1 `$ A $end
$var supply1 1 84 VPWR $end
$var supply0 1 94 VGND $end
$var supply1 1 :4 VPB $end
$var supply0 1 ;4 VNB $end

$scope module base $end
$var wire 1 ,% X $end
$var wire 1 `$ A $end
$var wire 1 <4 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_21 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 ,% ccff_head [0] $end
$var wire 1 -% ccff_tail [0] $end
$var wire 1 a$ mem_out [0] $end
$var wire 1 b$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 a$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 ,% D $end
$var supply1 1 =4 VPWR $end
$var supply0 1 >4 VGND $end
$var supply1 1 ?4 VPB $end
$var supply0 1 @4 VNB $end

$scope module base $end
$var wire 1 a$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 ,% D $end
$var wire 1 A4 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 b$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 a$ D $end
$var supply1 1 B4 VPWR $end
$var supply0 1 C4 VGND $end
$var supply1 1 D4 VPB $end
$var supply0 1 E4 VNB $end

$scope module base $end
$var wire 1 b$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 a$ D $end
$var wire 1 F4 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_24__23 $end
$var wire 1 -% X $end
$var wire 1 b$ A $end
$var supply1 1 G4 VPWR $end
$var supply0 1 H4 VGND $end
$var supply1 1 I4 VPB $end
$var supply0 1 J4 VNB $end

$scope module base $end
$var wire 1 -% X $end
$var wire 1 b$ A $end
$var wire 1 K4 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_23 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 -% ccff_head [0] $end
$var wire 1 .% ccff_tail [0] $end
$var wire 1 c$ mem_out [0] $end
$var wire 1 d$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 c$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 -% D $end
$var supply1 1 L4 VPWR $end
$var supply0 1 M4 VGND $end
$var supply1 1 N4 VPB $end
$var supply0 1 O4 VNB $end

$scope module base $end
$var wire 1 c$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 -% D $end
$var wire 1 P4 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 d$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 c$ D $end
$var supply1 1 Q4 VPWR $end
$var supply0 1 R4 VGND $end
$var supply1 1 S4 VPB $end
$var supply0 1 T4 VNB $end

$scope module base $end
$var wire 1 d$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 c$ D $end
$var wire 1 U4 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_25__24 $end
$var wire 1 .% X $end
$var wire 1 d$ A $end
$var supply1 1 V4 VPWR $end
$var supply0 1 W4 VGND $end
$var supply1 1 X4 VPB $end
$var supply0 1 Y4 VNB $end

$scope module base $end
$var wire 1 .% X $end
$var wire 1 d$ A $end
$var wire 1 Z4 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_27 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 F% ccff_head [0] $end
$var wire 1 /% ccff_tail [0] $end
$var wire 1 e$ mem_out [0] $end
$var wire 1 f$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 e$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 F% D $end
$var supply1 1 [4 VPWR $end
$var supply0 1 \4 VGND $end
$var supply1 1 ]4 VPB $end
$var supply0 1 ^4 VNB $end

$scope module base $end
$var wire 1 e$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 F% D $end
$var wire 1 _4 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 f$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 e$ D $end
$var supply1 1 `4 VPWR $end
$var supply0 1 a4 VGND $end
$var supply1 1 b4 VPB $end
$var supply0 1 c4 VNB $end

$scope module base $end
$var wire 1 f$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 e$ D $end
$var wire 1 d4 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_26__25 $end
$var wire 1 /% X $end
$var wire 1 f$ A $end
$var supply1 1 e4 VPWR $end
$var supply0 1 f4 VGND $end
$var supply1 1 g4 VPB $end
$var supply0 1 h4 VNB $end

$scope module base $end
$var wire 1 /% X $end
$var wire 1 f$ A $end
$var wire 1 i4 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_29 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 /% ccff_head [0] $end
$var wire 1 0% ccff_tail [0] $end
$var wire 1 g$ mem_out [0] $end
$var wire 1 h$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 g$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 /% D $end
$var supply1 1 j4 VPWR $end
$var supply0 1 k4 VGND $end
$var supply1 1 l4 VPB $end
$var supply0 1 m4 VNB $end

$scope module base $end
$var wire 1 g$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 /% D $end
$var wire 1 n4 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 h$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 g$ D $end
$var supply1 1 o4 VPWR $end
$var supply0 1 p4 VGND $end
$var supply1 1 q4 VPB $end
$var supply0 1 r4 VNB $end

$scope module base $end
$var wire 1 h$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 g$ D $end
$var wire 1 s4 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_27__26 $end
$var wire 1 0% X $end
$var wire 1 h$ A $end
$var supply1 1 t4 VPWR $end
$var supply0 1 u4 VGND $end
$var supply1 1 v4 VPB $end
$var supply0 1 w4 VNB $end

$scope module base $end
$var wire 1 0% X $end
$var wire 1 h$ A $end
$var wire 1 x4 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_31 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 0% ccff_head [0] $end
$var wire 1 1% ccff_tail [0] $end
$var wire 1 i$ mem_out [0] $end
$var wire 1 j$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 i$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 0% D $end
$var supply1 1 y4 VPWR $end
$var supply0 1 z4 VGND $end
$var supply1 1 {4 VPB $end
$var supply0 1 |4 VNB $end

$scope module base $end
$var wire 1 i$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 0% D $end
$var wire 1 }4 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 j$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 i$ D $end
$var supply1 1 ~4 VPWR $end
$var supply0 1 !5 VGND $end
$var supply1 1 "5 VPB $end
$var supply0 1 #5 VNB $end

$scope module base $end
$var wire 1 j$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 i$ D $end
$var wire 1 $5 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_28__27 $end
$var wire 1 1% X $end
$var wire 1 j$ A $end
$var supply1 1 %5 VPWR $end
$var supply0 1 &5 VGND $end
$var supply1 1 '5 VPB $end
$var supply0 1 (5 VNB $end

$scope module base $end
$var wire 1 1% X $end
$var wire 1 j$ A $end
$var wire 1 )5 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_33 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 1% ccff_head [0] $end
$var wire 1 3% ccff_tail [0] $end
$var wire 1 m$ mem_out [0] $end
$var wire 1 n$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 m$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 1% D $end
$var supply1 1 *5 VPWR $end
$var supply0 1 +5 VGND $end
$var supply1 1 ,5 VPB $end
$var supply0 1 -5 VNB $end

$scope module base $end
$var wire 1 m$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 1% D $end
$var wire 1 .5 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 n$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 m$ D $end
$var supply1 1 /5 VPWR $end
$var supply0 1 05 VGND $end
$var supply1 1 15 VPB $end
$var supply0 1 25 VNB $end

$scope module base $end
$var wire 1 n$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 m$ D $end
$var wire 1 35 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_29__28 $end
$var wire 1 3% X $end
$var wire 1 n$ A $end
$var supply1 1 45 VPWR $end
$var supply0 1 55 VGND $end
$var supply1 1 65 VPB $end
$var supply0 1 75 VNB $end

$scope module base $end
$var wire 1 3% X $end
$var wire 1 n$ A $end
$var wire 1 85 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_35 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 3% ccff_head [0] $end
$var wire 1 4% ccff_tail [0] $end
$var wire 1 o$ mem_out [0] $end
$var wire 1 p$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 o$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 3% D $end
$var supply1 1 95 VPWR $end
$var supply0 1 :5 VGND $end
$var supply1 1 ;5 VPB $end
$var supply0 1 <5 VNB $end

$scope module base $end
$var wire 1 o$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 3% D $end
$var wire 1 =5 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 p$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 o$ D $end
$var supply1 1 >5 VPWR $end
$var supply0 1 ?5 VGND $end
$var supply1 1 @5 VPB $end
$var supply0 1 A5 VNB $end

$scope module base $end
$var wire 1 p$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 o$ D $end
$var wire 1 B5 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_30__29 $end
$var wire 1 4% X $end
$var wire 1 p$ A $end
$var supply1 1 C5 VPWR $end
$var supply0 1 D5 VGND $end
$var supply1 1 E5 VPB $end
$var supply0 1 F5 VNB $end

$scope module base $end
$var wire 1 4% X $end
$var wire 1 p$ A $end
$var wire 1 G5 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_37 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 4% ccff_head [0] $end
$var wire 1 5% ccff_tail [0] $end
$var wire 1 q$ mem_out [0] $end
$var wire 1 r$ mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 q$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 4% D $end
$var supply1 1 H5 VPWR $end
$var supply0 1 I5 VGND $end
$var supply1 1 J5 VPB $end
$var supply0 1 K5 VNB $end

$scope module base $end
$var wire 1 q$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 4% D $end
$var wire 1 L5 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 r$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 q$ D $end
$var supply1 1 M5 VPWR $end
$var supply0 1 N5 VGND $end
$var supply1 1 O5 VPB $end
$var supply0 1 P5 VNB $end

$scope module base $end
$var wire 1 r$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 q$ D $end
$var wire 1 Q5 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_31__30 $end
$var wire 1 5% X $end
$var wire 1 r$ A $end
$var supply1 1 R5 VPWR $end
$var supply0 1 S5 VGND $end
$var supply1 1 T5 VPB $end
$var supply0 1 U5 VNB $end

$scope module base $end
$var wire 1 5% X $end
$var wire 1 r$ A $end
$var wire 1 V5 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_39 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 5% ccff_head [0] $end
$var wire 1 V& ccff_tail [0] $end
$var wire 1 s$ mem_out [0] $end
$var wire 1 t$ mem_out [1] $end
$var wire 1 W5 copt_net_107 $end
$var wire 1 X5 copt_net_102 $end
$var wire 1 Y5 copt_net_103 $end
$var wire 1 Z5 copt_net_105 $end
$var wire 1 [5 copt_net_104 $end
$var wire 1 \5 copt_net_106 $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 s$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 5% D $end
$var supply1 1 ]5 VPWR $end
$var supply0 1 ^5 VGND $end
$var supply1 1 _5 VPB $end
$var supply0 1 `5 VNB $end

$scope module base $end
$var wire 1 s$ Q $end
$var wire 1 S$ CLK $end
$var wire 1 5% D $end
$var wire 1 a5 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 W5 Q $end
$var wire 1 S$ CLK $end
$var wire 1 s$ D $end
$var supply1 1 b5 VPWR $end
$var supply0 1 c5 VGND $end
$var supply1 1 d5 VPB $end
$var supply0 1 e5 VNB $end

$scope module base $end
$var wire 1 W5 Q $end
$var wire 1 S$ CLK $end
$var wire 1 s$ D $end
$var wire 1 f5 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_32__31 $end
$var wire 1 V& X $end
$var wire 1 t$ A $end
$var supply1 1 g5 VPWR $end
$var supply0 1 h5 VGND $end
$var supply1 1 i5 VPB $end
$var supply0 1 j5 VNB $end

$scope module base $end
$var wire 1 V& X $end
$var wire 1 t$ A $end
$var wire 1 k5 buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1268 $end
$var wire 1 X5 X $end
$var wire 1 W5 A $end
$var supply1 1 l5 VPWR $end
$var supply0 1 m5 VGND $end
$var supply1 1 n5 VPB $end
$var supply0 1 o5 VNB $end

$scope module base $end
$var wire 1 X5 X $end
$var wire 1 W5 A $end
$var wire 1 p5 buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1269 $end
$var wire 1 Y5 X $end
$var wire 1 X5 A $end
$var supply1 1 q5 VPWR $end
$var supply0 1 r5 VGND $end
$var supply1 1 s5 VPB $end
$var supply0 1 t5 VNB $end

$scope module base $end
$var wire 1 Y5 X $end
$var wire 1 X5 A $end
$var wire 1 u5 buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1270 $end
$var wire 1 [5 X $end
$var wire 1 Z5 A $end
$var supply1 1 v5 VPWR $end
$var supply0 1 w5 VGND $end
$var supply1 1 x5 VPB $end
$var supply0 1 y5 VNB $end

$scope module base $end
$var wire 1 [5 X $end
$var wire 1 Z5 A $end
$var wire 1 z5 buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1271 $end
$var wire 1 Z5 X $end
$var wire 1 Y5 A $end
$var supply1 1 {5 VPWR $end
$var supply0 1 |5 VGND $end
$var supply1 1 }5 VPB $end
$var supply0 1 ~5 VNB $end

$scope module base $end
$var wire 1 Z5 X $end
$var wire 1 Y5 A $end
$var wire 1 !6 buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1272 $end
$var wire 1 \5 X $end
$var wire 1 [5 A $end
$var supply1 1 "6 VPWR $end
$var supply0 1 #6 VGND $end
$var supply1 1 $6 VPB $end
$var supply0 1 %6 VNB $end

$scope module base $end
$var wire 1 \5 X $end
$var wire 1 [5 A $end
$var wire 1 &6 buf0_out_X $end
$upscope $end
$upscope $end

$scope module copt_h_inst_1273 $end
$var wire 1 t$ X $end
$var wire 1 \5 A $end
$var supply1 1 '6 VPWR $end
$var supply0 1 (6 VGND $end
$var supply1 1 )6 VPB $end
$var supply0 1 *6 VNB $end

$scope module base $end
$var wire 1 t$ X $end
$var wire 1 \5 A $end
$var wire 1 +6 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_bottom_track_25 $end
$var wire 1 _# in [0] $end
$var wire 1 g# in [1] $end
$var wire 1 u# in [2] $end
$var wire 1 >% sram [0] $end
$var wire 1 ?% sram [1] $end
$var wire 1 W& sram_inv [0] $end
$var wire 1 X& sram_inv [1] $end
$var wire 1 4$ out [0] $end
$var wire 1 j% p0 $end
$var wire 1 ,6 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 -6 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 .6 sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 /6 BUF_net_86 $end

$scope module mux_l1_in_0_ $end
$var wire 1 ,6 X $end
$var wire 1 g# A0 $end
$var wire 1 _# A1 $end
$var wire 1 >% S $end
$var supply1 1 06 VPWR $end
$var supply0 1 16 VGND $end
$var supply1 1 26 VPB $end
$var supply0 1 36 VNB $end

$scope module base $end
$var wire 1 ,6 X $end
$var wire 1 g# A0 $end
$var wire 1 _# A1 $end
$var wire 1 >% S $end
$var wire 1 46 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 -6 X $end
$var wire 1 j% A0 $end
$var wire 1 u# A1 $end
$var wire 1 >% S $end
$var supply1 1 56 VPWR $end
$var supply0 1 66 VGND $end
$var supply1 1 76 VPB $end
$var supply0 1 86 VNB $end

$scope module base $end
$var wire 1 -6 X $end
$var wire 1 j% A0 $end
$var wire 1 u# A1 $end
$var wire 1 >% S $end
$var wire 1 96 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 .6 X $end
$var wire 1 -6 A0 $end
$var wire 1 ,6 A1 $end
$var wire 1 ?% S $end
$var supply1 1 :6 VPWR $end
$var supply0 1 ;6 VGND $end
$var supply1 1 <6 VPB $end
$var supply0 1 =6 VNB $end

$scope module base $end
$var wire 1 .6 X $end
$var wire 1 -6 A0 $end
$var wire 1 ,6 A1 $end
$var wire 1 ?% S $end
$var wire 1 >6 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_85 $end
$var wire 1 4$ Y $end
$var wire 1 /6 A $end
$var supply1 1 ?6 VPWR $end
$var supply0 1 @6 VGND $end
$var supply1 1 A6 VPB $end
$var supply0 1 B6 VNB $end

$scope module base $end
$var wire 1 4$ Y $end
$var wire 1 /6 A $end
$var wire 1 C6 not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_86 $end
$var wire 1 /6 Y $end
$var wire 1 .6 A $end
$var supply1 1 D6 VPWR $end
$var supply0 1 E6 VGND $end
$var supply1 1 F6 VPB $end
$var supply0 1 G6 VNB $end

$scope module base $end
$var wire 1 /6 Y $end
$var wire 1 .6 A $end
$var wire 1 H6 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_9 $end
$var wire 1 N# in [0] $end
$var wire 1 |# in [1] $end
$var wire 1 &$ in [2] $end
$var wire 1 @% sram [0] $end
$var wire 1 A% sram [1] $end
$var wire 1 Y& sram_inv [0] $end
$var wire 1 Z& sram_inv [1] $end
$var wire 1 @$ out [0] $end
$var wire 1 r% p0 $end
$var wire 1 I6 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 J6 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 K6 sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 L6 BUF_net_88 $end

$scope module mux_l1_in_0_ $end
$var wire 1 I6 X $end
$var wire 1 |# A0 $end
$var wire 1 N# A1 $end
$var wire 1 @% S $end
$var supply1 1 M6 VPWR $end
$var supply0 1 N6 VGND $end
$var supply1 1 O6 VPB $end
$var supply0 1 P6 VNB $end

$scope module base $end
$var wire 1 I6 X $end
$var wire 1 |# A0 $end
$var wire 1 N# A1 $end
$var wire 1 @% S $end
$var wire 1 Q6 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 J6 X $end
$var wire 1 r% A0 $end
$var wire 1 &$ A1 $end
$var wire 1 @% S $end
$var supply1 1 R6 VPWR $end
$var supply0 1 S6 VGND $end
$var supply1 1 T6 VPB $end
$var supply0 1 U6 VNB $end

$scope module base $end
$var wire 1 J6 X $end
$var wire 1 r% A0 $end
$var wire 1 &$ A1 $end
$var wire 1 @% S $end
$var wire 1 V6 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 K6 X $end
$var wire 1 J6 A0 $end
$var wire 1 I6 A1 $end
$var wire 1 A% S $end
$var supply1 1 W6 VPWR $end
$var supply0 1 X6 VGND $end
$var supply1 1 Y6 VPB $end
$var supply0 1 Z6 VNB $end

$scope module base $end
$var wire 1 K6 X $end
$var wire 1 J6 A0 $end
$var wire 1 I6 A1 $end
$var wire 1 A% S $end
$var wire 1 [6 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_87 $end
$var wire 1 @$ Y $end
$var wire 1 L6 A $end
$var supply1 1 \6 VPWR $end
$var supply0 1 ]6 VGND $end
$var supply1 1 ^6 VPB $end
$var supply0 1 _6 VNB $end

$scope module base $end
$var wire 1 @$ Y $end
$var wire 1 L6 A $end
$var wire 1 `6 not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_88 $end
$var wire 1 L6 Y $end
$var wire 1 K6 A $end
$var supply1 1 a6 VPWR $end
$var supply0 1 b6 VGND $end
$var supply1 1 c6 VPB $end
$var supply0 1 d6 VNB $end

$scope module base $end
$var wire 1 L6 Y $end
$var wire 1 K6 A $end
$var wire 1 e6 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mux_left_track_25 $end
$var wire 1 V# in [0] $end
$var wire 1 |# in [1] $end
$var wire 1 &$ in [2] $end
$var wire 1 B% sram [0] $end
$var wire 1 C% sram [1] $end
$var wire 1 [& sram_inv [0] $end
$var wire 1 \& sram_inv [1] $end
$var wire 1 H$ out [0] $end
$var wire 1 ;& p0 $end
$var wire 1 f6 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 g6 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 h6 sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 i6 BUF_net_90 $end

$scope module mux_l1_in_0_ $end
$var wire 1 f6 X $end
$var wire 1 |# A0 $end
$var wire 1 V# A1 $end
$var wire 1 B% S $end
$var supply1 1 j6 VPWR $end
$var supply0 1 k6 VGND $end
$var supply1 1 l6 VPB $end
$var supply0 1 m6 VNB $end

$scope module base $end
$var wire 1 f6 X $end
$var wire 1 |# A0 $end
$var wire 1 V# A1 $end
$var wire 1 B% S $end
$var wire 1 n6 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l1_in_1_ $end
$var wire 1 g6 X $end
$var wire 1 ;& A0 $end
$var wire 1 &$ A1 $end
$var wire 1 B% S $end
$var supply1 1 o6 VPWR $end
$var supply0 1 p6 VGND $end
$var supply1 1 q6 VPB $end
$var supply0 1 r6 VNB $end

$scope module base $end
$var wire 1 g6 X $end
$var wire 1 ;& A0 $end
$var wire 1 &$ A1 $end
$var wire 1 B% S $end
$var wire 1 s6 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module mux_l2_in_0_ $end
$var wire 1 h6 X $end
$var wire 1 g6 A0 $end
$var wire 1 f6 A1 $end
$var wire 1 C% S $end
$var supply1 1 t6 VPWR $end
$var supply0 1 u6 VGND $end
$var supply1 1 v6 VPB $end
$var supply0 1 w6 VNB $end

$scope module base $end
$var wire 1 h6 X $end
$var wire 1 g6 A0 $end
$var wire 1 f6 A1 $end
$var wire 1 C% S $end
$var wire 1 x6 mux_2to10_out_X $end
$upscope $end
$upscope $end

$scope module BINV_R_89 $end
$var wire 1 H$ Y $end
$var wire 1 i6 A $end
$var supply1 1 y6 VPWR $end
$var supply0 1 z6 VGND $end
$var supply1 1 {6 VPB $end
$var supply0 1 |6 VNB $end

$scope module base $end
$var wire 1 H$ Y $end
$var wire 1 i6 A $end
$var wire 1 }6 not0_out_Y $end
$upscope $end
$upscope $end

$scope module BINV_R_90 $end
$var wire 1 i6 Y $end
$var wire 1 h6 A $end
$var supply1 1 ~6 VPWR $end
$var supply0 1 !7 VGND $end
$var supply1 1 "7 VPB $end
$var supply0 1 #7 VNB $end

$scope module base $end
$var wire 1 i6 Y $end
$var wire 1 h6 A $end
$var wire 1 $7 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_bottom_track_25 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 ;% ccff_head [0] $end
$var wire 1 D% ccff_tail [0] $end
$var wire 1 >% mem_out [0] $end
$var wire 1 ?% mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 >% Q $end
$var wire 1 S$ CLK $end
$var wire 1 ;% D $end
$var supply1 1 %7 VPWR $end
$var supply0 1 &7 VGND $end
$var supply1 1 '7 VPB $end
$var supply0 1 (7 VNB $end

$scope module base $end
$var wire 1 >% Q $end
$var wire 1 S$ CLK $end
$var wire 1 ;% D $end
$var wire 1 )7 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 ?% Q $end
$var wire 1 S$ CLK $end
$var wire 1 >% D $end
$var supply1 1 *7 VPWR $end
$var supply0 1 +7 VGND $end
$var supply1 1 ,7 VPB $end
$var supply0 1 -7 VNB $end

$scope module base $end
$var wire 1 ?% Q $end
$var wire 1 S$ CLK $end
$var wire 1 >% D $end
$var wire 1 .7 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_33__32 $end
$var wire 1 D% X $end
$var wire 1 ?% A $end
$var supply1 1 /7 VPWR $end
$var supply0 1 07 VGND $end
$var supply1 1 17 VPB $end
$var supply0 1 27 VNB $end

$scope module base $end
$var wire 1 D% X $end
$var wire 1 ?% A $end
$var wire 1 37 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_9 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 V% ccff_head [0] $end
$var wire 1 E% ccff_tail [0] $end
$var wire 1 @% mem_out [0] $end
$var wire 1 A% mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 @% Q $end
$var wire 1 S$ CLK $end
$var wire 1 V% D $end
$var supply1 1 47 VPWR $end
$var supply0 1 57 VGND $end
$var supply1 1 67 VPB $end
$var supply0 1 77 VNB $end

$scope module base $end
$var wire 1 @% Q $end
$var wire 1 S$ CLK $end
$var wire 1 V% D $end
$var wire 1 87 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 A% Q $end
$var wire 1 S$ CLK $end
$var wire 1 @% D $end
$var supply1 1 97 VPWR $end
$var supply0 1 :7 VGND $end
$var supply1 1 ;7 VPB $end
$var supply0 1 <7 VNB $end

$scope module base $end
$var wire 1 A% Q $end
$var wire 1 S$ CLK $end
$var wire 1 @% D $end
$var wire 1 =7 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_34__33 $end
$var wire 1 E% X $end
$var wire 1 A% A $end
$var supply1 1 >7 VPWR $end
$var supply0 1 ?7 VGND $end
$var supply1 1 @7 VPB $end
$var supply0 1 A7 VNB $end

$scope module base $end
$var wire 1 E% X $end
$var wire 1 A% A $end
$var wire 1 B7 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module mem_left_track_25 $end
$var wire 1 S$ prog_clk [0] $end
$var wire 1 .% ccff_head [0] $end
$var wire 1 F% ccff_tail [0] $end
$var wire 1 B% mem_out [0] $end
$var wire 1 C% mem_out [1] $end

$scope module sky130_fd_sc_hd__dfxtp_1_0_ $end
$var wire 1 B% Q $end
$var wire 1 S$ CLK $end
$var wire 1 .% D $end
$var supply1 1 C7 VPWR $end
$var supply0 1 D7 VGND $end
$var supply1 1 E7 VPB $end
$var supply0 1 F7 VNB $end

$scope module base $end
$var wire 1 B% Q $end
$var wire 1 S$ CLK $end
$var wire 1 .% D $end
$var wire 1 G7 buf_Q $end
$upscope $end
$upscope $end

$scope module sky130_fd_sc_hd__dfxtp_1_1_ $end
$var wire 1 C% Q $end
$var wire 1 S$ CLK $end
$var wire 1 B% D $end
$var supply1 1 H7 VPWR $end
$var supply0 1 I7 VGND $end
$var supply1 1 J7 VPB $end
$var supply0 1 K7 VNB $end

$scope module base $end
$var wire 1 C% Q $end
$var wire 1 S$ CLK $end
$var wire 1 B% D $end
$var wire 1 L7 buf_Q $end
$upscope $end
$upscope $end

$scope module FTB_35__34 $end
$var wire 1 F% X $end
$var wire 1 C% A $end
$var supply1 1 M7 VPWR $end
$var supply0 1 N7 VGND $end
$var supply1 1 O7 VPB $end
$var supply0 1 P7 VNB $end

$scope module base $end
$var wire 1 F% X $end
$var wire 1 C% A $end
$var wire 1 Q7 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end

$scope module prog_clk_0_FTB00 $end
$var wire 1 S$ X $end
$var wire 1 R$ A $end
$var supply1 1 R7 VPWR $end
$var supply0 1 S7 VGND $end
$var supply1 1 T7 VPB $end
$var supply0 1 U7 VNB $end

$scope module base $end
$var wire 1 S$ X $end
$var wire 1 R$ A $end
$var wire 1 V7 buf0_out_X $end
$upscope $end
$upscope $end

$scope module FTB_36__35 $end
$var wire 1 ;$ X $end
$var wire 1 h# A $end
$var supply1 1 W7 VPWR $end
$var supply0 1 X7 VGND $end
$var supply1 1 Y7 VPB $end
$var supply0 1 Z7 VNB $end

$scope module base $end
$var wire 1 ;$ X $end
$var wire 1 h# A $end
$var wire 1 [7 buf0_out_X $end
$upscope $end
$upscope $end

$scope module FTB_37__36 $end
$var wire 1 7$ X $end
$var wire 1 x# A $end
$var supply1 1 \7 VPWR $end
$var supply0 1 ]7 VGND $end
$var supply1 1 ^7 VPB $end
$var supply0 1 _7 VNB $end

$scope module base $end
$var wire 1 7$ X $end
$var wire 1 x# A $end
$var wire 1 `7 buf0_out_X $end
$upscope $end
$upscope $end

$scope module FTB_38__37 $end
$var wire 1 8$ X $end
$var wire 1 y# A $end
$var supply1 1 a7 VPWR $end
$var supply0 1 b7 VGND $end
$var supply1 1 c7 VPB $end
$var supply0 1 d7 VNB $end

$scope module base $end
$var wire 1 8$ X $end
$var wire 1 y# A $end
$var wire 1 e7 buf0_out_X $end
$upscope $end
$upscope $end

$scope module FTB_39__38 $end
$var wire 1 9$ X $end
$var wire 1 z# A $end
$var supply1 1 f7 VPWR $end
$var supply0 1 g7 VGND $end
$var supply1 1 h7 VPB $end
$var supply0 1 i7 VNB $end

$scope module base $end
$var wire 1 9$ X $end
$var wire 1 z# A $end
$var wire 1 j7 buf0_out_X $end
$upscope $end
$upscope $end

$scope module FTB_40__39 $end
$var wire 1 :$ X $end
$var wire 1 {# A $end
$var supply1 1 k7 VPWR $end
$var supply0 1 l7 VGND $end
$var supply1 1 m7 VPB $end
$var supply0 1 n7 VNB $end

$scope module base $end
$var wire 1 :$ X $end
$var wire 1 {# A $end
$var wire 1 o7 buf0_out_X $end
$upscope $end
$upscope $end

$scope module FTB_41__40 $end
$var wire 1 Q$ X $end
$var wire 1 $ A $end
$var supply1 1 p7 VPWR $end
$var supply0 1 q7 VGND $end
$var supply1 1 r7 VPB $end
$var supply0 1 s7 VNB $end

$scope module base $end
$var wire 1 Q$ X $end
$var wire 1 $ A $end
$var wire 1 t7 buf0_out_X $end
$upscope $end
$upscope $end

$scope module optlc_94 $end
$var wire 1 ;& HI $end
$var wire 1 ]& LO $end
$var supply1 1 u7 VPWR $end
$var supply0 1 v7 VGND $end
$var supply1 1 w7 VPB $end
$var supply0 1 x7 VNB $end

$scope module base $end
$var wire 1 ;& HI $end
$var wire 1 ]& LO $end
$upscope $end
$upscope $end

$scope module optlc_96 $end
$var wire 1 j% HI $end
$var wire 1 ^& LO $end
$var supply1 1 y7 VPWR $end
$var supply0 1 z7 VGND $end
$var supply1 1 {7 VPB $end
$var supply0 1 |7 VNB $end

$scope module base $end
$var wire 1 j% HI $end
$var wire 1 ^& LO $end
$upscope $end
$upscope $end

$scope module optlc_98 $end
$var wire 1 r% HI $end
$var wire 1 _& LO $end
$var supply1 1 }7 VPWR $end
$var supply0 1 ~7 VGND $end
$var supply1 1 !8 VPB $end
$var supply0 1 "8 VNB $end

$scope module base $end
$var wire 1 r% HI $end
$var wire 1 _& LO $end
$upscope $end
$upscope $end

$scope module optlc_100 $end
$var wire 1 ,& HI $end
$var wire 1 `& LO $end
$var supply1 1 #8 VPWR $end
$var supply0 1 $8 VGND $end
$var supply1 1 %8 VPB $end
$var supply0 1 &8 VNB $end

$scope module base $end
$var wire 1 ,& HI $end
$var wire 1 `& LO $end
$upscope $end
$upscope $end

$scope module optlc_102 $end
$var wire 1 n% HI $end
$var wire 1 a& LO $end
$var supply1 1 '8 VPWR $end
$var supply0 1 (8 VGND $end
$var supply1 1 )8 VPB $end
$var supply0 1 *8 VNB $end

$scope module base $end
$var wire 1 n% HI $end
$var wire 1 a& LO $end
$upscope $end
$upscope $end

$scope module ropt_mt_inst_1277 $end
$var wire 1 P$ X $end
$var wire 1 b& A $end
$var supply1 1 +8 VPWR $end
$var supply0 1 ,8 VGND $end
$var supply1 1 -8 VPB $end
$var supply0 1 .8 VNB $end

$scope module base $end
$var wire 1 P$ X $end
$var wire 1 b& A $end
$var wire 1 /8 buf0_out_X $end
$upscope $end
$upscope $end

$scope module ropt_h_inst_1278 $end
$var wire 1 b& X $end
$var wire 1 c& A $end
$var supply1 1 08 VPWR $end
$var supply0 1 18 VGND $end
$var supply1 1 28 VPB $end
$var supply0 1 38 VNB $end

$scope module base $end
$var wire 1 b& X $end
$var wire 1 c& A $end
$var wire 1 48 buf0_out_X $end
$upscope $end
$upscope $end

$scope module ropt_h_inst_1279 $end
$var wire 1 c& X $end
$var wire 1 V& A $end
$var supply1 1 58 VPWR $end
$var supply0 1 68 VGND $end
$var supply1 1 78 VPB $end
$var supply0 1 88 VNB $end

$scope module base $end
$var wire 1 c& X $end
$var wire 1 V& A $end
$var wire 1 98 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
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