commit 520e54d7abecebf75310bb901ce702532148d686
Merge: 4a53640c 056b7c0c
Author: Laboratory for Nano Integrated Systems (LNIS) <40280375+LNIS-Projects@users.noreply.github.com>
Date:   Fri Nov 6 13:25:29 2020 -0700

    Merge pull request #118 from LNIS-Projects/dev
    
    Remove the restrictions on requiring two outputs for configurable memory circuits

commit 056b7c0c7997d2d12473f2fc4b7915e25ff74820
Author: tangxifan <tangxifan@gmail.com>
Date:   Fri Nov 6 12:22:22 2020 -0700

    [Doc] Update documentation about CCFF circuit model examples

commit 70734abc35347dbc27113200908858c9a66e9945
Author: tangxifan <tangxifan@gmail.com>
Date:   Fri Nov 6 11:20:13 2020 -0700

    [Arch] Remove QN from stdcell arch

commit 1a79a556467ae8d9d4d791b94462e168e15635ca
Author: tangxifan <tangxifan@gmail.com>
Date:   Fri Nov 6 11:19:19 2020 -0700

    [HDL] Add DFF cell with reset but only 1 output

commit 0a273ffab65b1f503d6e63da59c93644375dc3b1
Author: tangxifan <tangxifan@gmail.com>
Date:   Fri Nov 6 11:16:46 2020 -0700

    [Tool] Bug fix in the tight requirements on CCFF circuit model
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