**/SRCOriginal
**/SRCOutline
**/TaskConfigCopy
**/*_task/run001
**/*_task/latest
**/*_task/skywater
**/*_Verilog/SRC_Skeleton
**/*_Verilog/SRCBackup
**/SRC/top_top_formal_verification.v
**/DOC/build
**/SRC**/*_tb.v
**/SDC/**/*.sdc
!**/SDC/**/disable_configure_ports.sdc
*/runOpenFPGA
**/*_task/latest
**/*_task/run**
**/*_task/config/task.conf
.vscode/
LoadTools.sh