$date
Sun Dec 6 20:09:29 2020
$end
$version
QuestaSim Version 2019.4
$end
$timescale
1ps
$end
$scope module fpga_top $end
$var wire 1 ! io_in [37] $end
$var wire 1 " io_in [36] $end
$var wire 1 # io_in [0] $end
$scope module fpga_core_uut $end
$var wire 1 $ scff_Wires [317] $end
$var wire 1 % scff_Wires [316] $end
$var wire 1 & scff_Wires [315] $end
$var wire 1 ' scff_Wires [314] $end
$var wire 1 ( scff_Wires [313] $end
$var wire 1 ) scff_Wires [312] $end
$var wire 1 * scff_Wires [311] $end
$var wire 1 + scff_Wires [310] $end
$var wire 1 , scff_Wires [309] $end
$var wire 1 - scff_Wires [308] $end
$var wire 1 . scff_Wires [307] $end
$var wire 1 / scff_Wires [306] $end
$var wire 1 0 scff_Wires [305] $end
$var wire 1 1 scff_Wires [304] $end
$var wire 1 2 scff_Wires [303] $end
$var wire 1 3 scff_Wires [302] $end
$var wire 1 4 scff_Wires [301] $end
$var wire 1 5 scff_Wires [300] $end
$var wire 1 6 scff_Wires [299] $end
$var wire 1 7 scff_Wires [298] $end
$var wire 1 8 scff_Wires [297] $end
$var wire 1 9 scff_Wires [296] $end
$var wire 1 : scff_Wires [295] $end
$var wire 1 ; scff_Wires [294] $end
$var wire 1 < scff_Wires [293] $end
$var wire 1 = scff_Wires [292] $end
$var wire 1 > scff_Wires [291] $end
$var wire 1 ? scff_Wires [290] $end
$var wire 1 @ scff_Wires [289] $end
$var wire 1 A scff_Wires [288] $end
$var wire 1 B scff_Wires [287] $end
$var wire 1 C scff_Wires [286] $end
$var wire 1 D scff_Wires [285] $end
$var wire 1 E scff_Wires [284] $end
$var wire 1 F scff_Wires [283] $end
$var wire 1 G scff_Wires [282] $end
$var wire 1 H scff_Wires [281] $end
$var wire 1 I scff_Wires [280] $end
$var wire 1 J scff_Wires [279] $end
$var wire 1 K scff_Wires [278] $end
$var wire 1 L scff_Wires [277] $end
$var wire 1 M scff_Wires [276] $end
$var wire 1 N scff_Wires [275] $end
$var wire 1 O scff_Wires [274] $end
$var wire 1 P scff_Wires [273] $end
$var wire 1 Q scff_Wires [272] $end
$var wire 1 R scff_Wires [271] $end
$var wire 1 S scff_Wires [270] $end
$var wire 1 T scff_Wires [269] $end
$var wire 1 U scff_Wires [268] $end
$var wire 1 V scff_Wires [267] $end
$var wire 1 W scff_Wires [266] $end
$var wire 1 X scff_Wires [265] $end
$var wire 1 Y scff_Wires [264] $end
$var wire 1 Z scff_Wires [263] $end
$var wire 1 [ scff_Wires [262] $end
$var wire 1 \ scff_Wires [261] $end
$var wire 1 ] scff_Wires [260] $end
$var wire 1 ^ scff_Wires [259] $end
$var wire 1 _ scff_Wires [258] $end
$var wire 1 ` scff_Wires [257] $end
$var wire 1 a scff_Wires [256] $end
$var wire 1 b scff_Wires [255] $end
$var wire 1 c scff_Wires [254] $end
$var wire 1 d scff_Wires [253] $end
$var wire 1 e scff_Wires [252] $end
$var wire 1 f scff_Wires [251] $end
$var wire 1 g scff_Wires [250] $end
$var wire 1 h scff_Wires [249] $end
$var wire 1 i scff_Wires [248] $end
$var wire 1 j scff_Wires [247] $end
$var wire 1 k scff_Wires [246] $end
$var wire 1 l scff_Wires [245] $end
$var wire 1 m scff_Wires [244] $end
$var wire 1 n scff_Wires [243] $end
$var wire 1 o scff_Wires [242] $end
$var wire 1 p scff_Wires [241] $end
$var wire 1 q scff_Wires [240] $end
$var wire 1 r scff_Wires [239] $end
$var wire 1 s scff_Wires [238] $end
$var wire 1 t scff_Wires [237] $end
$var wire 1 u scff_Wires [236] $end
$var wire 1 v scff_Wires [235] $end
$var wire 1 w scff_Wires [234] $end
$var wire 1 x scff_Wires [233] $end
$var wire 1 y scff_Wires [232] $end
$var wire 1 z scff_Wires [231] $end
$var wire 1 { scff_Wires [230] $end
$var wire 1 | scff_Wires [229] $end
$var wire 1 } scff_Wires [228] $end
$var wire 1 ~ scff_Wires [227] $end
$var wire 1 !! scff_Wires [226] $end
$var wire 1 "! scff_Wires [225] $end
$var wire 1 #! scff_Wires [224] $end
$var wire 1 $! scff_Wires [223] $end
$var wire 1 %! scff_Wires [222] $end
$var wire 1 &! scff_Wires [221] $end
$var wire 1 '! scff_Wires [220] $end
$var wire 1 (! scff_Wires [219] $end
$var wire 1 )! scff_Wires [218] $end
$var wire 1 *! scff_Wires [217] $end
$var wire 1 +! scff_Wires [216] $end
$var wire 1 ,! scff_Wires [215] $end
$var wire 1 -! scff_Wires [214] $end
$var wire 1 .! scff_Wires [213] $end
$var wire 1 /! scff_Wires [212] $end
$var wire 1 0! scff_Wires [211] $end
$var wire 1 1! scff_Wires [210] $end
$var wire 1 2! scff_Wires [209] $end
$var wire 1 3! scff_Wires [208] $end
$var wire 1 4! scff_Wires [207] $end
$var wire 1 5! scff_Wires [206] $end
$var wire 1 6! scff_Wires [205] $end
$var wire 1 7! scff_Wires [204] $end
$var wire 1 8! scff_Wires [203] $end
$var wire 1 9! scff_Wires [202] $end
$var wire 1 :! scff_Wires [201] $end
$var wire 1 ;! scff_Wires [200] $end
$var wire 1 ! scff_Wires [197] $end
$var wire 1 ?! scff_Wires [196] $end
$var wire 1 @! scff_Wires [195] $end
$var wire 1 A! scff_Wires [194] $end
$var wire 1 B! scff_Wires [193] $end
$var wire 1 C! scff_Wires [192] $end
$var wire 1 D! scff_Wires [191] $end
$var wire 1 E! scff_Wires [190] $end
$var wire 1 F! scff_Wires [189] $end
$var wire 1 G! scff_Wires [188] $end
$var wire 1 H! scff_Wires [187] $end
$var wire 1 I! scff_Wires [186] $end
$var wire 1 J! scff_Wires [185] $end
$var wire 1 K! scff_Wires [184] $end
$var wire 1 L! scff_Wires [183] $end
$var wire 1 M! scff_Wires [182] $end
$var wire 1 N! scff_Wires [181] $end
$var wire 1 O! scff_Wires [180] $end
$var wire 1 P! scff_Wires [179] $end
$var wire 1 Q! scff_Wires [178] $end
$var wire 1 R! scff_Wires [177] $end
$var wire 1 S! scff_Wires [176] $end
$var wire 1 T! scff_Wires [175] $end
$var wire 1 U! scff_Wires [174] $end
$var wire 1 V! scff_Wires [173] $end
$var wire 1 W! scff_Wires [172] $end
$var wire 1 X! scff_Wires [171] $end
$var wire 1 Y! scff_Wires [170] $end
$var wire 1 Z! scff_Wires [169] $end
$var wire 1 [! scff_Wires [168] $end
$var wire 1 \! scff_Wires [167] $end
$var wire 1 ]! scff_Wires [166] $end
$var wire 1 ^! scff_Wires [165] $end
$var wire 1 _! scff_Wires [164] $end
$var wire 1 `! scff_Wires [163] $end
$var wire 1 a! scff_Wires [162] $end
$var wire 1 b! scff_Wires [161] $end
$var wire 1 c! scff_Wires [160] $end
$var wire 1 d! scff_Wires [159] $end
$var wire 1 e! scff_Wires [158] $end
$var wire 1 f! scff_Wires [157] $end
$var wire 1 g! scff_Wires [156] $end
$var wire 1 h! scff_Wires [155] $end
$var wire 1 i! scff_Wires [154] $end
$var wire 1 j! scff_Wires [153] $end
$var wire 1 k! scff_Wires [152] $end
$var wire 1 l! scff_Wires [151] $end
$var wire 1 m! scff_Wires [150] $end
$var wire 1 n! scff_Wires [149] $end
$var wire 1 o! scff_Wires [148] $end
$var wire 1 p! scff_Wires [147] $end
$var wire 1 q! scff_Wires [146] $end
$var wire 1 r! scff_Wires [145] $end
$var wire 1 s! scff_Wires [144] $end
$var wire 1 t! scff_Wires [143] $end
$var wire 1 u! scff_Wires [142] $end
$var wire 1 v! scff_Wires [141] $end
$var wire 1 w! scff_Wires [140] $end
$var wire 1 x! scff_Wires [139] $end
$var wire 1 y! scff_Wires [138] $end
$var wire 1 z! scff_Wires [137] $end
$var wire 1 {! scff_Wires [136] $end
$var wire 1 |! scff_Wires [135] $end
$var wire 1 }! scff_Wires [134] $end
$var wire 1 ~! scff_Wires [133] $end
$var wire 1 !" scff_Wires [132] $end
$var wire 1 "" scff_Wires [131] $end
$var wire 1 #" scff_Wires [130] $end
$var wire 1 $" scff_Wires [129] $end
$var wire 1 %" scff_Wires [128] $end
$var wire 1 &" scff_Wires [127] $end
$var wire 1 '" scff_Wires [126] $end
$var wire 1 (" scff_Wires [125] $end
$var wire 1 )" scff_Wires [124] $end
$var wire 1 *" scff_Wires [123] $end
$var wire 1 +" scff_Wires [122] $end
$var wire 1 ," scff_Wires [121] $end
$var wire 1 -" scff_Wires [120] $end
$var wire 1 ." scff_Wires [119] $end
$var wire 1 /" scff_Wires [118] $end
$var wire 1 0" scff_Wires [117] $end
$var wire 1 1" scff_Wires [116] $end
$var wire 1 2" scff_Wires [115] $end
$var wire 1 3" scff_Wires [114] $end
$var wire 1 4" scff_Wires [113] $end
$var wire 1 5" scff_Wires [112] $end
$var wire 1 6" scff_Wires [111] $end
$var wire 1 7" scff_Wires [110] $end
$var wire 1 8" scff_Wires [109] $end
$var wire 1 9" scff_Wires [108] $end
$var wire 1 :" scff_Wires [107] $end
$var wire 1 ;" scff_Wires [106] $end
$var wire 1 <" scff_Wires [105] $end
$var wire 1 =" scff_Wires [104] $end
$var wire 1 >" scff_Wires [103] $end
$var wire 1 ?" scff_Wires [102] $end
$var wire 1 @" scff_Wires [101] $end
$var wire 1 A" scff_Wires [100] $end
$var wire 1 B" scff_Wires [99] $end
$var wire 1 C" scff_Wires [98] $end
$var wire 1 D" scff_Wires [97] $end
$var wire 1 E" scff_Wires [96] $end
$var wire 1 F" scff_Wires [95] $end
$var wire 1 G" scff_Wires [94] $end
$var wire 1 H" scff_Wires [93] $end
$var wire 1 I" scff_Wires [92] $end
$var wire 1 J" scff_Wires [91] $end
$var wire 1 K" scff_Wires [90] $end
$var wire 1 L" scff_Wires [89] $end
$var wire 1 M" scff_Wires [88] $end
$var wire 1 N" scff_Wires [87] $end
$var wire 1 O" scff_Wires [86] $end
$var wire 1 P" scff_Wires [85] $end
$var wire 1 Q" scff_Wires [84] $end
$var wire 1 R" scff_Wires [83] $end
$var wire 1 S" scff_Wires [82] $end
$var wire 1 T" scff_Wires [81] $end
$var wire 1 U" scff_Wires [80] $end
$var wire 1 V" scff_Wires [79] $end
$var wire 1 W" scff_Wires [78] $end
$var wire 1 X" scff_Wires [77] $end
$var wire 1 Y" scff_Wires [76] $end
$var wire 1 Z" scff_Wires [75] $end
$var wire 1 [" scff_Wires [74] $end
$var wire 1 \" scff_Wires [73] $end
$var wire 1 ]" scff_Wires [72] $end
$var wire 1 ^" scff_Wires [71] $end
$var wire 1 _" scff_Wires [70] $end
$var wire 1 `" scff_Wires [69] $end
$var wire 1 a" scff_Wires [68] $end
$var wire 1 b" scff_Wires [67] $end
$var wire 1 c" scff_Wires [66] $end
$var wire 1 d" scff_Wires [65] $end
$var wire 1 e" scff_Wires [64] $end
$var wire 1 f" scff_Wires [63] $end
$var wire 1 g" scff_Wires [62] $end
$var wire 1 h" scff_Wires [61] $end
$var wire 1 i" scff_Wires [60] $end
$var wire 1 j" scff_Wires [59] $end
$var wire 1 k" scff_Wires [58] $end
$var wire 1 l" scff_Wires [57] $end
$var wire 1 m" scff_Wires [56] $end
$var wire 1 n" scff_Wires [55] $end
$var wire 1 o" scff_Wires [54] $end
$var wire 1 p" scff_Wires [53] $end
$var wire 1 q" scff_Wires [52] $end
$var wire 1 r" scff_Wires [51] $end
$var wire 1 s" scff_Wires [50] $end
$var wire 1 t" scff_Wires [49] $end
$var wire 1 u" scff_Wires [48] $end
$var wire 1 v" scff_Wires [47] $end
$var wire 1 w" scff_Wires [46] $end
$var wire 1 x" scff_Wires [45] $end
$var wire 1 y" scff_Wires [44] $end
$var wire 1 z" scff_Wires [43] $end
$var wire 1 {" scff_Wires [42] $end
$var wire 1 |" scff_Wires [41] $end
$var wire 1 }" scff_Wires [40] $end
$var wire 1 ~" scff_Wires [39] $end
$var wire 1 !# scff_Wires [38] $end
$var wire 1 "# scff_Wires [37] $end
$var wire 1 ## scff_Wires [36] $end
$var wire 1 $# scff_Wires [35] $end
$var wire 1 %# scff_Wires [34] $end
$var wire 1 scff_Wires [33] $end
$var wire 1 '# scff_Wires [32] $end
$var wire 1 (# scff_Wires [31] $end
$var wire 1 )# scff_Wires [30] $end
$var wire 1 *# scff_Wires [29] $end
$var wire 1 +# scff_Wires [28] $end
$var wire 1 ,# scff_Wires [27] $end
$var wire 1 -# scff_Wires [26] $end
$var wire 1 .# scff_Wires [25] $end
$var wire 1 /# scff_Wires [24] $end
$var wire 1 0# scff_Wires [23] $end
$var wire 1 1# scff_Wires [22] $end
$var wire 1 2# scff_Wires [21] $end
$var wire 1 3# scff_Wires [20] $end
$var wire 1 4# scff_Wires [19] $end
$var wire 1 5# scff_Wires [18] $end
$var wire 1 6# scff_Wires [17] $end
$var wire 1 7# scff_Wires [16] $end
$var wire 1 8# scff_Wires [15] $end
$var wire 1 9# scff_Wires [14] $end
$var wire 1 :# scff_Wires [13] $end
$var wire 1 ;# scff_Wires [12] $end
$var wire 1 <# scff_Wires [11] $end
$var wire 1 =# scff_Wires [10] $end
$var wire 1 ># scff_Wires [9] $end
$var wire 1 ?# scff_Wires [8] $end
$var wire 1 @# scff_Wires [7] $end
$var wire 1 A# scff_Wires [6] $end
$var wire 1 B# scff_Wires [5] $end
$var wire 1 C# scff_Wires [4] $end
$var wire 1 D# scff_Wires [3] $end
$var wire 1 E# scff_Wires [2] $end
$var wire 1 F# scff_Wires [1] $end
$var wire 1 G# scff_Wires [0] $end
$var wire 1 # Test_en [0] $end
$scope module sb_0__12_ $end
$var wire 1 H# SC_IN_TOP $end
$var wire 1 G# SC_OUT_BOT $end
$upscope $end
$scope module grid_clb_1__12_ $end
$var wire 1 F# SC_IN_TOP $end
$var wire 1 E# SC_OUT_BOT $end
$upscope $end
$upscope $end
$var wire 1 I# sc_head $end
$var wire 1 J# sc_tail $end
$scope module fpga_core_uut $end
$scope module sb_12__12_ $end
$var wire 1 K# pReset [0] $end
$var wire 1 L# chany_bottom_in [0] $end
$var wire 1 M# chany_bottom_in [1] $end
$var wire 1 N# chany_bottom_in [2] $end
$var wire 1 O# chany_bottom_in [3] $end
$var wire 1 P# chany_bottom_in [4] $end
$var wire 1 Q# chany_bottom_in [5] $end
$var wire 1 R# chany_bottom_in [6] $end
$var wire 1 S# chany_bottom_in [7] $end
$var wire 1 T# chany_bottom_in [8] $end
$var wire 1 U# chany_bottom_in [9] $end
$var wire 1 V# chany_bottom_in [10] $end
$var wire 1 W# chany_bottom_in [11] $end
$var wire 1 X# chany_bottom_in [12] $end
$var wire 1 Y# chany_bottom_in [13] $end
$var wire 1 Z# chany_bottom_in [14] $end
$var wire 1 [# chany_bottom_in [15] $end
$var wire 1 \# chany_bottom_in [16] $end
$var wire 1 ]# chany_bottom_in [17] $end
$var wire 1 ^# chany_bottom_in [18] $end
$var wire 1 _# chany_bottom_in [19] $end
$var wire 1 `# chany_bottom_in [20] $end
$var wire 1 a# chany_bottom_in [21] $end
$var wire 1 b# chany_bottom_in [22] $end
$var wire 1 c# chany_bottom_in [23] $end
$var wire 1 d# chany_bottom_in [24] $end
$var wire 1 e# chany_bottom_in [25] $end
$var wire 1 f# chany_bottom_in [26] $end
$var wire 1 g# chany_bottom_in [27] $end
$var wire 1 h# chany_bottom_in [28] $end
$var wire 1 i# chany_bottom_in [29] $end
$var wire 1 j# bottom_right_grid_pin_1_ [0] $end
$var wire 1 k# bottom_left_grid_pin_44_ [0] $end
$var wire 1 l# bottom_left_grid_pin_45_ [0] $end
$var wire 1 m# bottom_left_grid_pin_46_ [0] $end
$var wire 1 n# bottom_left_grid_pin_47_ [0] $end
$var wire 1 o# bottom_left_grid_pin_48_ [0] $end
$var wire 1 p# bottom_left_grid_pin_49_ [0] $end
$var wire 1 q# bottom_left_grid_pin_50_ [0] $end
$var wire 1 r# bottom_left_grid_pin_51_ [0] $end
$var wire 1 s# chanx_left_in [0] $end
$var wire 1 t# chanx_left_in [1] $end
$var wire 1 u# chanx_left_in [2] $end
$var wire 1 v# chanx_left_in [3] $end
$var wire 1 w# chanx_left_in [4] $end
$var wire 1 x# chanx_left_in [5] $end
$var wire 1 y# chanx_left_in [6] $end
$var wire 1 z# chanx_left_in [7] $end
$var wire 1 {# chanx_left_in [8] $end
$var wire 1 |# chanx_left_in [9] $end
$var wire 1 }# chanx_left_in [10] $end
$var wire 1 ~# chanx_left_in [11] $end
$var wire 1 !$ chanx_left_in [12] $end
$var wire 1 "$ chanx_left_in [13] $end
$var wire 1 #$ chanx_left_in [14] $end
$var wire 1 $$ chanx_left_in [15] $end
$var wire 1 %$ chanx_left_in [16] $end
$var wire 1 &$ chanx_left_in [17] $end
$var wire 1 '$ chanx_left_in [18] $end
$var wire 1 ($ chanx_left_in [19] $end
$var wire 1 )$ chanx_left_in [20] $end
$var wire 1 *$ chanx_left_in [21] $end
$var wire 1 +$ chanx_left_in [22] $end
$var wire 1 ,$ chanx_left_in [23] $end
$var wire 1 -$ chanx_left_in [24] $end
$var wire 1 .$ chanx_left_in [25] $end
$var wire 1 /$ chanx_left_in [26] $end
$var wire 1 0$ chanx_left_in [27] $end
$var wire 1 1$ chanx_left_in [28] $end
$var wire 1 2$ chanx_left_in [29] $end
$var wire 1 3$ left_top_grid_pin_1_ [0] $end
$var wire 1 4$ left_bottom_grid_pin_36_ [0] $end
$var wire 1 5$ left_bottom_grid_pin_37_ [0] $end
$var wire 1 6$ left_bottom_grid_pin_38_ [0] $end
$var wire 1 7$ left_bottom_grid_pin_39_ [0] $end
$var wire 1 8$ left_bottom_grid_pin_40_ [0] $end
$var wire 1 9$ left_bottom_grid_pin_41_ [0] $end
$var wire 1 :$ left_bottom_grid_pin_42_ [0] $end
$var wire 1 ;$ left_bottom_grid_pin_43_ [0] $end
$var wire 1 <$ ccff_head [0] $end
$var wire 1 =$ chany_bottom_out [0] $end
$var wire 1 >$ chany_bottom_out [1] $end
$var wire 1 ?$ chany_bottom_out [2] $end
$var wire 1 @$ chany_bottom_out [3] $end
$var wire 1 A$ chany_bottom_out [4] $end
$var wire 1 B$ chany_bottom_out [5] $end
$var wire 1 C$ chany_bottom_out [6] $end
$var wire 1 D$ chany_bottom_out [7] $end
$var wire 1 E$ chany_bottom_out [8] $end
$var wire 1 F$ chany_bottom_out [9] $end
$var wire 1 G$ chany_bottom_out [10] $end
$var wire 1 H$ chany_bottom_out [11] $end
$var wire 1 I$ chany_bottom_out [12] $end
$var wire 1 J$ chany_bottom_out [13] $end
$var wire 1 K$ chany_bottom_out [14] $end
$var wire 1 L$ chany_bottom_out [15] $end
$var wire 1 M$ chany_bottom_out [16] $end
$var wire 1 N$ chany_bottom_out [17] $end
$var wire 1 O$ chany_bottom_out [18] $end
$var wire 1 P$ chany_bottom_out [19] $end
$var wire 1 Q$ chany_bottom_out [20] $end
$var wire 1 R$ chany_bottom_out [21] $end
$var wire 1 S$ chany_bottom_out [22] $end
$var wire 1 T$ chany_bottom_out [23] $end
$var wire 1 U$ chany_bottom_out [24] $end
$var wire 1 V$ chany_bottom_out [25] $end
$var wire 1 W$ chany_bottom_out [26] $end
$var wire 1 X$ chany_bottom_out [27] $end
$var wire 1 Y$ chany_bottom_out [28] $end
$var wire 1 Z$ chany_bottom_out [29] $end
$var wire 1 [$ chanx_left_out [0] $end
$var wire 1 \$ chanx_left_out [1] $end
$var wire 1 ]$ chanx_left_out [2] $end
$var wire 1 ^$ chanx_left_out [3] $end
$var wire 1 _$ chanx_left_out [4] $end
$var wire 1 `$ chanx_left_out [5] $end
$var wire 1 a$ chanx_left_out [6] $end
$var wire 1 b$ chanx_left_out [7] $end
$var wire 1 c$ chanx_left_out [8] $end
$var wire 1 d$ chanx_left_out [9] $end
$var wire 1 e$ chanx_left_out [10] $end
$var wire 1 f$ chanx_left_out [11] $end
$var wire 1 g$ chanx_left_out [12] $end
$var wire 1 h$ chanx_left_out [13] $end
$var wire 1 i$ chanx_left_out [14] $end
$var wire 1 j$ chanx_left_out [15] $end
$var wire 1 k$ chanx_left_out [16] $end
$var wire 1 l$ chanx_left_out [17] $end
$var wire 1 m$ chanx_left_out [18] $end
$var wire 1 n$ chanx_left_out [19] $end
$var wire 1 o$ chanx_left_out [20] $end
$var wire 1 p$ chanx_left_out [21] $end
$var wire 1 q$ chanx_left_out [22] $end
$var wire 1 r$ chanx_left_out [23] $end
$var wire 1 s$ chanx_left_out [24] $end
$var wire 1 t$ chanx_left_out [25] $end
$var wire 1 u$ chanx_left_out [26] $end
$var wire 1 v$ chanx_left_out [27] $end
$var wire 1 w$ chanx_left_out [28] $end
$var wire 1 x$ chanx_left_out [29] $end
$var wire 1 y$ ccff_tail [0] $end
$var wire 1 $ SC_IN_BOT $end
$var wire 1 z$ SC_OUT_BOT $end
$var wire 1 {$ pReset_W_in $end
$var wire 1 |$ prog_clk_0_S_in $end
$var wire 1 }$ ropt_net_182 $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 !% prog_clk_0 $end
$var wire 1 "% mux_tree_tapbuf_size2_0_sram [0] $end
$var wire 1 #% mux_tree_tapbuf_size2_0_sram [1] $end
$var wire 1 $% mux_tree_tapbuf_size2_10_sram [0] $end
$var wire 1 %% mux_tree_tapbuf_size2_10_sram [1] $end
$var wire 1 &% mux_tree_tapbuf_size2_11_sram [0] $end
$var wire 1 '% mux_tree_tapbuf_size2_11_sram [1] $end
$var wire 1 (% mux_tree_tapbuf_size2_12_sram [0] $end
$var wire 1 )% mux_tree_tapbuf_size2_12_sram [1] $end
$var wire 1 *% mux_tree_tapbuf_size2_13_sram [0] $end
$var wire 1 +% mux_tree_tapbuf_size2_13_sram [1] $end
$var wire 1 ,% mux_tree_tapbuf_size2_14_sram [0] $end
$var wire 1 -% mux_tree_tapbuf_size2_14_sram [1] $end
$var wire 1 .% mux_tree_tapbuf_size2_15_sram [0] $end
$var wire 1 /% mux_tree_tapbuf_size2_15_sram [1] $end
$var wire 1 0% mux_tree_tapbuf_size2_16_sram [0] $end
$var wire 1 1% mux_tree_tapbuf_size2_16_sram [1] $end
$var wire 1 2% mux_tree_tapbuf_size2_17_sram [0] $end
$var wire 1 3% mux_tree_tapbuf_size2_17_sram [1] $end
$var wire 1 4% mux_tree_tapbuf_size2_18_sram [0] $end
$var wire 1 5% mux_tree_tapbuf_size2_18_sram [1] $end
$var wire 1 6% mux_tree_tapbuf_size2_19_sram [0] $end
$var wire 1 7% mux_tree_tapbuf_size2_19_sram [1] $end
$var wire 1 8% mux_tree_tapbuf_size2_1_sram [0] $end
$var wire 1 9% mux_tree_tapbuf_size2_1_sram [1] $end
$var wire 1 :% mux_tree_tapbuf_size2_20_sram [0] $end
$var wire 1 ;% mux_tree_tapbuf_size2_20_sram [1] $end
$var wire 1 <% mux_tree_tapbuf_size2_21_sram [0] $end
$var wire 1 =% mux_tree_tapbuf_size2_21_sram [1] $end
$var wire 1 >% mux_tree_tapbuf_size2_22_sram [0] $end
$var wire 1 ?% mux_tree_tapbuf_size2_22_sram [1] $end
$var wire 1 @% mux_tree_tapbuf_size2_23_sram [0] $end
$var wire 1 A% mux_tree_tapbuf_size2_23_sram [1] $end
$var wire 1 B% mux_tree_tapbuf_size2_24_sram [0] $end
$var wire 1 C% mux_tree_tapbuf_size2_24_sram [1] $end
$var wire 1 D% mux_tree_tapbuf_size2_25_sram [0] $end
$var wire 1 E% mux_tree_tapbuf_size2_25_sram [1] $end
$var wire 1 F% mux_tree_tapbuf_size2_26_sram [0] $end
$var wire 1 G% mux_tree_tapbuf_size2_26_sram [1] $end
$var wire 1 H% mux_tree_tapbuf_size2_27_sram [0] $end
$var wire 1 I% mux_tree_tapbuf_size2_27_sram [1] $end
$var wire 1 J% mux_tree_tapbuf_size2_28_sram [0] $end
$var wire 1 K% mux_tree_tapbuf_size2_28_sram [1] $end
$var wire 1 L% mux_tree_tapbuf_size2_29_sram [0] $end
$var wire 1 M% mux_tree_tapbuf_size2_29_sram [1] $end
$var wire 1 N% mux_tree_tapbuf_size2_2_sram [0] $end
$var wire 1 O% mux_tree_tapbuf_size2_2_sram [1] $end
$var wire 1 P% mux_tree_tapbuf_size2_30_sram [0] $end
$var wire 1 Q% mux_tree_tapbuf_size2_30_sram [1] $end
$var wire 1 R% mux_tree_tapbuf_size2_31_sram [0] $end
$var wire 1 S% mux_tree_tapbuf_size2_31_sram [1] $end
$var wire 1 T% mux_tree_tapbuf_size2_32_sram [0] $end
$var wire 1 U% mux_tree_tapbuf_size2_32_sram [1] $end
$var wire 1 V% mux_tree_tapbuf_size2_33_sram [0] $end
$var wire 1 W% mux_tree_tapbuf_size2_33_sram [1] $end
$var wire 1 X% mux_tree_tapbuf_size2_34_sram [0] $end
$var wire 1 Y% mux_tree_tapbuf_size2_34_sram [1] $end
$var wire 1 Z% mux_tree_tapbuf_size2_35_sram [0] $end
$var wire 1 [% mux_tree_tapbuf_size2_35_sram [1] $end
$var wire 1 \% mux_tree_tapbuf_size2_36_sram [0] $end
$var wire 1 ]% mux_tree_tapbuf_size2_36_sram [1] $end
$var wire 1 ^% mux_tree_tapbuf_size2_3_sram [0] $end
$var wire 1 _% mux_tree_tapbuf_size2_3_sram [1] $end
$var wire 1 `% mux_tree_tapbuf_size2_4_sram [0] $end
$var wire 1 a% mux_tree_tapbuf_size2_4_sram [1] $end
$var wire 1 b% mux_tree_tapbuf_size2_5_sram [0] $end
$var wire 1 c% mux_tree_tapbuf_size2_5_sram [1] $end
$var wire 1 d% mux_tree_tapbuf_size2_6_sram [0] $end
$var wire 1 e% mux_tree_tapbuf_size2_6_sram [1] $end
$var wire 1 f% mux_tree_tapbuf_size2_7_sram [0] $end
$var wire 1 g% mux_tree_tapbuf_size2_7_sram [1] $end
$var wire 1 h% mux_tree_tapbuf_size2_8_sram [0] $end
$var wire 1 i% mux_tree_tapbuf_size2_8_sram [1] $end
$var wire 1 j% mux_tree_tapbuf_size2_9_sram [0] $end
$var wire 1 k% mux_tree_tapbuf_size2_9_sram [1] $end
$var wire 1 l% mux_tree_tapbuf_size2_mem_0_ccff_tail [0] $end
$var wire 1 m% mux_tree_tapbuf_size2_mem_10_ccff_tail [0] $end
$var wire 1 n% mux_tree_tapbuf_size2_mem_11_ccff_tail [0] $end
$var wire 1 o% mux_tree_tapbuf_size2_mem_12_ccff_tail [0] $end
$var wire 1 p% mux_tree_tapbuf_size2_mem_13_ccff_tail [0] $end
$var wire 1 q% mux_tree_tapbuf_size2_mem_14_ccff_tail [0] $end
$var wire 1 r% mux_tree_tapbuf_size2_mem_15_ccff_tail [0] $end
$var wire 1 s% mux_tree_tapbuf_size2_mem_16_ccff_tail [0] $end
$var wire 1 t% mux_tree_tapbuf_size2_mem_17_ccff_tail [0] $end
$var wire 1 u% mux_tree_tapbuf_size2_mem_18_ccff_tail [0] $end
$var wire 1 v% mux_tree_tapbuf_size2_mem_19_ccff_tail [0] $end
$var wire 1 w% mux_tree_tapbuf_size2_mem_1_ccff_tail [0] $end
$var wire 1 x% mux_tree_tapbuf_size2_mem_20_ccff_tail [0] $end
$var wire 1 y% mux_tree_tapbuf_size2_mem_21_ccff_tail [0] $end
$var wire 1 z% mux_tree_tapbuf_size2_mem_22_ccff_tail [0] $end
$var wire 1 {% mux_tree_tapbuf_size2_mem_23_ccff_tail [0] $end
$var wire 1 |% mux_tree_tapbuf_size2_mem_24_ccff_tail [0] $end
$var wire 1 }% mux_tree_tapbuf_size2_mem_25_ccff_tail [0] $end
$var wire 1 ~% mux_tree_tapbuf_size2_mem_26_ccff_tail [0] $end
$var wire 1 !& mux_tree_tapbuf_size2_mem_27_ccff_tail [0] $end
$var wire 1 "& mux_tree_tapbuf_size2_mem_28_ccff_tail [0] $end
$var wire 1 #& mux_tree_tapbuf_size2_mem_29_ccff_tail [0] $end
$var wire 1 $& mux_tree_tapbuf_size2_mem_2_ccff_tail [0] $end
$var wire 1 %& mux_tree_tapbuf_size2_mem_30_ccff_tail [0] $end
$var wire 1 && mux_tree_tapbuf_size2_mem_31_ccff_tail [0] $end
$var wire 1 '& mux_tree_tapbuf_size2_mem_32_ccff_tail [0] $end
$var wire 1 (& mux_tree_tapbuf_size2_mem_33_ccff_tail [0] $end
$var wire 1 )& mux_tree_tapbuf_size2_mem_34_ccff_tail [0] $end
$var wire 1 *& mux_tree_tapbuf_size2_mem_35_ccff_tail [0] $end
$var wire 1 +& mux_tree_tapbuf_size2_mem_3_ccff_tail [0] $end
$var wire 1 ,& mux_tree_tapbuf_size2_mem_4_ccff_tail [0] $end
$var wire 1 -& mux_tree_tapbuf_size2_mem_5_ccff_tail [0] $end
$var wire 1 .& mux_tree_tapbuf_size2_mem_6_ccff_tail [0] $end
$var wire 1 /& mux_tree_tapbuf_size2_mem_7_ccff_tail [0] $end
$var wire 1 0& mux_tree_tapbuf_size2_mem_8_ccff_tail [0] $end
$var wire 1 1& mux_tree_tapbuf_size2_mem_9_ccff_tail [0] $end
$var wire 1 2& mux_tree_tapbuf_size3_0_sram [0] $end
$var wire 1 3& mux_tree_tapbuf_size3_0_sram [1] $end
$var wire 1 4& mux_tree_tapbuf_size3_1_sram [0] $end
$var wire 1 5& mux_tree_tapbuf_size3_1_sram [1] $end
$var wire 1 6& mux_tree_tapbuf_size3_2_sram [0] $end
$var wire 1 7& mux_tree_tapbuf_size3_2_sram [1] $end
$var wire 1 8& mux_tree_tapbuf_size3_3_sram [0] $end
$var wire 1 9& mux_tree_tapbuf_size3_3_sram [1] $end
$var wire 1 :& mux_tree_tapbuf_size3_mem_0_ccff_tail [0] $end
$var wire 1 ;& mux_tree_tapbuf_size3_mem_1_ccff_tail [0] $end
$var wire 1 <& mux_tree_tapbuf_size3_mem_2_ccff_tail [0] $end
$var wire 1 =& mux_tree_tapbuf_size3_mem_3_ccff_tail [0] $end
$var wire 1 >& mux_tree_tapbuf_size4_0_sram [0] $end
$var wire 1 ?& mux_tree_tapbuf_size4_0_sram [1] $end
$var wire 1 @& mux_tree_tapbuf_size4_0_sram [2] $end
$var wire 1 A& mux_tree_tapbuf_size4_10_sram [0] $end
$var wire 1 B& mux_tree_tapbuf_size4_10_sram [1] $end
$var wire 1 C& mux_tree_tapbuf_size4_10_sram [2] $end
$var wire 1 D& mux_tree_tapbuf_size4_11_sram [0] $end
$var wire 1 E& mux_tree_tapbuf_size4_11_sram [1] $end
$var wire 1 F& mux_tree_tapbuf_size4_11_sram [2] $end
$var wire 1 G& mux_tree_tapbuf_size4_1_sram [0] $end
$var wire 1 H& mux_tree_tapbuf_size4_1_sram [1] $end
$var wire 1 I& mux_tree_tapbuf_size4_1_sram [2] $end
$var wire 1 J& mux_tree_tapbuf_size4_2_sram [0] $end
$var wire 1 K& mux_tree_tapbuf_size4_2_sram [1] $end
$var wire 1 L& mux_tree_tapbuf_size4_2_sram [2] $end
$var wire 1 M& mux_tree_tapbuf_size4_3_sram [0] $end
$var wire 1 N& mux_tree_tapbuf_size4_3_sram [1] $end
$var wire 1 O& mux_tree_tapbuf_size4_3_sram [2] $end
$var wire 1 P& mux_tree_tapbuf_size4_4_sram [0] $end
$var wire 1 Q& mux_tree_tapbuf_size4_4_sram [1] $end
$var wire 1 R& mux_tree_tapbuf_size4_4_sram [2] $end
$var wire 1 S& mux_tree_tapbuf_size4_5_sram [0] $end
$var wire 1 T& mux_tree_tapbuf_size4_5_sram [1] $end
$var wire 1 U& mux_tree_tapbuf_size4_5_sram [2] $end
$var wire 1 V& mux_tree_tapbuf_size4_6_sram [0] $end
$var wire 1 W& mux_tree_tapbuf_size4_6_sram [1] $end
$var wire 1 X& mux_tree_tapbuf_size4_6_sram [2] $end
$var wire 1 Y& mux_tree_tapbuf_size4_7_sram [0] $end
$var wire 1 Z& mux_tree_tapbuf_size4_7_sram [1] $end
$var wire 1 [& mux_tree_tapbuf_size4_7_sram [2] $end
$var wire 1 \& mux_tree_tapbuf_size4_8_sram [0] $end
$var wire 1 ]& mux_tree_tapbuf_size4_8_sram [1] $end
$var wire 1 ^& mux_tree_tapbuf_size4_8_sram [2] $end
$var wire 1 _& mux_tree_tapbuf_size4_9_sram [0] $end
$var wire 1 `& mux_tree_tapbuf_size4_9_sram [1] $end
$var wire 1 a& mux_tree_tapbuf_size4_9_sram [2] $end
$var wire 1 b& mux_tree_tapbuf_size4_mem_0_ccff_tail [0] $end
$var wire 1 c& mux_tree_tapbuf_size4_mem_10_ccff_tail [0] $end
$var wire 1 d& mux_tree_tapbuf_size4_mem_11_ccff_tail [0] $end
$var wire 1 e& mux_tree_tapbuf_size4_mem_1_ccff_tail [0] $end
$var wire 1 f& mux_tree_tapbuf_size4_mem_2_ccff_tail [0] $end
$var wire 1 g& mux_tree_tapbuf_size4_mem_3_ccff_tail [0] $end
$var wire 1 h& mux_tree_tapbuf_size4_mem_4_ccff_tail [0] $end
$var wire 1 i& mux_tree_tapbuf_size4_mem_5_ccff_tail [0] $end
$var wire 1 j& mux_tree_tapbuf_size4_mem_6_ccff_tail [0] $end
$var wire 1 k& mux_tree_tapbuf_size4_mem_7_ccff_tail [0] $end
$var wire 1 l& mux_tree_tapbuf_size4_mem_8_ccff_tail [0] $end
$var wire 1 m& mux_tree_tapbuf_size4_mem_9_ccff_tail [0] $end
$var wire 1 n& SYNOPSYS_UNCONNECTED_1 $end
$var wire 1 o& SYNOPSYS_UNCONNECTED_2 $end
$var wire 1 p& SYNOPSYS_UNCONNECTED_3 $end
$var wire 1 q& optlc_net_153 $end
$var wire 1 r& SYNOPSYS_UNCONNECTED_4 $end
$var wire 1 s& SYNOPSYS_UNCONNECTED_5 $end
$var wire 1 t& SYNOPSYS_UNCONNECTED_6 $end
$var wire 1 u& SYNOPSYS_UNCONNECTED_7 $end
$var wire 1 v& SYNOPSYS_UNCONNECTED_8 $end
$var wire 1 w& SYNOPSYS_UNCONNECTED_9 $end
$var wire 1 x& SYNOPSYS_UNCONNECTED_10 $end
$var wire 1 y& SYNOPSYS_UNCONNECTED_11 $end
$var wire 1 z& SYNOPSYS_UNCONNECTED_12 $end
$var wire 1 {& SYNOPSYS_UNCONNECTED_13 $end
$var wire 1 |& SYNOPSYS_UNCONNECTED_14 $end
$var wire 1 }& SYNOPSYS_UNCONNECTED_15 $end
$var wire 1 ~& optlc_net_158 $end
$var wire 1 !' SYNOPSYS_UNCONNECTED_16 $end
$var wire 1 "' SYNOPSYS_UNCONNECTED_17 $end
$var wire 1 #' SYNOPSYS_UNCONNECTED_18 $end
$var wire 1 $' SYNOPSYS_UNCONNECTED_19 $end
$var wire 1 %' SYNOPSYS_UNCONNECTED_20 $end
$var wire 1 &' SYNOPSYS_UNCONNECTED_21 $end
$var wire 1 '' optlc_net_154 $end
$var wire 1 (' SYNOPSYS_UNCONNECTED_22 $end
$var wire 1 )' SYNOPSYS_UNCONNECTED_23 $end
$var wire 1 *' SYNOPSYS_UNCONNECTED_24 $end
$var wire 1 +' optlc_net_156 $end
$var wire 1 ,' SYNOPSYS_UNCONNECTED_25 $end
$var wire 1 -' SYNOPSYS_UNCONNECTED_26 $end
$var wire 1 .' SYNOPSYS_UNCONNECTED_27 $end
$var wire 1 /' optlc_net_159 $end
$var wire 1 0' SYNOPSYS_UNCONNECTED_28 $end
$var wire 1 1' SYNOPSYS_UNCONNECTED_29 $end
$var wire 1 2' SYNOPSYS_UNCONNECTED_30 $end
$var wire 1 3' optlc_net_155 $end
$var wire 1 4' SYNOPSYS_UNCONNECTED_31 $end
$var wire 1 5' SYNOPSYS_UNCONNECTED_32 $end
$var wire 1 6' SYNOPSYS_UNCONNECTED_33 $end
$var wire 1 7' SYNOPSYS_UNCONNECTED_34 $end
$var wire 1 8' SYNOPSYS_UNCONNECTED_35 $end
$var wire 1 9' SYNOPSYS_UNCONNECTED_36 $end
$var wire 1 :' SYNOPSYS_UNCONNECTED_37 $end
$var wire 1 ;' SYNOPSYS_UNCONNECTED_38 $end
$var wire 1 <' optlc_net_157 $end
$var wire 1 =' SYNOPSYS_UNCONNECTED_39 $end
$var wire 1 >' SYNOPSYS_UNCONNECTED_40 $end
$var wire 1 ?' SYNOPSYS_UNCONNECTED_41 $end
$var wire 1 @' SYNOPSYS_UNCONNECTED_42 $end
$var wire 1 A' SYNOPSYS_UNCONNECTED_43 $end
$var wire 1 B' SYNOPSYS_UNCONNECTED_44 $end
$var wire 1 C' SYNOPSYS_UNCONNECTED_45 $end
$var wire 1 D' SYNOPSYS_UNCONNECTED_46 $end
$var wire 1 E' SYNOPSYS_UNCONNECTED_47 $end
$var wire 1 F' SYNOPSYS_UNCONNECTED_48 $end
$var wire 1 G' SYNOPSYS_UNCONNECTED_49 $end
$var wire 1 H' SYNOPSYS_UNCONNECTED_50 $end
$var wire 1 I' SYNOPSYS_UNCONNECTED_51 $end
$var wire 1 J' SYNOPSYS_UNCONNECTED_52 $end
$var wire 1 K' SYNOPSYS_UNCONNECTED_53 $end
$var wire 1 L' SYNOPSYS_UNCONNECTED_54 $end
$var wire 1 M' SYNOPSYS_UNCONNECTED_55 $end
$var wire 1 N' SYNOPSYS_UNCONNECTED_56 $end
$var wire 1 O' SYNOPSYS_UNCONNECTED_57 $end
$var wire 1 P' SYNOPSYS_UNCONNECTED_58 $end
$var wire 1 Q' SYNOPSYS_UNCONNECTED_59 $end
$var wire 1 R' SYNOPSYS_UNCONNECTED_60 $end
$var wire 1 S' SYNOPSYS_UNCONNECTED_61 $end
$var wire 1 T' SYNOPSYS_UNCONNECTED_62 $end
$var wire 1 U' SYNOPSYS_UNCONNECTED_63 $end
$var wire 1 V' SYNOPSYS_UNCONNECTED_64 $end
$var wire 1 W' SYNOPSYS_UNCONNECTED_65 $end
$var wire 1 X' SYNOPSYS_UNCONNECTED_66 $end
$var wire 1 Y' SYNOPSYS_UNCONNECTED_67 $end
$var wire 1 Z' SYNOPSYS_UNCONNECTED_68 $end
$var wire 1 [' optlc_net_160 $end
$var wire 1 \' SYNOPSYS_UNCONNECTED_69 $end
$var wire 1 ]' SYNOPSYS_UNCONNECTED_70 $end
$var wire 1 ^' SYNOPSYS_UNCONNECTED_71 $end
$var wire 1 _' SYNOPSYS_UNCONNECTED_72 $end
$var wire 1 `' SYNOPSYS_UNCONNECTED_73 $end
$var wire 1 a' SYNOPSYS_UNCONNECTED_74 $end
$var wire 1 b' SYNOPSYS_UNCONNECTED_75 $end
$var wire 1 c' SYNOPSYS_UNCONNECTED_76 $end
$var wire 1 d' SYNOPSYS_UNCONNECTED_77 $end
$var wire 1 e' SYNOPSYS_UNCONNECTED_78 $end
$var wire 1 f' SYNOPSYS_UNCONNECTED_79 $end
$var wire 1 g' SYNOPSYS_UNCONNECTED_80 $end
$var wire 1 h' SYNOPSYS_UNCONNECTED_81 $end
$var wire 1 i' SYNOPSYS_UNCONNECTED_82 $end
$var wire 1 j' SYNOPSYS_UNCONNECTED_83 $end
$var wire 1 k' SYNOPSYS_UNCONNECTED_84 $end
$var wire 1 l' SYNOPSYS_UNCONNECTED_85 $end
$var wire 1 m' SYNOPSYS_UNCONNECTED_86 $end
$var wire 1 n' SYNOPSYS_UNCONNECTED_87 $end
$var wire 1 o' SYNOPSYS_UNCONNECTED_88 $end
$var wire 1 p' SYNOPSYS_UNCONNECTED_89 $end
$var wire 1 q' SYNOPSYS_UNCONNECTED_90 $end
$var wire 1 r' SYNOPSYS_UNCONNECTED_91 $end
$var wire 1 s' SYNOPSYS_UNCONNECTED_92 $end
$var wire 1 t' SYNOPSYS_UNCONNECTED_93 $end
$var wire 1 u' SYNOPSYS_UNCONNECTED_94 $end
$var wire 1 v' SYNOPSYS_UNCONNECTED_95 $end
$var wire 1 w' SYNOPSYS_UNCONNECTED_96 $end
$var wire 1 x' SYNOPSYS_UNCONNECTED_97 $end
$var wire 1 y' SYNOPSYS_UNCONNECTED_98 $end
$var wire 1 z' SYNOPSYS_UNCONNECTED_99 $end
$var wire 1 {' SYNOPSYS_UNCONNECTED_100 $end
$var wire 1 |' SYNOPSYS_UNCONNECTED_101 $end
$var wire 1 }' SYNOPSYS_UNCONNECTED_102 $end
$var wire 1 ~' SYNOPSYS_UNCONNECTED_103 $end
$var wire 1 !( SYNOPSYS_UNCONNECTED_104 $end
$var wire 1 "( SYNOPSYS_UNCONNECTED_105 $end
$var wire 1 #( SYNOPSYS_UNCONNECTED_106 $end
$var wire 1 $( SYNOPSYS_UNCONNECTED_107 $end
$var wire 1 %( SYNOPSYS_UNCONNECTED_108 $end
$var wire 1 &( SYNOPSYS_UNCONNECTED_109 $end
$var wire 1 '( SYNOPSYS_UNCONNECTED_110 $end
$var wire 1 (( SYNOPSYS_UNCONNECTED_111 $end
$var wire 1 )( SYNOPSYS_UNCONNECTED_112 $end
$var wire 1 *( SYNOPSYS_UNCONNECTED_113 $end
$var wire 1 +( SYNOPSYS_UNCONNECTED_114 $end
$var wire 1 ,( SYNOPSYS_UNCONNECTED_115 $end
$var wire 1 -( SYNOPSYS_UNCONNECTED_116 $end
$var wire 1 .( SYNOPSYS_UNCONNECTED_117 $end
$var wire 1 /( SYNOPSYS_UNCONNECTED_118 $end
$var wire 1 0( SYNOPSYS_UNCONNECTED_119 $end
$var wire 1 1( SYNOPSYS_UNCONNECTED_120 $end
$var wire 1 2( SYNOPSYS_UNCONNECTED_121 $end
$var wire 1 3( SYNOPSYS_UNCONNECTED_122 $end
$var wire 1 4( SYNOPSYS_UNCONNECTED_123 $end
$var wire 1 5( SYNOPSYS_UNCONNECTED_124 $end
$var wire 1 6( SYNOPSYS_UNCONNECTED_125 $end
$var wire 1 7( SYNOPSYS_UNCONNECTED_126 $end
$scope module mux_bottom_track_1 $end
$var wire 1 j# in [0] $end
$var wire 1 m# in [1] $end
$var wire 1 p# in [2] $end
$var wire 1 t# in [3] $end
$var wire 1 >& sram [0] $end
$var wire 1 ?& sram [1] $end
$var wire 1 @& sram [2] $end
$var wire 1 n& sram_inv [0] $end
$var wire 1 o& sram_inv [1] $end
$var wire 1 p& sram_inv [2] $end
$var wire 1 =$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 8( sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 9( sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 :( sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 ;( sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 <( BUF_net_62 $end
$scope module mux_l1_in_0_ $end
$var wire 1 8( X $end
$var wire 1 m# A0 $end
$var wire 1 j# A1 $end
$var wire 1 >& S $end
$var supply1 1 =( VPWR $end
$var supply0 1 >( VGND $end
$var supply1 1 ?( VPB $end
$var supply0 1 @( VNB $end
$scope module base $end
$var wire 1 8( X $end
$var wire 1 m# A0 $end
$var wire 1 j# A1 $end
$var wire 1 >& S $end
$var wire 1 A( mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 9( X $end
$var wire 1 p# A0 $end
$var wire 1 8( A1 $end
$var wire 1 ?& S $end
$var supply1 1 B( VPWR $end
$var supply0 1 C( VGND $end
$var supply1 1 D( VPB $end
$var supply0 1 E( VNB $end
$scope module base $end
$var wire 1 9( X $end
$var wire 1 p# A0 $end
$var wire 1 8( A1 $end
$var wire 1 ?& S $end
$var wire 1 F( mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 :( X $end
$var wire 1 q& A0 $end
$var wire 1 t# A1 $end
$var wire 1 ?& S $end
$var supply1 1 G( VPWR $end
$var supply0 1 H( VGND $end
$var supply1 1 I( VPB $end
$var supply0 1 J( VNB $end
$scope module base $end
$var wire 1 :( X $end
$var wire 1 q& A0 $end
$var wire 1 t# A1 $end
$var wire 1 ?& S $end
$var wire 1 K( mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 ;( X $end
$var wire 1 :( A0 $end
$var wire 1 9( A1 $end
$var wire 1 @& S $end
$var supply1 1 L( VPWR $end
$var supply0 1 M( VGND $end
$var supply1 1 N( VPB $end
$var supply0 1 O( VNB $end
$scope module base $end
$var wire 1 ;( X $end
$var wire 1 :( A0 $end
$var wire 1 9( A1 $end
$var wire 1 @& S $end
$var wire 1 P( mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_61 $end
$var wire 1 =$ Y $end
$var wire 1 <( A $end
$var supply1 1 Q( VPWR $end
$var supply0 1 R( VGND $end
$var supply1 1 S( VPB $end
$var supply0 1 T( VNB $end
$scope module base $end
$var wire 1 =$ Y $end
$var wire 1 <( A $end
$var wire 1 U( not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_62 $end
$var wire 1 <( Y $end
$var wire 1 ;( A $end
$var supply1 1 V( VPWR $end
$var supply0 1 W( VGND $end
$var supply1 1 X( VPB $end
$var supply0 1 Y( VNB $end
$scope module base $end
$var wire 1 <( Y $end
$var wire 1 ;( A $end
$var wire 1 Z( not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_3 $end
$var wire 1 k# in [0] $end
$var wire 1 n# in [1] $end
$var wire 1 q# in [2] $end
$var wire 1 u# in [3] $end
$var wire 1 G& sram [0] $end
$var wire 1 H& sram [1] $end
$var wire 1 I& sram [2] $end
$var wire 1 r& sram_inv [0] $end
$var wire 1 s& sram_inv [1] $end
$var wire 1 t& sram_inv [2] $end
$var wire 1 >$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 [( sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 \( sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 ]( sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 ^( sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 _( BUF_net_64 $end
$scope module mux_l1_in_0_ $end
$var wire 1 [( X $end
$var wire 1 n# A0 $end
$var wire 1 k# A1 $end
$var wire 1 G& S $end
$var supply1 1 `( VPWR $end
$var supply0 1 a( VGND $end
$var supply1 1 b( VPB $end
$var supply0 1 c( VNB $end
$scope module base $end
$var wire 1 [( X $end
$var wire 1 n# A0 $end
$var wire 1 k# A1 $end
$var wire 1 G& S $end
$var wire 1 d( mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 \( X $end
$var wire 1 q# A0 $end
$var wire 1 [( A1 $end
$var wire 1 H& S $end
$var supply1 1 e( VPWR $end
$var supply0 1 f( VGND $end
$var supply1 1 g( VPB $end
$var supply0 1 h( VNB $end
$scope module base $end
$var wire 1 \( X $end
$var wire 1 q# A0 $end
$var wire 1 [( A1 $end
$var wire 1 H& S $end
$var wire 1 i( mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 ]( X $end
$var wire 1 q& A0 $end
$var wire 1 u# A1 $end
$var wire 1 H& S $end
$var supply1 1 j( VPWR $end
$var supply0 1 k( VGND $end
$var supply1 1 l( VPB $end
$var supply0 1 m( VNB $end
$scope module base $end
$var wire 1 ]( X $end
$var wire 1 q& A0 $end
$var wire 1 u# A1 $end
$var wire 1 H& S $end
$var wire 1 n( mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 ^( X $end
$var wire 1 ]( A0 $end
$var wire 1 \( A1 $end
$var wire 1 I& S $end
$var supply1 1 o( VPWR $end
$var supply0 1 p( VGND $end
$var supply1 1 q( VPB $end
$var supply0 1 r( VNB $end
$scope module base $end
$var wire 1 ^( X $end
$var wire 1 ]( A0 $end
$var wire 1 \( A1 $end
$var wire 1 I& S $end
$var wire 1 s( mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_63 $end
$var wire 1 >$ Y $end
$var wire 1 _( A $end
$var supply1 1 t( VPWR $end
$var supply0 1 u( VGND $end
$var supply1 1 v( VPB $end
$var supply0 1 w( VNB $end
$scope module base $end
$var wire 1 >$ Y $end
$var wire 1 _( A $end
$var wire 1 x( not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_64 $end
$var wire 1 _( Y $end
$var wire 1 ^( A $end
$var supply1 1 y( VPWR $end
$var supply0 1 z( VGND $end
$var supply1 1 {( VPB $end
$var supply0 1 |( VNB $end
$scope module base $end
$var wire 1 _( Y $end
$var wire 1 ^( A $end
$var wire 1 }( not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_5 $end
$var wire 1 l# in [0] $end
$var wire 1 o# in [1] $end
$var wire 1 r# in [2] $end
$var wire 1 v# in [3] $end
$var wire 1 J& sram [0] $end
$var wire 1 K& sram [1] $end
$var wire 1 L& sram [2] $end
$var wire 1 u& sram_inv [0] $end
$var wire 1 v& sram_inv [1] $end
$var wire 1 w& sram_inv [2] $end
$var wire 1 ?$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 ~( sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 !) sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 ") sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 #) sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 $) BUF_net_66 $end
$scope module mux_l1_in_0_ $end
$var wire 1 ~( X $end
$var wire 1 o# A0 $end
$var wire 1 l# A1 $end
$var wire 1 J& S $end
$var supply1 1 %) VPWR $end
$var supply0 1 &) VGND $end
$var supply1 1 ') VPB $end
$var supply0 1 () VNB $end
$scope module base $end
$var wire 1 ~( X $end
$var wire 1 o# A0 $end
$var wire 1 l# A1 $end
$var wire 1 J& S $end
$var wire 1 )) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 !) X $end
$var wire 1 r# A0 $end
$var wire 1 ~( A1 $end
$var wire 1 K& S $end
$var supply1 1 *) VPWR $end
$var supply0 1 +) VGND $end
$var supply1 1 ,) VPB $end
$var supply0 1 -) VNB $end
$scope module base $end
$var wire 1 !) X $end
$var wire 1 r# A0 $end
$var wire 1 ~( A1 $end
$var wire 1 K& S $end
$var wire 1 .) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 ") X $end
$var wire 1 q& A0 $end
$var wire 1 v# A1 $end
$var wire 1 K& S $end
$var supply1 1 /) VPWR $end
$var supply0 1 0) VGND $end
$var supply1 1 1) VPB $end
$var supply0 1 2) VNB $end
$scope module base $end
$var wire 1 ") X $end
$var wire 1 q& A0 $end
$var wire 1 v# A1 $end
$var wire 1 K& S $end
$var wire 1 3) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 #) X $end
$var wire 1 ") A0 $end
$var wire 1 !) A1 $end
$var wire 1 L& S $end
$var supply1 1 4) VPWR $end
$var supply0 1 5) VGND $end
$var supply1 1 6) VPB $end
$var supply0 1 7) VNB $end
$scope module base $end
$var wire 1 #) X $end
$var wire 1 ") A0 $end
$var wire 1 !) A1 $end
$var wire 1 L& S $end
$var wire 1 8) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_65 $end
$var wire 1 ?$ Y $end
$var wire 1 $) A $end
$var supply1 1 9) VPWR $end
$var supply0 1 :) VGND $end
$var supply1 1 ;) VPB $end
$var supply0 1 <) VNB $end
$scope module base $end
$var wire 1 ?$ Y $end
$var wire 1 $) A $end
$var wire 1 =) not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_66 $end
$var wire 1 $) Y $end
$var wire 1 #) A $end
$var supply1 1 >) VPWR $end
$var supply0 1 ?) VGND $end
$var supply1 1 @) VPB $end
$var supply0 1 A) VNB $end
$scope module base $end
$var wire 1 $) Y $end
$var wire 1 #) A $end
$var wire 1 B) not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_7 $end
$var wire 1 j# in [0] $end
$var wire 1 m# in [1] $end
$var wire 1 p# in [2] $end
$var wire 1 w# in [3] $end
$var wire 1 M& sram [0] $end
$var wire 1 N& sram [1] $end
$var wire 1 O& sram [2] $end
$var wire 1 x& sram_inv [0] $end
$var wire 1 y& sram_inv [1] $end
$var wire 1 z& sram_inv [2] $end
$var wire 1 @$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 C) sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 D) sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 E) sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 F) sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 G) BUF_net_68 $end
$scope module mux_l1_in_0_ $end
$var wire 1 C) X $end
$var wire 1 m# A0 $end
$var wire 1 j# A1 $end
$var wire 1 M& S $end
$var supply1 1 H) VPWR $end
$var supply0 1 I) VGND $end
$var supply1 1 J) VPB $end
$var supply0 1 K) VNB $end
$scope module base $end
$var wire 1 C) X $end
$var wire 1 m# A0 $end
$var wire 1 j# A1 $end
$var wire 1 M& S $end
$var wire 1 L) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 D) X $end
$var wire 1 p# A0 $end
$var wire 1 C) A1 $end
$var wire 1 N& S $end
$var supply1 1 M) VPWR $end
$var supply0 1 N) VGND $end
$var supply1 1 O) VPB $end
$var supply0 1 P) VNB $end
$scope module base $end
$var wire 1 D) X $end
$var wire 1 p# A0 $end
$var wire 1 C) A1 $end
$var wire 1 N& S $end
$var wire 1 Q) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 E) X $end
$var wire 1 q& A0 $end
$var wire 1 w# A1 $end
$var wire 1 N& S $end
$var supply1 1 R) VPWR $end
$var supply0 1 S) VGND $end
$var supply1 1 T) VPB $end
$var supply0 1 U) VNB $end
$scope module base $end
$var wire 1 E) X $end
$var wire 1 q& A0 $end
$var wire 1 w# A1 $end
$var wire 1 N& S $end
$var wire 1 V) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 F) X $end
$var wire 1 E) A0 $end
$var wire 1 D) A1 $end
$var wire 1 O& S $end
$var supply1 1 W) VPWR $end
$var supply0 1 X) VGND $end
$var supply1 1 Y) VPB $end
$var supply0 1 Z) VNB $end
$scope module base $end
$var wire 1 F) X $end
$var wire 1 E) A0 $end
$var wire 1 D) A1 $end
$var wire 1 O& S $end
$var wire 1 [) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_67 $end
$var wire 1 @$ Y $end
$var wire 1 G) A $end
$var supply1 1 \) VPWR $end
$var supply0 1 ]) VGND $end
$var supply1 1 ^) VPB $end
$var supply0 1 _) VNB $end
$scope module base $end
$var wire 1 @$ Y $end
$var wire 1 G) A $end
$var wire 1 `) not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_68 $end
$var wire 1 G) Y $end
$var wire 1 F) A $end
$var supply1 1 a) VPWR $end
$var supply0 1 b) VGND $end
$var supply1 1 c) VPB $end
$var supply0 1 d) VNB $end
$scope module base $end
$var wire 1 G) Y $end
$var wire 1 F) A $end
$var wire 1 e) not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_9 $end
$var wire 1 k# in [0] $end
$var wire 1 n# in [1] $end
$var wire 1 q# in [2] $end
$var wire 1 x# in [3] $end
$var wire 1 P& sram [0] $end
$var wire 1 Q& sram [1] $end
$var wire 1 R& sram [2] $end
$var wire 1 {& sram_inv [0] $end
$var wire 1 |& sram_inv [1] $end
$var wire 1 }& sram_inv [2] $end
$var wire 1 A$ out [0] $end
$var wire 1 ~& p0 $end
$var wire 1 f) sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 g) sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 h) sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 i) sky130_fd_sc_hd__mux2_1_3_X [0] $end
$scope module mux_l1_in_0_ $end
$var wire 1 f) X $end
$var wire 1 n# A0 $end
$var wire 1 k# A1 $end
$var wire 1 P& S $end
$var supply1 1 j) VPWR $end
$var supply0 1 k) VGND $end
$var supply1 1 l) VPB $end
$var supply0 1 m) VNB $end
$scope module base $end
$var wire 1 f) X $end
$var wire 1 n# A0 $end
$var wire 1 k# A1 $end
$var wire 1 P& S $end
$var wire 1 n) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 g) X $end
$var wire 1 q# A0 $end
$var wire 1 f) A1 $end
$var wire 1 Q& S $end
$var supply1 1 o) VPWR $end
$var supply0 1 p) VGND $end
$var supply1 1 q) VPB $end
$var supply0 1 r) VNB $end
$scope module base $end
$var wire 1 g) X $end
$var wire 1 q# A0 $end
$var wire 1 f) A1 $end
$var wire 1 Q& S $end
$var wire 1 s) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 h) X $end
$var wire 1 ~& A0 $end
$var wire 1 x# A1 $end
$var wire 1 Q& S $end
$var supply1 1 t) VPWR $end
$var supply0 1 u) VGND $end
$var supply1 1 v) VPB $end
$var supply0 1 w) VNB $end
$scope module base $end
$var wire 1 h) X $end
$var wire 1 ~& A0 $end
$var wire 1 x# A1 $end
$var wire 1 Q& S $end
$var wire 1 x) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 i) X $end
$var wire 1 h) A0 $end
$var wire 1 g) A1 $end
$var wire 1 R& S $end
$var supply1 1 y) VPWR $end
$var supply0 1 z) VGND $end
$var supply1 1 {) VPB $end
$var supply0 1 |) VNB $end
$scope module base $end
$var wire 1 i) X $end
$var wire 1 h) A0 $end
$var wire 1 g) A1 $end
$var wire 1 R& S $end
$var wire 1 }) mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BUFT_RR_69 $end
$var wire 1 A$ X $end
$var wire 1 i) A $end
$var supply1 1 ~) VPWR $end
$var supply0 1 !* VGND $end
$var supply1 1 "* VPB $end
$var supply0 1 #* VNB $end
$scope module base $end
$var wire 1 A$ X $end
$var wire 1 i) A $end
$var wire 1 $* buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_11 $end
$var wire 1 l# in [0] $end
$var wire 1 o# in [1] $end
$var wire 1 r# in [2] $end
$var wire 1 y# in [3] $end
$var wire 1 S& sram [0] $end
$var wire 1 T& sram [1] $end
$var wire 1 U& sram [2] $end
$var wire 1 !' sram_inv [0] $end
$var wire 1 "' sram_inv [1] $end
$var wire 1 #' sram_inv [2] $end
$var wire 1 B$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 %* sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 &* sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 '* sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 (* sky130_fd_sc_hd__mux2_1_3_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 B$ X $end
$var wire 1 (* A $end
$var supply1 1 )* VPWR $end
$var supply0 1 ** VGND $end
$var supply1 1 +* VPB $end
$var supply0 1 ,* VNB $end
$scope module base $end
$var wire 1 B$ X $end
$var wire 1 (* A $end
$var wire 1 -* buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 %* X $end
$var wire 1 o# A0 $end
$var wire 1 l# A1 $end
$var wire 1 S& S $end
$var supply1 1 .* VPWR $end
$var supply0 1 /* VGND $end
$var supply1 1 0* VPB $end
$var supply0 1 1* VNB $end
$scope module base $end
$var wire 1 %* X $end
$var wire 1 o# A0 $end
$var wire 1 l# A1 $end
$var wire 1 S& S $end
$var wire 1 2* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 &* X $end
$var wire 1 r# A0 $end
$var wire 1 %* A1 $end
$var wire 1 T& S $end
$var supply1 1 3* VPWR $end
$var supply0 1 4* VGND $end
$var supply1 1 5* VPB $end
$var supply0 1 6* VNB $end
$scope module base $end
$var wire 1 &* X $end
$var wire 1 r# A0 $end
$var wire 1 %* A1 $end
$var wire 1 T& S $end
$var wire 1 7* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 '* X $end
$var wire 1 q& A0 $end
$var wire 1 y# A1 $end
$var wire 1 T& S $end
$var supply1 1 8* VPWR $end
$var supply0 1 9* VGND $end
$var supply1 1 :* VPB $end
$var supply0 1 ;* VNB $end
$scope module base $end
$var wire 1 '* X $end
$var wire 1 q& A0 $end
$var wire 1 y# A1 $end
$var wire 1 T& S $end
$var wire 1 <* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 (* X $end
$var wire 1 '* A0 $end
$var wire 1 &* A1 $end
$var wire 1 U& S $end
$var supply1 1 =* VPWR $end
$var supply0 1 >* VGND $end
$var supply1 1 ?* VPB $end
$var supply0 1 @* VNB $end
$scope module base $end
$var wire 1 (* X $end
$var wire 1 '* A0 $end
$var wire 1 &* A1 $end
$var wire 1 U& S $end
$var wire 1 A* mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_1 $end
$var wire 1 i# in [0] $end
$var wire 1 3$ in [1] $end
$var wire 1 6$ in [2] $end
$var wire 1 9$ in [3] $end
$var wire 1 V& sram [0] $end
$var wire 1 W& sram [1] $end
$var wire 1 X& sram [2] $end
$var wire 1 $' sram_inv [0] $end
$var wire 1 %' sram_inv [1] $end
$var wire 1 &' sram_inv [2] $end
$var wire 1 [$ out [0] $end
$var wire 1 '' p0 $end
$var wire 1 B* sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 C* sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 D* sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 E* sky130_fd_sc_hd__mux2_1_3_X [0] $end
$scope module mux_l1_in_0_ $end
$var wire 1 B* X $end
$var wire 1 3$ A0 $end
$var wire 1 i# A1 $end
$var wire 1 V& S $end
$var supply1 1 F* VPWR $end
$var supply0 1 G* VGND $end
$var supply1 1 H* VPB $end
$var supply0 1 I* VNB $end
$scope module base $end
$var wire 1 B* X $end
$var wire 1 3$ A0 $end
$var wire 1 i# A1 $end
$var wire 1 V& S $end
$var wire 1 J* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 C* X $end
$var wire 1 6$ A0 $end
$var wire 1 B* A1 $end
$var wire 1 W& S $end
$var supply1 1 K* VPWR $end
$var supply0 1 L* VGND $end
$var supply1 1 M* VPB $end
$var supply0 1 N* VNB $end
$scope module base $end
$var wire 1 C* X $end
$var wire 1 6$ A0 $end
$var wire 1 B* A1 $end
$var wire 1 W& S $end
$var wire 1 O* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 D* X $end
$var wire 1 '' A0 $end
$var wire 1 9$ A1 $end
$var wire 1 W& S $end
$var supply1 1 P* VPWR $end
$var supply0 1 Q* VGND $end
$var supply1 1 R* VPB $end
$var supply0 1 S* VNB $end
$scope module base $end
$var wire 1 D* X $end
$var wire 1 '' A0 $end
$var wire 1 9$ A1 $end
$var wire 1 W& S $end
$var wire 1 T* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 E* X $end
$var wire 1 D* A0 $end
$var wire 1 C* A1 $end
$var wire 1 X& S $end
$var supply1 1 U* VPWR $end
$var supply0 1 V* VGND $end
$var supply1 1 W* VPB $end
$var supply0 1 X* VNB $end
$scope module base $end
$var wire 1 E* X $end
$var wire 1 D* A0 $end
$var wire 1 C* A1 $end
$var wire 1 X& S $end
$var wire 1 Y* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BUFT_RR_70 $end
$var wire 1 [$ X $end
$var wire 1 E* A $end
$var supply1 1 Z* VPWR $end
$var supply0 1 [* VGND $end
$var supply1 1 \* VPB $end
$var supply0 1 ]* VNB $end
$scope module base $end
$var wire 1 [$ X $end
$var wire 1 E* A $end
$var wire 1 ^* buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_3 $end
$var wire 1 L# in [0] $end
$var wire 1 4$ in [1] $end
$var wire 1 7$ in [2] $end
$var wire 1 :$ in [3] $end
$var wire 1 Y& sram [0] $end
$var wire 1 Z& sram [1] $end
$var wire 1 [& sram [2] $end
$var wire 1 (' sram_inv [0] $end
$var wire 1 )' sram_inv [1] $end
$var wire 1 *' sram_inv [2] $end
$var wire 1 \$ out [0] $end
$var wire 1 +' p0 $end
$var wire 1 _* sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 `* sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 a* sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 b* sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 c* BUF_net_72 $end
$scope module mux_l1_in_0_ $end
$var wire 1 _* X $end
$var wire 1 4$ A0 $end
$var wire 1 L# A1 $end
$var wire 1 Y& S $end
$var supply1 1 d* VPWR $end
$var supply0 1 e* VGND $end
$var supply1 1 f* VPB $end
$var supply0 1 g* VNB $end
$scope module base $end
$var wire 1 _* X $end
$var wire 1 4$ A0 $end
$var wire 1 L# A1 $end
$var wire 1 Y& S $end
$var wire 1 h* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 `* X $end
$var wire 1 7$ A0 $end
$var wire 1 _* A1 $end
$var wire 1 Z& S $end
$var supply1 1 i* VPWR $end
$var supply0 1 j* VGND $end
$var supply1 1 k* VPB $end
$var supply0 1 l* VNB $end
$scope module base $end
$var wire 1 `* X $end
$var wire 1 7$ A0 $end
$var wire 1 _* A1 $end
$var wire 1 Z& S $end
$var wire 1 m* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 a* X $end
$var wire 1 +' A0 $end
$var wire 1 :$ A1 $end
$var wire 1 Z& S $end
$var supply1 1 n* VPWR $end
$var supply0 1 o* VGND $end
$var supply1 1 p* VPB $end
$var supply0 1 q* VNB $end
$scope module base $end
$var wire 1 a* X $end
$var wire 1 +' A0 $end
$var wire 1 :$ A1 $end
$var wire 1 Z& S $end
$var wire 1 r* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 b* X $end
$var wire 1 a* A0 $end
$var wire 1 `* A1 $end
$var wire 1 [& S $end
$var supply1 1 s* VPWR $end
$var supply0 1 t* VGND $end
$var supply1 1 u* VPB $end
$var supply0 1 v* VNB $end
$scope module base $end
$var wire 1 b* X $end
$var wire 1 a* A0 $end
$var wire 1 `* A1 $end
$var wire 1 [& S $end
$var wire 1 w* mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_71 $end
$var wire 1 \$ Y $end
$var wire 1 c* A $end
$var supply1 1 x* VPWR $end
$var supply0 1 y* VGND $end
$var supply1 1 z* VPB $end
$var supply0 1 {* VNB $end
$scope module base $end
$var wire 1 \$ Y $end
$var wire 1 c* A $end
$var wire 1 |* not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_72 $end
$var wire 1 c* Y $end
$var wire 1 b* A $end
$var supply1 1 }* VPWR $end
$var supply0 1 ~* VGND $end
$var supply1 1 !+ VPB $end
$var supply0 1 "+ VNB $end
$scope module base $end
$var wire 1 c* Y $end
$var wire 1 b* A $end
$var wire 1 #+ not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_5 $end
$var wire 1 M# in [0] $end
$var wire 1 5$ in [1] $end
$var wire 1 8$ in [2] $end
$var wire 1 ;$ in [3] $end
$var wire 1 \& sram [0] $end
$var wire 1 ]& sram [1] $end
$var wire 1 ^& sram [2] $end
$var wire 1 ,' sram_inv [0] $end
$var wire 1 -' sram_inv [1] $end
$var wire 1 .' sram_inv [2] $end
$var wire 1 ]$ out [0] $end
$var wire 1 /' p0 $end
$var wire 1 $+ sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 %+ sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 &+ sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 '+ sky130_fd_sc_hd__mux2_1_3_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 ]$ X $end
$var wire 1 '+ A $end
$var supply1 1 (+ VPWR $end
$var supply0 1 )+ VGND $end
$var supply1 1 *+ VPB $end
$var supply0 1 ++ VNB $end
$scope module base $end
$var wire 1 ]$ X $end
$var wire 1 '+ A $end
$var wire 1 ,+ buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 $+ X $end
$var wire 1 5$ A0 $end
$var wire 1 M# A1 $end
$var wire 1 \& S $end
$var supply1 1 -+ VPWR $end
$var supply0 1 .+ VGND $end
$var supply1 1 /+ VPB $end
$var supply0 1 0+ VNB $end
$scope module base $end
$var wire 1 $+ X $end
$var wire 1 5$ A0 $end
$var wire 1 M# A1 $end
$var wire 1 \& S $end
$var wire 1 1+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 %+ X $end
$var wire 1 8$ A0 $end
$var wire 1 $+ A1 $end
$var wire 1 ]& S $end
$var supply1 1 2+ VPWR $end
$var supply0 1 3+ VGND $end
$var supply1 1 4+ VPB $end
$var supply0 1 5+ VNB $end
$scope module base $end
$var wire 1 %+ X $end
$var wire 1 8$ A0 $end
$var wire 1 $+ A1 $end
$var wire 1 ]& S $end
$var wire 1 6+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 &+ X $end
$var wire 1 /' A0 $end
$var wire 1 ;$ A1 $end
$var wire 1 ]& S $end
$var supply1 1 7+ VPWR $end
$var supply0 1 8+ VGND $end
$var supply1 1 9+ VPB $end
$var supply0 1 :+ VNB $end
$scope module base $end
$var wire 1 &+ X $end
$var wire 1 /' A0 $end
$var wire 1 ;$ A1 $end
$var wire 1 ]& S $end
$var wire 1 ;+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 '+ X $end
$var wire 1 &+ A0 $end
$var wire 1 %+ A1 $end
$var wire 1 ^& S $end
$var supply1 1 <+ VPWR $end
$var supply0 1 =+ VGND $end
$var supply1 1 >+ VPB $end
$var supply0 1 ?+ VNB $end
$scope module base $end
$var wire 1 '+ X $end
$var wire 1 &+ A0 $end
$var wire 1 %+ A1 $end
$var wire 1 ^& S $end
$var wire 1 @+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_7 $end
$var wire 1 N# in [0] $end
$var wire 1 3$ in [1] $end
$var wire 1 6$ in [2] $end
$var wire 1 9$ in [3] $end
$var wire 1 _& sram [0] $end
$var wire 1 `& sram [1] $end
$var wire 1 a& sram [2] $end
$var wire 1 0' sram_inv [0] $end
$var wire 1 1' sram_inv [1] $end
$var wire 1 2' sram_inv [2] $end
$var wire 1 ^$ out [0] $end
$var wire 1 3' p0 $end
$var wire 1 A+ sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 B+ sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 C+ sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 D+ sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 E+ BUF_net_74 $end
$scope module mux_l1_in_0_ $end
$var wire 1 A+ X $end
$var wire 1 3$ A0 $end
$var wire 1 N# A1 $end
$var wire 1 _& S $end
$var supply1 1 F+ VPWR $end
$var supply0 1 G+ VGND $end
$var supply1 1 H+ VPB $end
$var supply0 1 I+ VNB $end
$scope module base $end
$var wire 1 A+ X $end
$var wire 1 3$ A0 $end
$var wire 1 N# A1 $end
$var wire 1 _& S $end
$var wire 1 J+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 B+ X $end
$var wire 1 6$ A0 $end
$var wire 1 A+ A1 $end
$var wire 1 `& S $end
$var supply1 1 K+ VPWR $end
$var supply0 1 L+ VGND $end
$var supply1 1 M+ VPB $end
$var supply0 1 N+ VNB $end
$scope module base $end
$var wire 1 B+ X $end
$var wire 1 6$ A0 $end
$var wire 1 A+ A1 $end
$var wire 1 `& S $end
$var wire 1 O+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 C+ X $end
$var wire 1 3' A0 $end
$var wire 1 9$ A1 $end
$var wire 1 `& S $end
$var supply1 1 P+ VPWR $end
$var supply0 1 Q+ VGND $end
$var supply1 1 R+ VPB $end
$var supply0 1 S+ VNB $end
$scope module base $end
$var wire 1 C+ X $end
$var wire 1 3' A0 $end
$var wire 1 9$ A1 $end
$var wire 1 `& S $end
$var wire 1 T+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 D+ X $end
$var wire 1 C+ A0 $end
$var wire 1 B+ A1 $end
$var wire 1 a& S $end
$var supply1 1 U+ VPWR $end
$var supply0 1 V+ VGND $end
$var supply1 1 W+ VPB $end
$var supply0 1 X+ VNB $end
$scope module base $end
$var wire 1 D+ X $end
$var wire 1 C+ A0 $end
$var wire 1 B+ A1 $end
$var wire 1 a& S $end
$var wire 1 Y+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_73 $end
$var wire 1 ^$ Y $end
$var wire 1 E+ A $end
$var supply1 1 Z+ VPWR $end
$var supply0 1 [+ VGND $end
$var supply1 1 \+ VPB $end
$var supply0 1 ]+ VNB $end
$scope module base $end
$var wire 1 ^$ Y $end
$var wire 1 E+ A $end
$var wire 1 ^+ not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_74 $end
$var wire 1 E+ Y $end
$var wire 1 D+ A $end
$var supply1 1 _+ VPWR $end
$var supply0 1 `+ VGND $end
$var supply1 1 a+ VPB $end
$var supply0 1 b+ VNB $end
$scope module base $end
$var wire 1 E+ Y $end
$var wire 1 D+ A $end
$var wire 1 c+ not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_9 $end
$var wire 1 O# in [0] $end
$var wire 1 4$ in [1] $end
$var wire 1 7$ in [2] $end
$var wire 1 :$ in [3] $end
$var wire 1 A& sram [0] $end
$var wire 1 B& sram [1] $end
$var wire 1 C& sram [2] $end
$var wire 1 4' sram_inv [0] $end
$var wire 1 5' sram_inv [1] $end
$var wire 1 6' sram_inv [2] $end
$var wire 1 _$ out [0] $end
$var wire 1 +' p0 $end
$var wire 1 d+ sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 e+ sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 f+ sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 g+ sky130_fd_sc_hd__mux2_1_3_X [0] $end
$var wire 1 h+ BUF_net_144 $end
$scope module mux_l1_in_0_ $end
$var wire 1 d+ X $end
$var wire 1 4$ A0 $end
$var wire 1 O# A1 $end
$var wire 1 A& S $end
$var supply1 1 i+ VPWR $end
$var supply0 1 j+ VGND $end
$var supply1 1 k+ VPB $end
$var supply0 1 l+ VNB $end
$scope module base $end
$var wire 1 d+ X $end
$var wire 1 4$ A0 $end
$var wire 1 O# A1 $end
$var wire 1 A& S $end
$var wire 1 m+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 e+ X $end
$var wire 1 7$ A0 $end
$var wire 1 d+ A1 $end
$var wire 1 B& S $end
$var supply1 1 n+ VPWR $end
$var supply0 1 o+ VGND $end
$var supply1 1 p+ VPB $end
$var supply0 1 q+ VNB $end
$scope module base $end
$var wire 1 e+ X $end
$var wire 1 7$ A0 $end
$var wire 1 d+ A1 $end
$var wire 1 B& S $end
$var wire 1 r+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 f+ X $end
$var wire 1 +' A0 $end
$var wire 1 :$ A1 $end
$var wire 1 B& S $end
$var supply1 1 s+ VPWR $end
$var supply0 1 t+ VGND $end
$var supply1 1 u+ VPB $end
$var supply0 1 v+ VNB $end
$scope module base $end
$var wire 1 f+ X $end
$var wire 1 +' A0 $end
$var wire 1 :$ A1 $end
$var wire 1 B& S $end
$var wire 1 w+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 g+ X $end
$var wire 1 f+ A0 $end
$var wire 1 e+ A1 $end
$var wire 1 C& S $end
$var supply1 1 x+ VPWR $end
$var supply0 1 y+ VGND $end
$var supply1 1 z+ VPB $end
$var supply0 1 {+ VNB $end
$scope module base $end
$var wire 1 g+ X $end
$var wire 1 f+ A0 $end
$var wire 1 e+ A1 $end
$var wire 1 C& S $end
$var wire 1 |+ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_143 $end
$var wire 1 _$ Y $end
$var wire 1 h+ A $end
$var supply1 1 }+ VPWR $end
$var supply0 1 ~+ VGND $end
$var supply1 1 !, VPB $end
$var supply0 1 ", VNB $end
$scope module base $end
$var wire 1 _$ Y $end
$var wire 1 h+ A $end
$var wire 1 #, not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_144 $end
$var wire 1 h+ Y $end
$var wire 1 g+ A $end
$var supply1 1 $, VPWR $end
$var supply0 1 %, VGND $end
$var supply1 1 &, VPB $end
$var supply0 1 ', VNB $end
$scope module base $end
$var wire 1 h+ Y $end
$var wire 1 g+ A $end
$var wire 1 (, not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_11 $end
$var wire 1 P# in [0] $end
$var wire 1 5$ in [1] $end
$var wire 1 8$ in [2] $end
$var wire 1 ;$ in [3] $end
$var wire 1 D& sram [0] $end
$var wire 1 E& sram [1] $end
$var wire 1 F& sram [2] $end
$var wire 1 7' sram_inv [0] $end
$var wire 1 8' sram_inv [1] $end
$var wire 1 9' sram_inv [2] $end
$var wire 1 `$ out [0] $end
$var wire 1 /' p0 $end
$var wire 1 ), sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 *, sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 +, sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 ,, sky130_fd_sc_hd__mux2_1_3_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 `$ X $end
$var wire 1 ,, A $end
$var supply1 1 -, VPWR $end
$var supply0 1 ., VGND $end
$var supply1 1 /, VPB $end
$var supply0 1 0, VNB $end
$scope module base $end
$var wire 1 `$ X $end
$var wire 1 ,, A $end
$var wire 1 1, buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 ), X $end
$var wire 1 5$ A0 $end
$var wire 1 P# A1 $end
$var wire 1 D& S $end
$var supply1 1 2, VPWR $end
$var supply0 1 3, VGND $end
$var supply1 1 4, VPB $end
$var supply0 1 5, VNB $end
$scope module base $end
$var wire 1 ), X $end
$var wire 1 5$ A0 $end
$var wire 1 P# A1 $end
$var wire 1 D& S $end
$var wire 1 6, mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 *, X $end
$var wire 1 8$ A0 $end
$var wire 1 ), A1 $end
$var wire 1 E& S $end
$var supply1 1 7, VPWR $end
$var supply0 1 8, VGND $end
$var supply1 1 9, VPB $end
$var supply0 1 :, VNB $end
$scope module base $end
$var wire 1 *, X $end
$var wire 1 8$ A0 $end
$var wire 1 ), A1 $end
$var wire 1 E& S $end
$var wire 1 ;, mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_1_ $end
$var wire 1 +, X $end
$var wire 1 /' A0 $end
$var wire 1 ;$ A1 $end
$var wire 1 E& S $end
$var supply1 1 <, VPWR $end
$var supply0 1 =, VGND $end
$var supply1 1 >, VPB $end
$var supply0 1 ?, VNB $end
$scope module base $end
$var wire 1 +, X $end
$var wire 1 /' A0 $end
$var wire 1 ;$ A1 $end
$var wire 1 E& S $end
$var wire 1 @, mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l3_in_0_ $end
$var wire 1 ,, X $end
$var wire 1 +, A0 $end
$var wire 1 *, A1 $end
$var wire 1 F& S $end
$var supply1 1 A, VPWR $end
$var supply0 1 B, VGND $end
$var supply1 1 C, VPB $end
$var supply0 1 D, VNB $end
$scope module base $end
$var wire 1 ,, X $end
$var wire 1 +, A0 $end
$var wire 1 *, A1 $end
$var wire 1 F& S $end
$var wire 1 E, mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_1 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 <$ ccff_head [0] $end
$var wire 1 b& ccff_tail [0] $end
$var wire 1 >& mem_out [0] $end
$var wire 1 ?& mem_out [1] $end
$var wire 1 @& mem_out [2] $end
$var wire 1 F, ropt_net_207 $end
$var wire 1 G, copt_net_166 $end
$var wire 1 H, copt_net_161 $end
$var wire 1 I, copt_net_162 $end
$var wire 1 J, copt_net_163 $end
$var wire 1 K, copt_net_164 $end
$var wire 1 L, copt_net_165 $end
$var wire 1 M, ropt_net_203 $end
$var wire 1 N, ropt_net_205 $end
$var wire 1 O, ropt_net_204 $end
$var wire 1 P, ropt_net_206 $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 >& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 F, D $end
$var wire 1 K# RESET_B $end
$var supply1 1 Q, VPWR $end
$var supply0 1 R, VGND $end
$var supply1 1 S, VPB $end
$var supply0 1 T, VNB $end
$scope module base $end
$var wire 1 >& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 F, D $end
$var wire 1 K# RESET_B $end
$var wire 1 U, buf_Q $end
$var wire 1 V, RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 ?& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 >& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 W, VPWR $end
$var supply0 1 X, VGND $end
$var supply1 1 Y, VPB $end
$var supply0 1 Z, VNB $end
$scope module base $end
$var wire 1 ?& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 >& D $end
$var wire 1 K# RESET_B $end
$var wire 1 [, buf_Q $end
$var wire 1 \, RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 @& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ?& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 ], VPWR $end
$var supply0 1 ^, VGND $end
$var supply1 1 _, VPB $end
$var supply0 1 `, VNB $end
$scope module base $end
$var wire 1 @& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ?& D $end
$var wire 1 K# RESET_B $end
$var wire 1 a, buf_Q $end
$var wire 1 b, RESET $end
$upscope $end
$upscope $end
$scope module FTB_1__0 $end
$var wire 1 b& X $end
$var wire 1 @& A $end
$var supply1 1 c, VPWR $end
$var supply0 1 d, VGND $end
$var supply1 1 e, VPB $end
$var supply0 1 f, VNB $end
$scope module base $end
$var wire 1 b& X $end
$var wire 1 @& A $end
$var wire 1 g, buf0_out_X $end
$upscope $end
$upscope $end
$scope module copt_h_inst_1339 $end
$var wire 1 H, X $end
$var wire 1 G, A $end
$var supply1 1 h, VPWR $end
$var supply0 1 i, VGND $end
$var supply1 1 j, VPB $end
$var supply0 1 k, VNB $end
$scope module base $end
$var wire 1 H, X $end
$var wire 1 G, A $end
$var wire 1 l, buf0_out_X $end
$upscope $end
$upscope $end
$scope module copt_h_inst_1340 $end
$var wire 1 I, X $end
$var wire 1 <$ A $end
$var supply1 1 m, VPWR $end
$var supply0 1 n, VGND $end
$var supply1 1 o, VPB $end
$var supply0 1 p, VNB $end
$scope module base $end
$var wire 1 I, X $end
$var wire 1 <$ A $end
$var wire 1 q, buf0_out_X $end
$upscope $end
$upscope $end
$scope module copt_h_inst_1341 $end
$var wire 1 J, X $end
$var wire 1 H, A $end
$var supply1 1 r, VPWR $end
$var supply0 1 s, VGND $end
$var supply1 1 t, VPB $end
$var supply0 1 u, VNB $end
$scope module base $end
$var wire 1 J, X $end
$var wire 1 H, A $end
$var wire 1 v, buf0_out_X $end
$upscope $end
$upscope $end
$scope module copt_h_inst_1342 $end
$var wire 1 K, X $end
$var wire 1 I, A $end
$var supply1 1 w, VPWR $end
$var supply0 1 x, VGND $end
$var supply1 1 y, VPB $end
$var supply0 1 z, VNB $end
$scope module base $end
$var wire 1 K, X $end
$var wire 1 I, A $end
$var wire 1 {, buf0_out_X $end
$upscope $end
$upscope $end
$scope module copt_h_inst_1343 $end
$var wire 1 L, X $end
$var wire 1 J, A $end
$var supply1 1 |, VPWR $end
$var supply0 1 }, VGND $end
$var supply1 1 ~, VPB $end
$var supply0 1 !- VNB $end
$scope module base $end
$var wire 1 L, X $end
$var wire 1 J, A $end
$var wire 1 "- buf0_out_X $end
$upscope $end
$upscope $end
$scope module copt_h_inst_1344 $end
$var wire 1 G, X $end
$var wire 1 K, A $end
$var supply1 1 #- VPWR $end
$var supply0 1 $- VGND $end
$var supply1 1 %- VPB $end
$var supply0 1 &- VNB $end
$scope module base $end
$var wire 1 G, X $end
$var wire 1 K, A $end
$var wire 1 '- buf0_out_X $end
$upscope $end
$upscope $end
$scope module ropt_h_inst_1378 $end
$var wire 1 M, X $end
$var wire 1 L, A $end
$var supply1 1 (- VPWR $end
$var supply0 1 )- VGND $end
$var supply1 1 *- VPB $end
$var supply0 1 +- VNB $end
$scope module base $end
$var wire 1 M, X $end
$var wire 1 L, A $end
$var wire 1 ,- buf0_out_X $end
$upscope $end
$upscope $end
$scope module ropt_h_inst_1379 $end
$var wire 1 O, X $end
$var wire 1 N, A $end
$var supply1 1 -- VPWR $end
$var supply0 1 .- VGND $end
$var supply1 1 /- VPB $end
$var supply0 1 0- VNB $end
$scope module base $end
$var wire 1 O, X $end
$var wire 1 N, A $end
$var wire 1 1- buf0_out_X $end
$upscope $end
$upscope $end
$scope module ropt_h_inst_1380 $end
$var wire 1 N, X $end
$var wire 1 M, A $end
$var supply1 1 2- VPWR $end
$var supply0 1 3- VGND $end
$var supply1 1 4- VPB $end
$var supply0 1 5- VNB $end
$scope module base $end
$var wire 1 N, X $end
$var wire 1 M, A $end
$var wire 1 6- buf0_out_X $end
$upscope $end
$upscope $end
$scope module ropt_h_inst_1381 $end
$var wire 1 P, X $end
$var wire 1 O, A $end
$var supply1 1 7- VPWR $end
$var supply0 1 8- VGND $end
$var supply1 1 9- VPB $end
$var supply0 1 :- VNB $end
$scope module base $end
$var wire 1 P, X $end
$var wire 1 O, A $end
$var wire 1 ;- buf0_out_X $end
$upscope $end
$upscope $end
$scope module ropt_h_inst_1382 $end
$var wire 1 F, X $end
$var wire 1 P, A $end
$var supply1 1 <- VPWR $end
$var supply0 1 =- VGND $end
$var supply1 1 >- VPB $end
$var supply0 1 ?- VNB $end
$scope module base $end
$var wire 1 F, X $end
$var wire 1 P, A $end
$var wire 1 @- buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_3 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 b& ccff_head [0] $end
$var wire 1 e& ccff_tail [0] $end
$var wire 1 G& mem_out [0] $end
$var wire 1 H& mem_out [1] $end
$var wire 1 I& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 G& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 b& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 A- VPWR $end
$var supply0 1 B- VGND $end
$var supply1 1 C- VPB $end
$var supply0 1 D- VNB $end
$scope module base $end
$var wire 1 G& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 b& D $end
$var wire 1 K# RESET_B $end
$var wire 1 E- buf_Q $end
$var wire 1 F- RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 H& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 G& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 G- VPWR $end
$var supply0 1 H- VGND $end
$var supply1 1 I- VPB $end
$var supply0 1 J- VNB $end
$scope module base $end
$var wire 1 H& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 G& D $end
$var wire 1 K# RESET_B $end
$var wire 1 K- buf_Q $end
$var wire 1 L- RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 I& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 H& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 M- VPWR $end
$var supply0 1 N- VGND $end
$var supply1 1 O- VPB $end
$var supply0 1 P- VNB $end
$scope module base $end
$var wire 1 I& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 H& D $end
$var wire 1 K# RESET_B $end
$var wire 1 Q- buf_Q $end
$var wire 1 R- RESET $end
$upscope $end
$upscope $end
$scope module FTB_2__1 $end
$var wire 1 e& X $end
$var wire 1 I& A $end
$var supply1 1 S- VPWR $end
$var supply0 1 T- VGND $end
$var supply1 1 U- VPB $end
$var supply0 1 V- VNB $end
$scope module base $end
$var wire 1 e& X $end
$var wire 1 I& A $end
$var wire 1 W- buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_5 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 e& ccff_head [0] $end
$var wire 1 f& ccff_tail [0] $end
$var wire 1 J& mem_out [0] $end
$var wire 1 K& mem_out [1] $end
$var wire 1 L& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 J& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 e& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 X- VPWR $end
$var supply0 1 Y- VGND $end
$var supply1 1 Z- VPB $end
$var supply0 1 [- VNB $end
$scope module base $end
$var wire 1 J& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 e& D $end
$var wire 1 K# RESET_B $end
$var wire 1 \- buf_Q $end
$var wire 1 ]- RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 K& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 J& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 ^- VPWR $end
$var supply0 1 _- VGND $end
$var supply1 1 `- VPB $end
$var supply0 1 a- VNB $end
$scope module base $end
$var wire 1 K& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 J& D $end
$var wire 1 K# RESET_B $end
$var wire 1 b- buf_Q $end
$var wire 1 c- RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 L& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 K& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 d- VPWR $end
$var supply0 1 e- VGND $end
$var supply1 1 f- VPB $end
$var supply0 1 g- VNB $end
$scope module base $end
$var wire 1 L& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 K& D $end
$var wire 1 K# RESET_B $end
$var wire 1 h- buf_Q $end
$var wire 1 i- RESET $end
$upscope $end
$upscope $end
$scope module FTB_3__2 $end
$var wire 1 f& X $end
$var wire 1 L& A $end
$var supply1 1 j- VPWR $end
$var supply0 1 k- VGND $end
$var supply1 1 l- VPB $end
$var supply0 1 m- VNB $end
$scope module base $end
$var wire 1 f& X $end
$var wire 1 L& A $end
$var wire 1 n- buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_7 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 f& ccff_head [0] $end
$var wire 1 g& ccff_tail [0] $end
$var wire 1 M& mem_out [0] $end
$var wire 1 N& mem_out [1] $end
$var wire 1 O& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 M& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 f& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 o- VPWR $end
$var supply0 1 p- VGND $end
$var supply1 1 q- VPB $end
$var supply0 1 r- VNB $end
$scope module base $end
$var wire 1 M& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 f& D $end
$var wire 1 K# RESET_B $end
$var wire 1 s- buf_Q $end
$var wire 1 t- RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 N& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 M& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 u- VPWR $end
$var supply0 1 v- VGND $end
$var supply1 1 w- VPB $end
$var supply0 1 x- VNB $end
$scope module base $end
$var wire 1 N& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 M& D $end
$var wire 1 K# RESET_B $end
$var wire 1 y- buf_Q $end
$var wire 1 z- RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 O& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 N& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 {- VPWR $end
$var supply0 1 |- VGND $end
$var supply1 1 }- VPB $end
$var supply0 1 ~- VNB $end
$scope module base $end
$var wire 1 O& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 N& D $end
$var wire 1 K# RESET_B $end
$var wire 1 !. buf_Q $end
$var wire 1 ". RESET $end
$upscope $end
$upscope $end
$scope module FTB_4__3 $end
$var wire 1 g& X $end
$var wire 1 O& A $end
$var supply1 1 #. VPWR $end
$var supply0 1 $. VGND $end
$var supply1 1 %. VPB $end
$var supply0 1 &. VNB $end
$scope module base $end
$var wire 1 g& X $end
$var wire 1 O& A $end
$var wire 1 '. buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_9 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 g& ccff_head [0] $end
$var wire 1 h& ccff_tail [0] $end
$var wire 1 P& mem_out [0] $end
$var wire 1 Q& mem_out [1] $end
$var wire 1 R& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 P& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 g& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 (. VPWR $end
$var supply0 1 ). VGND $end
$var supply1 1 *. VPB $end
$var supply0 1 +. VNB $end
$scope module base $end
$var wire 1 P& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 g& D $end
$var wire 1 K# RESET_B $end
$var wire 1 ,. buf_Q $end
$var wire 1 -. RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 Q& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 P& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 .. VPWR $end
$var supply0 1 /. VGND $end
$var supply1 1 0. VPB $end
$var supply0 1 1. VNB $end
$scope module base $end
$var wire 1 Q& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 P& D $end
$var wire 1 K# RESET_B $end
$var wire 1 2. buf_Q $end
$var wire 1 3. RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 R& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 Q& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 4. VPWR $end
$var supply0 1 5. VGND $end
$var supply1 1 6. VPB $end
$var supply0 1 7. VNB $end
$scope module base $end
$var wire 1 R& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 Q& D $end
$var wire 1 K# RESET_B $end
$var wire 1 8. buf_Q $end
$var wire 1 9. RESET $end
$upscope $end
$upscope $end
$scope module FTB_5__4 $end
$var wire 1 h& X $end
$var wire 1 R& A $end
$var supply1 1 :. VPWR $end
$var supply0 1 ;. VGND $end
$var supply1 1 <. VPB $end
$var supply0 1 =. VNB $end
$scope module base $end
$var wire 1 h& X $end
$var wire 1 R& A $end
$var wire 1 >. buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_11 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 h& ccff_head [0] $end
$var wire 1 i& ccff_tail [0] $end
$var wire 1 S& mem_out [0] $end
$var wire 1 T& mem_out [1] $end
$var wire 1 U& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 S& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 h& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 ?. VPWR $end
$var supply0 1 @. VGND $end
$var supply1 1 A. VPB $end
$var supply0 1 B. VNB $end
$scope module base $end
$var wire 1 S& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 h& D $end
$var wire 1 K# RESET_B $end
$var wire 1 C. buf_Q $end
$var wire 1 D. RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 T& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 S& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 E. VPWR $end
$var supply0 1 F. VGND $end
$var supply1 1 G. VPB $end
$var supply0 1 H. VNB $end
$scope module base $end
$var wire 1 T& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 S& D $end
$var wire 1 K# RESET_B $end
$var wire 1 I. buf_Q $end
$var wire 1 J. RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 U& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 T& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 K. VPWR $end
$var supply0 1 L. VGND $end
$var supply1 1 M. VPB $end
$var supply0 1 N. VNB $end
$scope module base $end
$var wire 1 U& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 T& D $end
$var wire 1 K# RESET_B $end
$var wire 1 O. buf_Q $end
$var wire 1 P. RESET $end
$upscope $end
$upscope $end
$scope module FTB_6__5 $end
$var wire 1 i& X $end
$var wire 1 U& A $end
$var supply1 1 Q. VPWR $end
$var supply0 1 R. VGND $end
$var supply1 1 S. VPB $end
$var supply0 1 T. VNB $end
$scope module base $end
$var wire 1 i& X $end
$var wire 1 U& A $end
$var wire 1 U. buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_1 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 q% ccff_head [0] $end
$var wire 1 j& ccff_tail [0] $end
$var wire 1 V& mem_out [0] $end
$var wire 1 W& mem_out [1] $end
$var wire 1 X& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 V& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 q% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 V. VPWR $end
$var supply0 1 W. VGND $end
$var supply1 1 X. VPB $end
$var supply0 1 Y. VNB $end
$scope module base $end
$var wire 1 V& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 q% D $end
$var wire 1 K# RESET_B $end
$var wire 1 Z. buf_Q $end
$var wire 1 [. RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 W& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 V& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 \. VPWR $end
$var supply0 1 ]. VGND $end
$var supply1 1 ^. VPB $end
$var supply0 1 _. VNB $end
$scope module base $end
$var wire 1 W& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 V& D $end
$var wire 1 K# RESET_B $end
$var wire 1 `. buf_Q $end
$var wire 1 a. RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 X& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 W& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 b. VPWR $end
$var supply0 1 c. VGND $end
$var supply1 1 d. VPB $end
$var supply0 1 e. VNB $end
$scope module base $end
$var wire 1 X& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 W& D $end
$var wire 1 K# RESET_B $end
$var wire 1 f. buf_Q $end
$var wire 1 g. RESET $end
$upscope $end
$upscope $end
$scope module FTB_7__6 $end
$var wire 1 j& X $end
$var wire 1 X& A $end
$var supply1 1 h. VPWR $end
$var supply0 1 i. VGND $end
$var supply1 1 j. VPB $end
$var supply0 1 k. VNB $end
$scope module base $end
$var wire 1 j& X $end
$var wire 1 X& A $end
$var wire 1 l. buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_3 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 j& ccff_head [0] $end
$var wire 1 k& ccff_tail [0] $end
$var wire 1 Y& mem_out [0] $end
$var wire 1 Z& mem_out [1] $end
$var wire 1 [& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 Y& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 j& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 m. VPWR $end
$var supply0 1 n. VGND $end
$var supply1 1 o. VPB $end
$var supply0 1 p. VNB $end
$scope module base $end
$var wire 1 Y& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 j& D $end
$var wire 1 K# RESET_B $end
$var wire 1 q. buf_Q $end
$var wire 1 r. RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 Z& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 Y& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 s. VPWR $end
$var supply0 1 t. VGND $end
$var supply1 1 u. VPB $end
$var supply0 1 v. VNB $end
$scope module base $end
$var wire 1 Z& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 Y& D $end
$var wire 1 K# RESET_B $end
$var wire 1 w. buf_Q $end
$var wire 1 x. RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 [& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 Z& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 y. VPWR $end
$var supply0 1 z. VGND $end
$var supply1 1 {. VPB $end
$var supply0 1 |. VNB $end
$scope module base $end
$var wire 1 [& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 Z& D $end
$var wire 1 K# RESET_B $end
$var wire 1 }. buf_Q $end
$var wire 1 ~. RESET $end
$upscope $end
$upscope $end
$scope module FTB_8__7 $end
$var wire 1 k& X $end
$var wire 1 [& A $end
$var supply1 1 !/ VPWR $end
$var supply0 1 "/ VGND $end
$var supply1 1 #/ VPB $end
$var supply0 1 $/ VNB $end
$scope module base $end
$var wire 1 k& X $end
$var wire 1 [& A $end
$var wire 1 %/ buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_5 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 k& ccff_head [0] $end
$var wire 1 l& ccff_tail [0] $end
$var wire 1 \& mem_out [0] $end
$var wire 1 ]& mem_out [1] $end
$var wire 1 ^& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 \& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 k& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 &/ VPWR $end
$var supply0 1 '/ VGND $end
$var supply1 1 (/ VPB $end
$var supply0 1 )/ VNB $end
$scope module base $end
$var wire 1 \& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 k& D $end
$var wire 1 K# RESET_B $end
$var wire 1 */ buf_Q $end
$var wire 1 +/ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 ]& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 \& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 ,/ VPWR $end
$var supply0 1 -/ VGND $end
$var supply1 1 ./ VPB $end
$var supply0 1 // VNB $end
$scope module base $end
$var wire 1 ]& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 \& D $end
$var wire 1 K# RESET_B $end
$var wire 1 0/ buf_Q $end
$var wire 1 1/ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 ^& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ]& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 2/ VPWR $end
$var supply0 1 3/ VGND $end
$var supply1 1 4/ VPB $end
$var supply0 1 5/ VNB $end
$scope module base $end
$var wire 1 ^& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ]& D $end
$var wire 1 K# RESET_B $end
$var wire 1 6/ buf_Q $end
$var wire 1 7/ RESET $end
$upscope $end
$upscope $end
$scope module FTB_9__8 $end
$var wire 1 l& X $end
$var wire 1 ^& A $end
$var supply1 1 8/ VPWR $end
$var supply0 1 9/ VGND $end
$var supply1 1 :/ VPB $end
$var supply0 1 ;/ VNB $end
$scope module base $end
$var wire 1 l& X $end
$var wire 1 ^& A $end
$var wire 1 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_7 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 l& ccff_head [0] $end
$var wire 1 m& ccff_tail [0] $end
$var wire 1 _& mem_out [0] $end
$var wire 1 `& mem_out [1] $end
$var wire 1 a& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 _& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 l& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 =/ VPWR $end
$var supply0 1 >/ VGND $end
$var supply1 1 ?/ VPB $end
$var supply0 1 @/ VNB $end
$scope module base $end
$var wire 1 _& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 l& D $end
$var wire 1 K# RESET_B $end
$var wire 1 A/ buf_Q $end
$var wire 1 B/ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 `& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 _& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 C/ VPWR $end
$var supply0 1 D/ VGND $end
$var supply1 1 E/ VPB $end
$var supply0 1 F/ VNB $end
$scope module base $end
$var wire 1 `& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 _& D $end
$var wire 1 K# RESET_B $end
$var wire 1 G/ buf_Q $end
$var wire 1 H/ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 a& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 `& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 I/ VPWR $end
$var supply0 1 J/ VGND $end
$var supply1 1 K/ VPB $end
$var supply0 1 L/ VNB $end
$scope module base $end
$var wire 1 a& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 `& D $end
$var wire 1 K# RESET_B $end
$var wire 1 M/ buf_Q $end
$var wire 1 N/ RESET $end
$upscope $end
$upscope $end
$scope module FTB_10__9 $end
$var wire 1 m& X $end
$var wire 1 a& A $end
$var supply1 1 O/ VPWR $end
$var supply0 1 P/ VGND $end
$var supply1 1 Q/ VPB $end
$var supply0 1 R/ VNB $end
$scope module base $end
$var wire 1 m& X $end
$var wire 1 a& A $end
$var wire 1 S/ buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_9 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 m& ccff_head [0] $end
$var wire 1 c& ccff_tail [0] $end
$var wire 1 A& mem_out [0] $end
$var wire 1 B& mem_out [1] $end
$var wire 1 C& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 A& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 m& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 T/ VPWR $end
$var supply0 1 U/ VGND $end
$var supply1 1 V/ VPB $end
$var supply0 1 W/ VNB $end
$scope module base $end
$var wire 1 A& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 m& D $end
$var wire 1 K# RESET_B $end
$var wire 1 X/ buf_Q $end
$var wire 1 Y/ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 B& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 A& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 Z/ VPWR $end
$var supply0 1 [/ VGND $end
$var supply1 1 \/ VPB $end
$var supply0 1 ]/ VNB $end
$scope module base $end
$var wire 1 B& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 A& D $end
$var wire 1 K# RESET_B $end
$var wire 1 ^/ buf_Q $end
$var wire 1 _/ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 C& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 B& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 `/ VPWR $end
$var supply0 1 a/ VGND $end
$var supply1 1 b/ VPB $end
$var supply0 1 c/ VNB $end
$scope module base $end
$var wire 1 C& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 B& D $end
$var wire 1 K# RESET_B $end
$var wire 1 d/ buf_Q $end
$var wire 1 e/ RESET $end
$upscope $end
$upscope $end
$scope module FTB_11__10 $end
$var wire 1 c& X $end
$var wire 1 C& A $end
$var supply1 1 f/ VPWR $end
$var supply0 1 g/ VGND $end
$var supply1 1 h/ VPB $end
$var supply0 1 i/ VNB $end
$scope module base $end
$var wire 1 c& X $end
$var wire 1 C& A $end
$var wire 1 j/ buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_11 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 c& ccff_head [0] $end
$var wire 1 d& ccff_tail [0] $end
$var wire 1 D& mem_out [0] $end
$var wire 1 E& mem_out [1] $end
$var wire 1 F& mem_out [2] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 D& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 c& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 k/ VPWR $end
$var supply0 1 l/ VGND $end
$var supply1 1 m/ VPB $end
$var supply0 1 n/ VNB $end
$scope module base $end
$var wire 1 D& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 c& D $end
$var wire 1 K# RESET_B $end
$var wire 1 o/ buf_Q $end
$var wire 1 p/ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 E& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 D& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 q/ VPWR $end
$var supply0 1 r/ VGND $end
$var supply1 1 s/ VPB $end
$var supply0 1 t/ VNB $end
$scope module base $end
$var wire 1 E& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 D& D $end
$var wire 1 K# RESET_B $end
$var wire 1 u/ buf_Q $end
$var wire 1 v/ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_2_ $end
$var wire 1 F& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 E& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 w/ VPWR $end
$var supply0 1 x/ VGND $end
$var supply1 1 y/ VPB $end
$var supply0 1 z/ VNB $end
$scope module base $end
$var wire 1 F& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 E& D $end
$var wire 1 K# RESET_B $end
$var wire 1 {/ buf_Q $end
$var wire 1 |/ RESET $end
$upscope $end
$upscope $end
$scope module FTB_12__11 $end
$var wire 1 d& X $end
$var wire 1 F& A $end
$var supply1 1 }/ VPWR $end
$var supply0 1 ~/ VGND $end
$var supply1 1 !0 VPB $end
$var supply0 1 "0 VNB $end
$scope module base $end
$var wire 1 d& X $end
$var wire 1 F& A $end
$var wire 1 #0 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_13 $end
$var wire 1 j# in [0] $end
$var wire 1 z# in [1] $end
$var wire 1 "% sram [0] $end
$var wire 1 #% sram [1] $end
$var wire 1 :' sram_inv [0] $end
$var wire 1 ;' sram_inv [1] $end
$var wire 1 C$ out [0] $end
$var wire 1 <' p0 $end
$var wire 1 $0 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 %0 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module mux_l1_in_0_ $end
$var wire 1 $0 X $end
$var wire 1 z# A0 $end
$var wire 1 j# A1 $end
$var wire 1 "% S $end
$var supply1 1 &0 VPWR $end
$var supply0 1 '0 VGND $end
$var supply1 1 (0 VPB $end
$var supply0 1 )0 VNB $end
$scope module base $end
$var wire 1 $0 X $end
$var wire 1 z# A0 $end
$var wire 1 j# A1 $end
$var wire 1 "% S $end
$var wire 1 *0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 %0 X $end
$var wire 1 <' A0 $end
$var wire 1 $0 A1 $end
$var wire 1 #% S $end
$var supply1 1 +0 VPWR $end
$var supply0 1 ,0 VGND $end
$var supply1 1 -0 VPB $end
$var supply0 1 .0 VNB $end
$scope module base $end
$var wire 1 %0 X $end
$var wire 1 <' A0 $end
$var wire 1 $0 A1 $end
$var wire 1 #% S $end
$var wire 1 /0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BUFT_RR_77 $end
$var wire 1 C$ X $end
$var wire 1 %0 A $end
$var supply1 1 00 VPWR $end
$var supply0 1 10 VGND $end
$var supply1 1 20 VPB $end
$var supply0 1 30 VNB $end
$scope module base $end
$var wire 1 C$ X $end
$var wire 1 %0 A $end
$var wire 1 40 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_15 $end
$var wire 1 k# in [0] $end
$var wire 1 {# in [1] $end
$var wire 1 8% sram [0] $end
$var wire 1 9% sram [1] $end
$var wire 1 =' sram_inv [0] $end
$var wire 1 >' sram_inv [1] $end
$var wire 1 D$ out [0] $end
$var wire 1 ~& p0 $end
$var wire 1 50 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 60 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module mux_l1_in_0_ $end
$var wire 1 50 X $end
$var wire 1 {# A0 $end
$var wire 1 k# A1 $end
$var wire 1 8% S $end
$var supply1 1 70 VPWR $end
$var supply0 1 80 VGND $end
$var supply1 1 90 VPB $end
$var supply0 1 :0 VNB $end
$scope module base $end
$var wire 1 50 X $end
$var wire 1 {# A0 $end
$var wire 1 k# A1 $end
$var wire 1 8% S $end
$var wire 1 ;0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 60 X $end
$var wire 1 ~& A0 $end
$var wire 1 50 A1 $end
$var wire 1 9% S $end
$var supply1 1 <0 VPWR $end
$var supply0 1 =0 VGND $end
$var supply1 1 >0 VPB $end
$var supply0 1 ?0 VNB $end
$scope module base $end
$var wire 1 60 X $end
$var wire 1 ~& A0 $end
$var wire 1 50 A1 $end
$var wire 1 9% S $end
$var wire 1 @0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BUFT_RR_78 $end
$var wire 1 D$ X $end
$var wire 1 60 A $end
$var supply1 1 A0 VPWR $end
$var supply0 1 B0 VGND $end
$var supply1 1 C0 VPB $end
$var supply0 1 D0 VNB $end
$scope module base $end
$var wire 1 D$ X $end
$var wire 1 60 A $end
$var wire 1 E0 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_17 $end
$var wire 1 l# in [0] $end
$var wire 1 |# in [1] $end
$var wire 1 N% sram [0] $end
$var wire 1 O% sram [1] $end
$var wire 1 ?' sram_inv [0] $end
$var wire 1 @' sram_inv [1] $end
$var wire 1 E$ out [0] $end
$var wire 1 3' p0 $end
$var wire 1 F0 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 G0 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 H0 BUF_net_80 $end
$scope module mux_l1_in_0_ $end
$var wire 1 F0 X $end
$var wire 1 |# A0 $end
$var wire 1 l# A1 $end
$var wire 1 N% S $end
$var supply1 1 I0 VPWR $end
$var supply0 1 J0 VGND $end
$var supply1 1 K0 VPB $end
$var supply0 1 L0 VNB $end
$scope module base $end
$var wire 1 F0 X $end
$var wire 1 |# A0 $end
$var wire 1 l# A1 $end
$var wire 1 N% S $end
$var wire 1 M0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 G0 X $end
$var wire 1 3' A0 $end
$var wire 1 F0 A1 $end
$var wire 1 O% S $end
$var supply1 1 N0 VPWR $end
$var supply0 1 O0 VGND $end
$var supply1 1 P0 VPB $end
$var supply0 1 Q0 VNB $end
$scope module base $end
$var wire 1 G0 X $end
$var wire 1 3' A0 $end
$var wire 1 F0 A1 $end
$var wire 1 O% S $end
$var wire 1 R0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_79 $end
$var wire 1 E$ Y $end
$var wire 1 H0 A $end
$var supply1 1 S0 VPWR $end
$var supply0 1 T0 VGND $end
$var supply1 1 U0 VPB $end
$var supply0 1 V0 VNB $end
$scope module base $end
$var wire 1 E$ Y $end
$var wire 1 H0 A $end
$var wire 1 W0 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_80 $end
$var wire 1 H0 Y $end
$var wire 1 G0 A $end
$var supply1 1 X0 VPWR $end
$var supply0 1 Y0 VGND $end
$var supply1 1 Z0 VPB $end
$var supply0 1 [0 VNB $end
$scope module base $end
$var wire 1 H0 Y $end
$var wire 1 G0 A $end
$var wire 1 \0 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_19 $end
$var wire 1 m# in [0] $end
$var wire 1 }# in [1] $end
$var wire 1 ^% sram [0] $end
$var wire 1 _% sram [1] $end
$var wire 1 A' sram_inv [0] $end
$var wire 1 B' sram_inv [1] $end
$var wire 1 F$ out [0] $end
$var wire 1 3' p0 $end
$var wire 1 ]0 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 ^0 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 _0 BUF_net_82 $end
$scope module mux_l1_in_0_ $end
$var wire 1 ]0 X $end
$var wire 1 }# A0 $end
$var wire 1 m# A1 $end
$var wire 1 ^% S $end
$var supply1 1 `0 VPWR $end
$var supply0 1 a0 VGND $end
$var supply1 1 b0 VPB $end
$var supply0 1 c0 VNB $end
$scope module base $end
$var wire 1 ]0 X $end
$var wire 1 }# A0 $end
$var wire 1 m# A1 $end
$var wire 1 ^% S $end
$var wire 1 d0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 ^0 X $end
$var wire 1 3' A0 $end
$var wire 1 ]0 A1 $end
$var wire 1 _% S $end
$var supply1 1 e0 VPWR $end
$var supply0 1 f0 VGND $end
$var supply1 1 g0 VPB $end
$var supply0 1 h0 VNB $end
$scope module base $end
$var wire 1 ^0 X $end
$var wire 1 3' A0 $end
$var wire 1 ]0 A1 $end
$var wire 1 _% S $end
$var wire 1 i0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_81 $end
$var wire 1 F$ Y $end
$var wire 1 _0 A $end
$var supply1 1 j0 VPWR $end
$var supply0 1 k0 VGND $end
$var supply1 1 l0 VPB $end
$var supply0 1 m0 VNB $end
$scope module base $end
$var wire 1 F$ Y $end
$var wire 1 _0 A $end
$var wire 1 n0 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_82 $end
$var wire 1 _0 Y $end
$var wire 1 ^0 A $end
$var supply1 1 o0 VPWR $end
$var supply0 1 p0 VGND $end
$var supply1 1 q0 VPB $end
$var supply0 1 r0 VNB $end
$scope module base $end
$var wire 1 _0 Y $end
$var wire 1 ^0 A $end
$var wire 1 s0 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_21 $end
$var wire 1 n# in [0] $end
$var wire 1 ~# in [1] $end
$var wire 1 `% sram [0] $end
$var wire 1 a% sram [1] $end
$var wire 1 C' sram_inv [0] $end
$var wire 1 D' sram_inv [1] $end
$var wire 1 G$ out [0] $end
$var wire 1 '' p0 $end
$var wire 1 t0 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 u0 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 v0 BUF_net_84 $end
$scope module mux_l1_in_0_ $end
$var wire 1 t0 X $end
$var wire 1 ~# A0 $end
$var wire 1 n# A1 $end
$var wire 1 `% S $end
$var supply1 1 w0 VPWR $end
$var supply0 1 x0 VGND $end
$var supply1 1 y0 VPB $end
$var supply0 1 z0 VNB $end
$scope module base $end
$var wire 1 t0 X $end
$var wire 1 ~# A0 $end
$var wire 1 n# A1 $end
$var wire 1 `% S $end
$var wire 1 {0 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 u0 X $end
$var wire 1 '' A0 $end
$var wire 1 t0 A1 $end
$var wire 1 a% S $end
$var supply1 1 |0 VPWR $end
$var supply0 1 }0 VGND $end
$var supply1 1 ~0 VPB $end
$var supply0 1 !1 VNB $end
$scope module base $end
$var wire 1 u0 X $end
$var wire 1 '' A0 $end
$var wire 1 t0 A1 $end
$var wire 1 a% S $end
$var wire 1 "1 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_83 $end
$var wire 1 G$ Y $end
$var wire 1 v0 A $end
$var supply1 1 #1 VPWR $end
$var supply0 1 $1 VGND $end
$var supply1 1 %1 VPB $end
$var supply0 1 &1 VNB $end
$scope module base $end
$var wire 1 G$ Y $end
$var wire 1 v0 A $end
$var wire 1 '1 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_84 $end
$var wire 1 v0 Y $end
$var wire 1 u0 A $end
$var supply1 1 (1 VPWR $end
$var supply0 1 )1 VGND $end
$var supply1 1 *1 VPB $end
$var supply0 1 +1 VNB $end
$scope module base $end
$var wire 1 v0 Y $end
$var wire 1 u0 A $end
$var wire 1 ,1 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_23 $end
$var wire 1 o# in [0] $end
$var wire 1 !$ in [1] $end
$var wire 1 b% sram [0] $end
$var wire 1 c% sram [1] $end
$var wire 1 E' sram_inv [0] $end
$var wire 1 F' sram_inv [1] $end
$var wire 1 H$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 -1 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 .1 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 /1 BUF_net_86 $end
$scope module mux_l1_in_0_ $end
$var wire 1 -1 X $end
$var wire 1 !$ A0 $end
$var wire 1 o# A1 $end
$var wire 1 b% S $end
$var supply1 1 01 VPWR $end
$var supply0 1 11 VGND $end
$var supply1 1 21 VPB $end
$var supply0 1 31 VNB $end
$scope module base $end
$var wire 1 -1 X $end
$var wire 1 !$ A0 $end
$var wire 1 o# A1 $end
$var wire 1 b% S $end
$var wire 1 41 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 .1 X $end
$var wire 1 q& A0 $end
$var wire 1 -1 A1 $end
$var wire 1 c% S $end
$var supply1 1 51 VPWR $end
$var supply0 1 61 VGND $end
$var supply1 1 71 VPB $end
$var supply0 1 81 VNB $end
$scope module base $end
$var wire 1 .1 X $end
$var wire 1 q& A0 $end
$var wire 1 -1 A1 $end
$var wire 1 c% S $end
$var wire 1 91 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_85 $end
$var wire 1 H$ Y $end
$var wire 1 /1 A $end
$var supply1 1 :1 VPWR $end
$var supply0 1 ;1 VGND $end
$var supply1 1 <1 VPB $end
$var supply0 1 =1 VNB $end
$scope module base $end
$var wire 1 H$ Y $end
$var wire 1 /1 A $end
$var wire 1 >1 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_86 $end
$var wire 1 /1 Y $end
$var wire 1 .1 A $end
$var supply1 1 ?1 VPWR $end
$var supply0 1 @1 VGND $end
$var supply1 1 A1 VPB $end
$var supply0 1 B1 VNB $end
$scope module base $end
$var wire 1 /1 Y $end
$var wire 1 .1 A $end
$var wire 1 C1 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_25 $end
$var wire 1 p# in [0] $end
$var wire 1 "$ in [1] $end
$var wire 1 d% sram [0] $end
$var wire 1 e% sram [1] $end
$var wire 1 G' sram_inv [0] $end
$var wire 1 H' sram_inv [1] $end
$var wire 1 I$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 D1 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 E1 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 F1 BUF_net_88 $end
$scope module mux_l1_in_0_ $end
$var wire 1 D1 X $end
$var wire 1 "$ A0 $end
$var wire 1 p# A1 $end
$var wire 1 d% S $end
$var supply1 1 G1 VPWR $end
$var supply0 1 H1 VGND $end
$var supply1 1 I1 VPB $end
$var supply0 1 J1 VNB $end
$scope module base $end
$var wire 1 D1 X $end
$var wire 1 "$ A0 $end
$var wire 1 p# A1 $end
$var wire 1 d% S $end
$var wire 1 K1 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 E1 X $end
$var wire 1 q& A0 $end
$var wire 1 D1 A1 $end
$var wire 1 e% S $end
$var supply1 1 L1 VPWR $end
$var supply0 1 M1 VGND $end
$var supply1 1 N1 VPB $end
$var supply0 1 O1 VNB $end
$scope module base $end
$var wire 1 E1 X $end
$var wire 1 q& A0 $end
$var wire 1 D1 A1 $end
$var wire 1 e% S $end
$var wire 1 P1 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_87 $end
$var wire 1 I$ Y $end
$var wire 1 F1 A $end
$var supply1 1 Q1 VPWR $end
$var supply0 1 R1 VGND $end
$var supply1 1 S1 VPB $end
$var supply0 1 T1 VNB $end
$scope module base $end
$var wire 1 I$ Y $end
$var wire 1 F1 A $end
$var wire 1 U1 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_88 $end
$var wire 1 F1 Y $end
$var wire 1 E1 A $end
$var supply1 1 V1 VPWR $end
$var supply0 1 W1 VGND $end
$var supply1 1 X1 VPB $end
$var supply0 1 Y1 VNB $end
$scope module base $end
$var wire 1 F1 Y $end
$var wire 1 E1 A $end
$var wire 1 Z1 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_27 $end
$var wire 1 q# in [0] $end
$var wire 1 #$ in [1] $end
$var wire 1 f% sram [0] $end
$var wire 1 g% sram [1] $end
$var wire 1 I' sram_inv [0] $end
$var wire 1 J' sram_inv [1] $end
$var wire 1 J$ out [0] $end
$var wire 1 3' p0 $end
$var wire 1 [1 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 \1 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 ]1 BUF_net_90 $end
$scope module mux_l1_in_0_ $end
$var wire 1 [1 X $end
$var wire 1 #$ A0 $end
$var wire 1 q# A1 $end
$var wire 1 f% S $end
$var supply1 1 ^1 VPWR $end
$var supply0 1 _1 VGND $end
$var supply1 1 `1 VPB $end
$var supply0 1 a1 VNB $end
$scope module base $end
$var wire 1 [1 X $end
$var wire 1 #$ A0 $end
$var wire 1 q# A1 $end
$var wire 1 f% S $end
$var wire 1 b1 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 \1 X $end
$var wire 1 3' A0 $end
$var wire 1 [1 A1 $end
$var wire 1 g% S $end
$var supply1 1 c1 VPWR $end
$var supply0 1 d1 VGND $end
$var supply1 1 e1 VPB $end
$var supply0 1 f1 VNB $end
$scope module base $end
$var wire 1 \1 X $end
$var wire 1 3' A0 $end
$var wire 1 [1 A1 $end
$var wire 1 g% S $end
$var wire 1 g1 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_89 $end
$var wire 1 J$ Y $end
$var wire 1 ]1 A $end
$var supply1 1 h1 VPWR $end
$var supply0 1 i1 VGND $end
$var supply1 1 j1 VPB $end
$var supply0 1 k1 VNB $end
$scope module base $end
$var wire 1 J$ Y $end
$var wire 1 ]1 A $end
$var wire 1 l1 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_90 $end
$var wire 1 ]1 Y $end
$var wire 1 \1 A $end
$var supply1 1 m1 VPWR $end
$var supply0 1 n1 VGND $end
$var supply1 1 o1 VPB $end
$var supply0 1 p1 VNB $end
$scope module base $end
$var wire 1 ]1 Y $end
$var wire 1 \1 A $end
$var wire 1 q1 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_39 $end
$var wire 1 k# in [0] $end
$var wire 1 )$ in [1] $end
$var wire 1 h% sram [0] $end
$var wire 1 i% sram [1] $end
$var wire 1 K' sram_inv [0] $end
$var wire 1 L' sram_inv [1] $end
$var wire 1 P$ out [0] $end
$var wire 1 '' p0 $end
$var wire 1 r1 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 s1 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 t1 BUF_net_92 $end
$scope module mux_l1_in_0_ $end
$var wire 1 r1 X $end
$var wire 1 )$ A0 $end
$var wire 1 k# A1 $end
$var wire 1 h% S $end
$var supply1 1 u1 VPWR $end
$var supply0 1 v1 VGND $end
$var supply1 1 w1 VPB $end
$var supply0 1 x1 VNB $end
$scope module base $end
$var wire 1 r1 X $end
$var wire 1 )$ A0 $end
$var wire 1 k# A1 $end
$var wire 1 h% S $end
$var wire 1 y1 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 s1 X $end
$var wire 1 '' A0 $end
$var wire 1 r1 A1 $end
$var wire 1 i% S $end
$var supply1 1 z1 VPWR $end
$var supply0 1 {1 VGND $end
$var supply1 1 |1 VPB $end
$var supply0 1 }1 VNB $end
$scope module base $end
$var wire 1 s1 X $end
$var wire 1 '' A0 $end
$var wire 1 r1 A1 $end
$var wire 1 i% S $end
$var wire 1 ~1 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_91 $end
$var wire 1 P$ Y $end
$var wire 1 t1 A $end
$var supply1 1 !2 VPWR $end
$var supply0 1 "2 VGND $end
$var supply1 1 #2 VPB $end
$var supply0 1 $2 VNB $end
$scope module base $end
$var wire 1 P$ Y $end
$var wire 1 t1 A $end
$var wire 1 %2 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_92 $end
$var wire 1 t1 Y $end
$var wire 1 s1 A $end
$var supply1 1 &2 VPWR $end
$var supply0 1 '2 VGND $end
$var supply1 1 (2 VPB $end
$var supply0 1 )2 VNB $end
$scope module base $end
$var wire 1 t1 Y $end
$var wire 1 s1 A $end
$var wire 1 *2 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_41 $end
$var wire 1 l# in [0] $end
$var wire 1 *$ in [1] $end
$var wire 1 j% sram [0] $end
$var wire 1 k% sram [1] $end
$var wire 1 M' sram_inv [0] $end
$var wire 1 N' sram_inv [1] $end
$var wire 1 Q$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 +2 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 ,2 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 Q$ X $end
$var wire 1 ,2 A $end
$var supply1 1 -2 VPWR $end
$var supply0 1 .2 VGND $end
$var supply1 1 /2 VPB $end
$var supply0 1 02 VNB $end
$scope module base $end
$var wire 1 Q$ X $end
$var wire 1 ,2 A $end
$var wire 1 12 buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 +2 X $end
$var wire 1 *$ A0 $end
$var wire 1 l# A1 $end
$var wire 1 j% S $end
$var supply1 1 22 VPWR $end
$var supply0 1 32 VGND $end
$var supply1 1 42 VPB $end
$var supply0 1 52 VNB $end
$scope module base $end
$var wire 1 +2 X $end
$var wire 1 *$ A0 $end
$var wire 1 l# A1 $end
$var wire 1 j% S $end
$var wire 1 62 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 ,2 X $end
$var wire 1 q& A0 $end
$var wire 1 +2 A1 $end
$var wire 1 k% S $end
$var supply1 1 72 VPWR $end
$var supply0 1 82 VGND $end
$var supply1 1 92 VPB $end
$var supply0 1 :2 VNB $end
$scope module base $end
$var wire 1 ,2 X $end
$var wire 1 q& A0 $end
$var wire 1 +2 A1 $end
$var wire 1 k% S $end
$var wire 1 ;2 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_43 $end
$var wire 1 m# in [0] $end
$var wire 1 +$ in [1] $end
$var wire 1 $% sram [0] $end
$var wire 1 %% sram [1] $end
$var wire 1 O' sram_inv [0] $end
$var wire 1 P' sram_inv [1] $end
$var wire 1 R$ out [0] $end
$var wire 1 <' p0 $end
$var wire 1 <2 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 =2 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 >2 BUF_net_94 $end
$scope module mux_l1_in_0_ $end
$var wire 1 <2 X $end
$var wire 1 +$ A0 $end
$var wire 1 m# A1 $end
$var wire 1 $% S $end
$var supply1 1 ?2 VPWR $end
$var supply0 1 @2 VGND $end
$var supply1 1 A2 VPB $end
$var supply0 1 B2 VNB $end
$scope module base $end
$var wire 1 <2 X $end
$var wire 1 +$ A0 $end
$var wire 1 m# A1 $end
$var wire 1 $% S $end
$var wire 1 C2 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 =2 X $end
$var wire 1 <' A0 $end
$var wire 1 <2 A1 $end
$var wire 1 %% S $end
$var supply1 1 D2 VPWR $end
$var supply0 1 E2 VGND $end
$var supply1 1 F2 VPB $end
$var supply0 1 G2 VNB $end
$scope module base $end
$var wire 1 =2 X $end
$var wire 1 <' A0 $end
$var wire 1 <2 A1 $end
$var wire 1 %% S $end
$var wire 1 H2 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_93 $end
$var wire 1 R$ Y $end
$var wire 1 >2 A $end
$var supply1 1 I2 VPWR $end
$var supply0 1 J2 VGND $end
$var supply1 1 K2 VPB $end
$var supply0 1 L2 VNB $end
$scope module base $end
$var wire 1 R$ Y $end
$var wire 1 >2 A $end
$var wire 1 M2 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_94 $end
$var wire 1 >2 Y $end
$var wire 1 =2 A $end
$var supply1 1 N2 VPWR $end
$var supply0 1 O2 VGND $end
$var supply1 1 P2 VPB $end
$var supply0 1 Q2 VNB $end
$scope module base $end
$var wire 1 >2 Y $end
$var wire 1 =2 A $end
$var wire 1 R2 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_47 $end
$var wire 1 o# in [0] $end
$var wire 1 -$ in [1] $end
$var wire 1 &% sram [0] $end
$var wire 1 '% sram [1] $end
$var wire 1 Q' sram_inv [0] $end
$var wire 1 R' sram_inv [1] $end
$var wire 1 T$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 S2 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 T2 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 T$ X $end
$var wire 1 T2 A $end
$var supply1 1 U2 VPWR $end
$var supply0 1 V2 VGND $end
$var supply1 1 W2 VPB $end
$var supply0 1 X2 VNB $end
$scope module base $end
$var wire 1 T$ X $end
$var wire 1 T2 A $end
$var wire 1 Y2 buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 S2 X $end
$var wire 1 -$ A0 $end
$var wire 1 o# A1 $end
$var wire 1 &% S $end
$var supply1 1 Z2 VPWR $end
$var supply0 1 [2 VGND $end
$var supply1 1 \2 VPB $end
$var supply0 1 ]2 VNB $end
$scope module base $end
$var wire 1 S2 X $end
$var wire 1 -$ A0 $end
$var wire 1 o# A1 $end
$var wire 1 &% S $end
$var wire 1 ^2 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 T2 X $end
$var wire 1 q& A0 $end
$var wire 1 S2 A1 $end
$var wire 1 '% S $end
$var supply1 1 _2 VPWR $end
$var supply0 1 `2 VGND $end
$var supply1 1 a2 VPB $end
$var supply0 1 b2 VNB $end
$scope module base $end
$var wire 1 T2 X $end
$var wire 1 q& A0 $end
$var wire 1 S2 A1 $end
$var wire 1 '% S $end
$var wire 1 c2 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_49 $end
$var wire 1 p# in [0] $end
$var wire 1 .$ in [1] $end
$var wire 1 (% sram [0] $end
$var wire 1 )% sram [1] $end
$var wire 1 S' sram_inv [0] $end
$var wire 1 T' sram_inv [1] $end
$var wire 1 U$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 d2 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 e2 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 f2 BUF_net_96 $end
$scope module mux_l1_in_0_ $end
$var wire 1 d2 X $end
$var wire 1 .$ A0 $end
$var wire 1 p# A1 $end
$var wire 1 (% S $end
$var supply1 1 g2 VPWR $end
$var supply0 1 h2 VGND $end
$var supply1 1 i2 VPB $end
$var supply0 1 j2 VNB $end
$scope module base $end
$var wire 1 d2 X $end
$var wire 1 .$ A0 $end
$var wire 1 p# A1 $end
$var wire 1 (% S $end
$var wire 1 k2 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 e2 X $end
$var wire 1 q& A0 $end
$var wire 1 d2 A1 $end
$var wire 1 )% S $end
$var supply1 1 l2 VPWR $end
$var supply0 1 m2 VGND $end
$var supply1 1 n2 VPB $end
$var supply0 1 o2 VNB $end
$scope module base $end
$var wire 1 e2 X $end
$var wire 1 q& A0 $end
$var wire 1 d2 A1 $end
$var wire 1 )% S $end
$var wire 1 p2 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_95 $end
$var wire 1 U$ Y $end
$var wire 1 f2 A $end
$var supply1 1 q2 VPWR $end
$var supply0 1 r2 VGND $end
$var supply1 1 s2 VPB $end
$var supply0 1 t2 VNB $end
$scope module base $end
$var wire 1 U$ Y $end
$var wire 1 f2 A $end
$var wire 1 u2 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_96 $end
$var wire 1 f2 Y $end
$var wire 1 e2 A $end
$var supply1 1 v2 VPWR $end
$var supply0 1 w2 VGND $end
$var supply1 1 x2 VPB $end
$var supply0 1 y2 VNB $end
$scope module base $end
$var wire 1 f2 Y $end
$var wire 1 e2 A $end
$var wire 1 z2 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_51 $end
$var wire 1 q# in [0] $end
$var wire 1 /$ in [1] $end
$var wire 1 *% sram [0] $end
$var wire 1 +% sram [1] $end
$var wire 1 U' sram_inv [0] $end
$var wire 1 V' sram_inv [1] $end
$var wire 1 V$ out [0] $end
$var wire 1 3' p0 $end
$var wire 1 {2 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 |2 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 }2 BUF_net_98 $end
$scope module mux_l1_in_0_ $end
$var wire 1 {2 X $end
$var wire 1 /$ A0 $end
$var wire 1 q# A1 $end
$var wire 1 *% S $end
$var supply1 1 ~2 VPWR $end
$var supply0 1 !3 VGND $end
$var supply1 1 "3 VPB $end
$var supply0 1 #3 VNB $end
$scope module base $end
$var wire 1 {2 X $end
$var wire 1 /$ A0 $end
$var wire 1 q# A1 $end
$var wire 1 *% S $end
$var wire 1 $3 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 |2 X $end
$var wire 1 3' A0 $end
$var wire 1 {2 A1 $end
$var wire 1 +% S $end
$var supply1 1 %3 VPWR $end
$var supply0 1 &3 VGND $end
$var supply1 1 '3 VPB $end
$var supply0 1 (3 VNB $end
$scope module base $end
$var wire 1 |2 X $end
$var wire 1 3' A0 $end
$var wire 1 {2 A1 $end
$var wire 1 +% S $end
$var wire 1 )3 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_97 $end
$var wire 1 V$ Y $end
$var wire 1 }2 A $end
$var supply1 1 *3 VPWR $end
$var supply0 1 +3 VGND $end
$var supply1 1 ,3 VPB $end
$var supply0 1 -3 VNB $end
$scope module base $end
$var wire 1 V$ Y $end
$var wire 1 }2 A $end
$var wire 1 .3 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_98 $end
$var wire 1 }2 Y $end
$var wire 1 |2 A $end
$var supply1 1 /3 VPWR $end
$var supply0 1 03 VGND $end
$var supply1 1 13 VPB $end
$var supply0 1 23 VNB $end
$scope module base $end
$var wire 1 }2 Y $end
$var wire 1 |2 A $end
$var wire 1 33 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_53 $end
$var wire 1 r# in [0] $end
$var wire 1 0$ in [1] $end
$var wire 1 ,% sram [0] $end
$var wire 1 -% sram [1] $end
$var wire 1 W' sram_inv [0] $end
$var wire 1 X' sram_inv [1] $end
$var wire 1 W$ out [0] $end
$var wire 1 3' p0 $end
$var wire 1 43 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 53 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 63 BUF_net_100 $end
$scope module mux_l1_in_0_ $end
$var wire 1 43 X $end
$var wire 1 0$ A0 $end
$var wire 1 r# A1 $end
$var wire 1 ,% S $end
$var supply1 1 73 VPWR $end
$var supply0 1 83 VGND $end
$var supply1 1 93 VPB $end
$var supply0 1 :3 VNB $end
$scope module base $end
$var wire 1 43 X $end
$var wire 1 0$ A0 $end
$var wire 1 r# A1 $end
$var wire 1 ,% S $end
$var wire 1 ;3 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 53 X $end
$var wire 1 3' A0 $end
$var wire 1 43 A1 $end
$var wire 1 -% S $end
$var supply1 1 <3 VPWR $end
$var supply0 1 =3 VGND $end
$var supply1 1 >3 VPB $end
$var supply0 1 ?3 VNB $end
$scope module base $end
$var wire 1 53 X $end
$var wire 1 3' A0 $end
$var wire 1 43 A1 $end
$var wire 1 -% S $end
$var wire 1 @3 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_99 $end
$var wire 1 W$ Y $end
$var wire 1 63 A $end
$var supply1 1 A3 VPWR $end
$var supply0 1 B3 VGND $end
$var supply1 1 C3 VPB $end
$var supply0 1 D3 VNB $end
$scope module base $end
$var wire 1 W$ Y $end
$var wire 1 63 A $end
$var wire 1 E3 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_100 $end
$var wire 1 63 Y $end
$var wire 1 53 A $end
$var supply1 1 F3 VPWR $end
$var supply0 1 G3 VGND $end
$var supply1 1 H3 VPB $end
$var supply0 1 I3 VNB $end
$scope module base $end
$var wire 1 63 Y $end
$var wire 1 53 A $end
$var wire 1 J3 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_13 $end
$var wire 1 Q# in [0] $end
$var wire 1 3$ in [1] $end
$var wire 1 .% sram [0] $end
$var wire 1 /% sram [1] $end
$var wire 1 Y' sram_inv [0] $end
$var wire 1 Z' sram_inv [1] $end
$var wire 1 a$ out [0] $end
$var wire 1 [' p0 $end
$var wire 1 K3 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 L3 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 a$ X $end
$var wire 1 L3 A $end
$var supply1 1 M3 VPWR $end
$var supply0 1 N3 VGND $end
$var supply1 1 O3 VPB $end
$var supply0 1 P3 VNB $end
$scope module base $end
$var wire 1 a$ X $end
$var wire 1 L3 A $end
$var wire 1 Q3 buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 K3 X $end
$var wire 1 3$ A0 $end
$var wire 1 Q# A1 $end
$var wire 1 .% S $end
$var supply1 1 R3 VPWR $end
$var supply0 1 S3 VGND $end
$var supply1 1 T3 VPB $end
$var supply0 1 U3 VNB $end
$scope module base $end
$var wire 1 K3 X $end
$var wire 1 3$ A0 $end
$var wire 1 Q# A1 $end
$var wire 1 .% S $end
$var wire 1 V3 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 L3 X $end
$var wire 1 [' A0 $end
$var wire 1 K3 A1 $end
$var wire 1 /% S $end
$var supply1 1 W3 VPWR $end
$var supply0 1 X3 VGND $end
$var supply1 1 Y3 VPB $end
$var supply0 1 Z3 VNB $end
$scope module base $end
$var wire 1 L3 X $end
$var wire 1 [' A0 $end
$var wire 1 K3 A1 $end
$var wire 1 /% S $end
$var wire 1 [3 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_15 $end
$var wire 1 R# in [0] $end
$var wire 1 4$ in [1] $end
$var wire 1 0% sram [0] $end
$var wire 1 1% sram [1] $end
$var wire 1 \' sram_inv [0] $end
$var wire 1 ]' sram_inv [1] $end
$var wire 1 b$ out [0] $end
$var wire 1 +' p0 $end
$var wire 1 \3 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 ]3 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 b$ X $end
$var wire 1 ]3 A $end
$var supply1 1 ^3 VPWR $end
$var supply0 1 _3 VGND $end
$var supply1 1 `3 VPB $end
$var supply0 1 a3 VNB $end
$scope module base $end
$var wire 1 b$ X $end
$var wire 1 ]3 A $end
$var wire 1 b3 buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 \3 X $end
$var wire 1 4$ A0 $end
$var wire 1 R# A1 $end
$var wire 1 0% S $end
$var supply1 1 c3 VPWR $end
$var supply0 1 d3 VGND $end
$var supply1 1 e3 VPB $end
$var supply0 1 f3 VNB $end
$scope module base $end
$var wire 1 \3 X $end
$var wire 1 4$ A0 $end
$var wire 1 R# A1 $end
$var wire 1 0% S $end
$var wire 1 g3 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 ]3 X $end
$var wire 1 +' A0 $end
$var wire 1 \3 A1 $end
$var wire 1 1% S $end
$var supply1 1 h3 VPWR $end
$var supply0 1 i3 VGND $end
$var supply1 1 j3 VPB $end
$var supply0 1 k3 VNB $end
$scope module base $end
$var wire 1 ]3 X $end
$var wire 1 +' A0 $end
$var wire 1 \3 A1 $end
$var wire 1 1% S $end
$var wire 1 l3 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_17 $end
$var wire 1 S# in [0] $end
$var wire 1 5$ in [1] $end
$var wire 1 2% sram [0] $end
$var wire 1 3% sram [1] $end
$var wire 1 ^' sram_inv [0] $end
$var wire 1 _' sram_inv [1] $end
$var wire 1 c$ out [0] $end
$var wire 1 +' p0 $end
$var wire 1 m3 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 n3 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 o3 BUF_net_102 $end
$scope module mux_l1_in_0_ $end
$var wire 1 m3 X $end
$var wire 1 5$ A0 $end
$var wire 1 S# A1 $end
$var wire 1 2% S $end
$var supply1 1 p3 VPWR $end
$var supply0 1 q3 VGND $end
$var supply1 1 r3 VPB $end
$var supply0 1 s3 VNB $end
$scope module base $end
$var wire 1 m3 X $end
$var wire 1 5$ A0 $end
$var wire 1 S# A1 $end
$var wire 1 2% S $end
$var wire 1 t3 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 n3 X $end
$var wire 1 +' A0 $end
$var wire 1 m3 A1 $end
$var wire 1 3% S $end
$var supply1 1 u3 VPWR $end
$var supply0 1 v3 VGND $end
$var supply1 1 w3 VPB $end
$var supply0 1 x3 VNB $end
$scope module base $end
$var wire 1 n3 X $end
$var wire 1 +' A0 $end
$var wire 1 m3 A1 $end
$var wire 1 3% S $end
$var wire 1 y3 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_101 $end
$var wire 1 c$ Y $end
$var wire 1 o3 A $end
$var supply1 1 z3 VPWR $end
$var supply0 1 {3 VGND $end
$var supply1 1 |3 VPB $end
$var supply0 1 }3 VNB $end
$scope module base $end
$var wire 1 c$ Y $end
$var wire 1 o3 A $end
$var wire 1 ~3 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_102 $end
$var wire 1 o3 Y $end
$var wire 1 n3 A $end
$var supply1 1 !4 VPWR $end
$var supply0 1 "4 VGND $end
$var supply1 1 #4 VPB $end
$var supply0 1 $4 VNB $end
$scope module base $end
$var wire 1 o3 Y $end
$var wire 1 n3 A $end
$var wire 1 %4 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_19 $end
$var wire 1 T# in [0] $end
$var wire 1 6$ in [1] $end
$var wire 1 4% sram [0] $end
$var wire 1 5% sram [1] $end
$var wire 1 `' sram_inv [0] $end
$var wire 1 a' sram_inv [1] $end
$var wire 1 d$ out [0] $end
$var wire 1 <' p0 $end
$var wire 1 &4 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 '4 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 (4 BUF_net_104 $end
$scope module mux_l1_in_0_ $end
$var wire 1 &4 X $end
$var wire 1 6$ A0 $end
$var wire 1 T# A1 $end
$var wire 1 4% S $end
$var supply1 1 )4 VPWR $end
$var supply0 1 *4 VGND $end
$var supply1 1 +4 VPB $end
$var supply0 1 ,4 VNB $end
$scope module base $end
$var wire 1 &4 X $end
$var wire 1 6$ A0 $end
$var wire 1 T# A1 $end
$var wire 1 4% S $end
$var wire 1 -4 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 '4 X $end
$var wire 1 <' A0 $end
$var wire 1 &4 A1 $end
$var wire 1 5% S $end
$var supply1 1 .4 VPWR $end
$var supply0 1 /4 VGND $end
$var supply1 1 04 VPB $end
$var supply0 1 14 VNB $end
$scope module base $end
$var wire 1 '4 X $end
$var wire 1 <' A0 $end
$var wire 1 &4 A1 $end
$var wire 1 5% S $end
$var wire 1 24 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_103 $end
$var wire 1 d$ Y $end
$var wire 1 (4 A $end
$var supply1 1 34 VPWR $end
$var supply0 1 44 VGND $end
$var supply1 1 54 VPB $end
$var supply0 1 64 VNB $end
$scope module base $end
$var wire 1 d$ Y $end
$var wire 1 (4 A $end
$var wire 1 74 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_104 $end
$var wire 1 (4 Y $end
$var wire 1 '4 A $end
$var supply1 1 84 VPWR $end
$var supply0 1 94 VGND $end
$var supply1 1 :4 VPB $end
$var supply0 1 ;4 VNB $end
$scope module base $end
$var wire 1 (4 Y $end
$var wire 1 '4 A $end
$var wire 1 <4 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_21 $end
$var wire 1 U# in [0] $end
$var wire 1 7$ in [1] $end
$var wire 1 6% sram [0] $end
$var wire 1 7% sram [1] $end
$var wire 1 b' sram_inv [0] $end
$var wire 1 c' sram_inv [1] $end
$var wire 1 e$ out [0] $end
$var wire 1 <' p0 $end
$var wire 1 =4 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 >4 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 ?4 BUF_net_106 $end
$scope module mux_l1_in_0_ $end
$var wire 1 =4 X $end
$var wire 1 7$ A0 $end
$var wire 1 U# A1 $end
$var wire 1 6% S $end
$var supply1 1 @4 VPWR $end
$var supply0 1 A4 VGND $end
$var supply1 1 B4 VPB $end
$var supply0 1 C4 VNB $end
$scope module base $end
$var wire 1 =4 X $end
$var wire 1 7$ A0 $end
$var wire 1 U# A1 $end
$var wire 1 6% S $end
$var wire 1 D4 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 >4 X $end
$var wire 1 <' A0 $end
$var wire 1 =4 A1 $end
$var wire 1 7% S $end
$var supply1 1 E4 VPWR $end
$var supply0 1 F4 VGND $end
$var supply1 1 G4 VPB $end
$var supply0 1 H4 VNB $end
$scope module base $end
$var wire 1 >4 X $end
$var wire 1 <' A0 $end
$var wire 1 =4 A1 $end
$var wire 1 7% S $end
$var wire 1 I4 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_105 $end
$var wire 1 e$ Y $end
$var wire 1 ?4 A $end
$var supply1 1 J4 VPWR $end
$var supply0 1 K4 VGND $end
$var supply1 1 L4 VPB $end
$var supply0 1 M4 VNB $end
$scope module base $end
$var wire 1 e$ Y $end
$var wire 1 ?4 A $end
$var wire 1 N4 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_106 $end
$var wire 1 ?4 Y $end
$var wire 1 >4 A $end
$var supply1 1 O4 VPWR $end
$var supply0 1 P4 VGND $end
$var supply1 1 Q4 VPB $end
$var supply0 1 R4 VNB $end
$scope module base $end
$var wire 1 ?4 Y $end
$var wire 1 >4 A $end
$var wire 1 S4 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_23 $end
$var wire 1 V# in [0] $end
$var wire 1 8$ in [1] $end
$var wire 1 :% sram [0] $end
$var wire 1 ;% sram [1] $end
$var wire 1 d' sram_inv [0] $end
$var wire 1 e' sram_inv [1] $end
$var wire 1 f$ out [0] $end
$var wire 1 <' p0 $end
$var wire 1 T4 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 U4 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module mux_l1_in_0_ $end
$var wire 1 T4 X $end
$var wire 1 8$ A0 $end
$var wire 1 V# A1 $end
$var wire 1 :% S $end
$var supply1 1 V4 VPWR $end
$var supply0 1 W4 VGND $end
$var supply1 1 X4 VPB $end
$var supply0 1 Y4 VNB $end
$scope module base $end
$var wire 1 T4 X $end
$var wire 1 8$ A0 $end
$var wire 1 V# A1 $end
$var wire 1 :% S $end
$var wire 1 Z4 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 U4 X $end
$var wire 1 <' A0 $end
$var wire 1 T4 A1 $end
$var wire 1 ;% S $end
$var supply1 1 [4 VPWR $end
$var supply0 1 \4 VGND $end
$var supply1 1 ]4 VPB $end
$var supply0 1 ^4 VNB $end
$scope module base $end
$var wire 1 U4 X $end
$var wire 1 <' A0 $end
$var wire 1 T4 A1 $end
$var wire 1 ;% S $end
$var wire 1 _4 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BUFT_RR_107 $end
$var wire 1 f$ X $end
$var wire 1 U4 A $end
$var supply1 1 `4 VPWR $end
$var supply0 1 a4 VGND $end
$var supply1 1 b4 VPB $end
$var supply0 1 c4 VNB $end
$scope module base $end
$var wire 1 f$ X $end
$var wire 1 U4 A $end
$var wire 1 d4 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_25 $end
$var wire 1 W# in [0] $end
$var wire 1 9$ in [1] $end
$var wire 1 <% sram [0] $end
$var wire 1 =% sram [1] $end
$var wire 1 f' sram_inv [0] $end
$var wire 1 g' sram_inv [1] $end
$var wire 1 g$ out [0] $end
$var wire 1 ~& p0 $end
$var wire 1 e4 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 f4 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 g$ X $end
$var wire 1 f4 A $end
$var supply1 1 g4 VPWR $end
$var supply0 1 h4 VGND $end
$var supply1 1 i4 VPB $end
$var supply0 1 j4 VNB $end
$scope module base $end
$var wire 1 g$ X $end
$var wire 1 f4 A $end
$var wire 1 k4 buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 e4 X $end
$var wire 1 9$ A0 $end
$var wire 1 W# A1 $end
$var wire 1 <% S $end
$var supply1 1 l4 VPWR $end
$var supply0 1 m4 VGND $end
$var supply1 1 n4 VPB $end
$var supply0 1 o4 VNB $end
$scope module base $end
$var wire 1 e4 X $end
$var wire 1 9$ A0 $end
$var wire 1 W# A1 $end
$var wire 1 <% S $end
$var wire 1 p4 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 f4 X $end
$var wire 1 ~& A0 $end
$var wire 1 e4 A1 $end
$var wire 1 =% S $end
$var supply1 1 q4 VPWR $end
$var supply0 1 r4 VGND $end
$var supply1 1 s4 VPB $end
$var supply0 1 t4 VNB $end
$scope module base $end
$var wire 1 f4 X $end
$var wire 1 ~& A0 $end
$var wire 1 e4 A1 $end
$var wire 1 =% S $end
$var wire 1 u4 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_27 $end
$var wire 1 X# in [0] $end
$var wire 1 :$ in [1] $end
$var wire 1 >% sram [0] $end
$var wire 1 ?% sram [1] $end
$var wire 1 h' sram_inv [0] $end
$var wire 1 i' sram_inv [1] $end
$var wire 1 h$ out [0] $end
$var wire 1 <' p0 $end
$var wire 1 v4 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 w4 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module mux_l1_in_0_ $end
$var wire 1 v4 X $end
$var wire 1 :$ A0 $end
$var wire 1 X# A1 $end
$var wire 1 >% S $end
$var supply1 1 x4 VPWR $end
$var supply0 1 y4 VGND $end
$var supply1 1 z4 VPB $end
$var supply0 1 {4 VNB $end
$scope module base $end
$var wire 1 v4 X $end
$var wire 1 :$ A0 $end
$var wire 1 X# A1 $end
$var wire 1 >% S $end
$var wire 1 |4 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 w4 X $end
$var wire 1 <' A0 $end
$var wire 1 v4 A1 $end
$var wire 1 ?% S $end
$var supply1 1 }4 VPWR $end
$var supply0 1 ~4 VGND $end
$var supply1 1 !5 VPB $end
$var supply0 1 "5 VNB $end
$scope module base $end
$var wire 1 w4 X $end
$var wire 1 <' A0 $end
$var wire 1 v4 A1 $end
$var wire 1 ?% S $end
$var wire 1 #5 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BUFT_RR_108 $end
$var wire 1 h$ X $end
$var wire 1 w4 A $end
$var supply1 1 $5 VPWR $end
$var supply0 1 %5 VGND $end
$var supply1 1 &5 VPB $end
$var supply0 1 '5 VNB $end
$scope module base $end
$var wire 1 h$ X $end
$var wire 1 w4 A $end
$var wire 1 (5 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_31 $end
$var wire 1 Z# in [0] $end
$var wire 1 4$ in [1] $end
$var wire 1 @% sram [0] $end
$var wire 1 A% sram [1] $end
$var wire 1 j' sram_inv [0] $end
$var wire 1 k' sram_inv [1] $end
$var wire 1 j$ out [0] $end
$var wire 1 <' p0 $end
$var wire 1 )5 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 *5 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 j$ X $end
$var wire 1 *5 A $end
$var supply1 1 +5 VPWR $end
$var supply0 1 ,5 VGND $end
$var supply1 1 -5 VPB $end
$var supply0 1 .5 VNB $end
$scope module base $end
$var wire 1 j$ X $end
$var wire 1 *5 A $end
$var wire 1 /5 buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 )5 X $end
$var wire 1 4$ A0 $end
$var wire 1 Z# A1 $end
$var wire 1 @% S $end
$var supply1 1 05 VPWR $end
$var supply0 1 15 VGND $end
$var supply1 1 25 VPB $end
$var supply0 1 35 VNB $end
$scope module base $end
$var wire 1 )5 X $end
$var wire 1 4$ A0 $end
$var wire 1 Z# A1 $end
$var wire 1 @% S $end
$var wire 1 45 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 *5 X $end
$var wire 1 <' A0 $end
$var wire 1 )5 A1 $end
$var wire 1 A% S $end
$var supply1 1 55 VPWR $end
$var supply0 1 65 VGND $end
$var supply1 1 75 VPB $end
$var supply0 1 85 VNB $end
$scope module base $end
$var wire 1 *5 X $end
$var wire 1 <' A0 $end
$var wire 1 )5 A1 $end
$var wire 1 A% S $end
$var wire 1 95 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_33 $end
$var wire 1 [# in [0] $end
$var wire 1 5$ in [1] $end
$var wire 1 B% sram [0] $end
$var wire 1 C% sram [1] $end
$var wire 1 l' sram_inv [0] $end
$var wire 1 m' sram_inv [1] $end
$var wire 1 k$ out [0] $end
$var wire 1 [' p0 $end
$var wire 1 :5 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 ;5 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 <5 BUF_net_110 $end
$scope module mux_l1_in_0_ $end
$var wire 1 :5 X $end
$var wire 1 5$ A0 $end
$var wire 1 [# A1 $end
$var wire 1 B% S $end
$var supply1 1 =5 VPWR $end
$var supply0 1 >5 VGND $end
$var supply1 1 ?5 VPB $end
$var supply0 1 @5 VNB $end
$scope module base $end
$var wire 1 :5 X $end
$var wire 1 5$ A0 $end
$var wire 1 [# A1 $end
$var wire 1 B% S $end
$var wire 1 A5 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 ;5 X $end
$var wire 1 [' A0 $end
$var wire 1 :5 A1 $end
$var wire 1 C% S $end
$var supply1 1 B5 VPWR $end
$var supply0 1 C5 VGND $end
$var supply1 1 D5 VPB $end
$var supply0 1 E5 VNB $end
$scope module base $end
$var wire 1 ;5 X $end
$var wire 1 [' A0 $end
$var wire 1 :5 A1 $end
$var wire 1 C% S $end
$var wire 1 F5 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_109 $end
$var wire 1 k$ Y $end
$var wire 1 <5 A $end
$var supply1 1 G5 VPWR $end
$var supply0 1 H5 VGND $end
$var supply1 1 I5 VPB $end
$var supply0 1 J5 VNB $end
$scope module base $end
$var wire 1 k$ Y $end
$var wire 1 <5 A $end
$var wire 1 K5 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_110 $end
$var wire 1 <5 Y $end
$var wire 1 ;5 A $end
$var supply1 1 L5 VPWR $end
$var supply0 1 M5 VGND $end
$var supply1 1 N5 VPB $end
$var supply0 1 O5 VNB $end
$scope module base $end
$var wire 1 <5 Y $end
$var wire 1 ;5 A $end
$var wire 1 P5 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_35 $end
$var wire 1 \# in [0] $end
$var wire 1 6$ in [1] $end
$var wire 1 D% sram [0] $end
$var wire 1 E% sram [1] $end
$var wire 1 n' sram_inv [0] $end
$var wire 1 o' sram_inv [1] $end
$var wire 1 l$ out [0] $end
$var wire 1 [' p0 $end
$var wire 1 Q5 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 R5 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 S5 BUF_net_112 $end
$scope module mux_l1_in_0_ $end
$var wire 1 Q5 X $end
$var wire 1 6$ A0 $end
$var wire 1 \# A1 $end
$var wire 1 D% S $end
$var supply1 1 T5 VPWR $end
$var supply0 1 U5 VGND $end
$var supply1 1 V5 VPB $end
$var supply0 1 W5 VNB $end
$scope module base $end
$var wire 1 Q5 X $end
$var wire 1 6$ A0 $end
$var wire 1 \# A1 $end
$var wire 1 D% S $end
$var wire 1 X5 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 R5 X $end
$var wire 1 [' A0 $end
$var wire 1 Q5 A1 $end
$var wire 1 E% S $end
$var supply1 1 Y5 VPWR $end
$var supply0 1 Z5 VGND $end
$var supply1 1 [5 VPB $end
$var supply0 1 \5 VNB $end
$scope module base $end
$var wire 1 R5 X $end
$var wire 1 [' A0 $end
$var wire 1 Q5 A1 $end
$var wire 1 E% S $end
$var wire 1 ]5 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_111 $end
$var wire 1 l$ Y $end
$var wire 1 S5 A $end
$var supply1 1 ^5 VPWR $end
$var supply0 1 _5 VGND $end
$var supply1 1 `5 VPB $end
$var supply0 1 a5 VNB $end
$scope module base $end
$var wire 1 l$ Y $end
$var wire 1 S5 A $end
$var wire 1 b5 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_112 $end
$var wire 1 S5 Y $end
$var wire 1 R5 A $end
$var supply1 1 c5 VPWR $end
$var supply0 1 d5 VGND $end
$var supply1 1 e5 VPB $end
$var supply0 1 f5 VNB $end
$scope module base $end
$var wire 1 S5 Y $end
$var wire 1 R5 A $end
$var wire 1 g5 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_37 $end
$var wire 1 ]# in [0] $end
$var wire 1 7$ in [1] $end
$var wire 1 F% sram [0] $end
$var wire 1 G% sram [1] $end
$var wire 1 p' sram_inv [0] $end
$var wire 1 q' sram_inv [1] $end
$var wire 1 m$ out [0] $end
$var wire 1 [' p0 $end
$var wire 1 h5 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 i5 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 j5 BUF_net_114 $end
$scope module mux_l1_in_0_ $end
$var wire 1 h5 X $end
$var wire 1 7$ A0 $end
$var wire 1 ]# A1 $end
$var wire 1 F% S $end
$var supply1 1 k5 VPWR $end
$var supply0 1 l5 VGND $end
$var supply1 1 m5 VPB $end
$var supply0 1 n5 VNB $end
$scope module base $end
$var wire 1 h5 X $end
$var wire 1 7$ A0 $end
$var wire 1 ]# A1 $end
$var wire 1 F% S $end
$var wire 1 o5 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 i5 X $end
$var wire 1 [' A0 $end
$var wire 1 h5 A1 $end
$var wire 1 G% S $end
$var supply1 1 p5 VPWR $end
$var supply0 1 q5 VGND $end
$var supply1 1 r5 VPB $end
$var supply0 1 s5 VNB $end
$scope module base $end
$var wire 1 i5 X $end
$var wire 1 [' A0 $end
$var wire 1 h5 A1 $end
$var wire 1 G% S $end
$var wire 1 t5 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_113 $end
$var wire 1 m$ Y $end
$var wire 1 j5 A $end
$var supply1 1 u5 VPWR $end
$var supply0 1 v5 VGND $end
$var supply1 1 w5 VPB $end
$var supply0 1 x5 VNB $end
$scope module base $end
$var wire 1 m$ Y $end
$var wire 1 j5 A $end
$var wire 1 y5 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_114 $end
$var wire 1 j5 Y $end
$var wire 1 i5 A $end
$var supply1 1 z5 VPWR $end
$var supply0 1 {5 VGND $end
$var supply1 1 |5 VPB $end
$var supply0 1 }5 VNB $end
$scope module base $end
$var wire 1 j5 Y $end
$var wire 1 i5 A $end
$var wire 1 ~5 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_39 $end
$var wire 1 ^# in [0] $end
$var wire 1 8$ in [1] $end
$var wire 1 H% sram [0] $end
$var wire 1 I% sram [1] $end
$var wire 1 r' sram_inv [0] $end
$var wire 1 s' sram_inv [1] $end
$var wire 1 n$ out [0] $end
$var wire 1 <' p0 $end
$var wire 1 !6 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 "6 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 n$ X $end
$var wire 1 "6 A $end
$var supply1 1 #6 VPWR $end
$var supply0 1 $6 VGND $end
$var supply1 1 %6 VPB $end
$var supply0 1 &6 VNB $end
$scope module base $end
$var wire 1 n$ X $end
$var wire 1 "6 A $end
$var wire 1 '6 buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 !6 X $end
$var wire 1 8$ A0 $end
$var wire 1 ^# A1 $end
$var wire 1 H% S $end
$var supply1 1 (6 VPWR $end
$var supply0 1 )6 VGND $end
$var supply1 1 *6 VPB $end
$var supply0 1 +6 VNB $end
$scope module base $end
$var wire 1 !6 X $end
$var wire 1 8$ A0 $end
$var wire 1 ^# A1 $end
$var wire 1 H% S $end
$var wire 1 ,6 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 "6 X $end
$var wire 1 <' A0 $end
$var wire 1 !6 A1 $end
$var wire 1 I% S $end
$var supply1 1 -6 VPWR $end
$var supply0 1 .6 VGND $end
$var supply1 1 /6 VPB $end
$var supply0 1 06 VNB $end
$scope module base $end
$var wire 1 "6 X $end
$var wire 1 <' A0 $end
$var wire 1 !6 A1 $end
$var wire 1 I% S $end
$var wire 1 16 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_41 $end
$var wire 1 _# in [0] $end
$var wire 1 9$ in [1] $end
$var wire 1 J% sram [0] $end
$var wire 1 K% sram [1] $end
$var wire 1 t' sram_inv [0] $end
$var wire 1 u' sram_inv [1] $end
$var wire 1 o$ out [0] $end
$var wire 1 '' p0 $end
$var wire 1 26 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 36 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 46 BUF_net_146 $end
$scope module mux_l1_in_0_ $end
$var wire 1 26 X $end
$var wire 1 9$ A0 $end
$var wire 1 _# A1 $end
$var wire 1 J% S $end
$var supply1 1 56 VPWR $end
$var supply0 1 66 VGND $end
$var supply1 1 76 VPB $end
$var supply0 1 86 VNB $end
$scope module base $end
$var wire 1 26 X $end
$var wire 1 9$ A0 $end
$var wire 1 _# A1 $end
$var wire 1 J% S $end
$var wire 1 96 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 36 X $end
$var wire 1 '' A0 $end
$var wire 1 26 A1 $end
$var wire 1 K% S $end
$var supply1 1 :6 VPWR $end
$var supply0 1 ;6 VGND $end
$var supply1 1 <6 VPB $end
$var supply0 1 =6 VNB $end
$scope module base $end
$var wire 1 36 X $end
$var wire 1 '' A0 $end
$var wire 1 26 A1 $end
$var wire 1 K% S $end
$var wire 1 >6 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_145 $end
$var wire 1 o$ Y $end
$var wire 1 46 A $end
$var supply1 1 ?6 VPWR $end
$var supply0 1 @6 VGND $end
$var supply1 1 A6 VPB $end
$var supply0 1 B6 VNB $end
$scope module base $end
$var wire 1 o$ Y $end
$var wire 1 46 A $end
$var wire 1 C6 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_146 $end
$var wire 1 46 Y $end
$var wire 1 36 A $end
$var supply1 1 D6 VPWR $end
$var supply0 1 E6 VGND $end
$var supply1 1 F6 VPB $end
$var supply0 1 G6 VNB $end
$scope module base $end
$var wire 1 46 Y $end
$var wire 1 36 A $end
$var wire 1 H6 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_43 $end
$var wire 1 `# in [0] $end
$var wire 1 :$ in [1] $end
$var wire 1 L% sram [0] $end
$var wire 1 M% sram [1] $end
$var wire 1 v' sram_inv [0] $end
$var wire 1 w' sram_inv [1] $end
$var wire 1 p$ out [0] $end
$var wire 1 '' p0 $end
$var wire 1 I6 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 J6 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 K6 BUF_net_118 $end
$scope module mux_l1_in_0_ $end
$var wire 1 I6 X $end
$var wire 1 :$ A0 $end
$var wire 1 `# A1 $end
$var wire 1 L% S $end
$var supply1 1 L6 VPWR $end
$var supply0 1 M6 VGND $end
$var supply1 1 N6 VPB $end
$var supply0 1 O6 VNB $end
$scope module base $end
$var wire 1 I6 X $end
$var wire 1 :$ A0 $end
$var wire 1 `# A1 $end
$var wire 1 L% S $end
$var wire 1 P6 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 J6 X $end
$var wire 1 '' A0 $end
$var wire 1 I6 A1 $end
$var wire 1 M% S $end
$var supply1 1 Q6 VPWR $end
$var supply0 1 R6 VGND $end
$var supply1 1 S6 VPB $end
$var supply0 1 T6 VNB $end
$scope module base $end
$var wire 1 J6 X $end
$var wire 1 '' A0 $end
$var wire 1 I6 A1 $end
$var wire 1 M% S $end
$var wire 1 U6 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_117 $end
$var wire 1 p$ Y $end
$var wire 1 K6 A $end
$var supply1 1 V6 VPWR $end
$var supply0 1 W6 VGND $end
$var supply1 1 X6 VPB $end
$var supply0 1 Y6 VNB $end
$scope module base $end
$var wire 1 p$ Y $end
$var wire 1 K6 A $end
$var wire 1 Z6 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_118 $end
$var wire 1 K6 Y $end
$var wire 1 J6 A $end
$var supply1 1 [6 VPWR $end
$var supply0 1 \6 VGND $end
$var supply1 1 ]6 VPB $end
$var supply0 1 ^6 VNB $end
$scope module base $end
$var wire 1 K6 Y $end
$var wire 1 J6 A $end
$var wire 1 _6 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_45 $end
$var wire 1 a# in [0] $end
$var wire 1 3$ in [1] $end
$var wire 1 P% sram [0] $end
$var wire 1 Q% sram [1] $end
$var wire 1 x' sram_inv [0] $end
$var wire 1 y' sram_inv [1] $end
$var wire 1 q$ out [0] $end
$var wire 1 '' p0 $end
$var wire 1 `6 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 a6 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 b6 BUF_net_120 $end
$scope module mux_l1_in_0_ $end
$var wire 1 `6 X $end
$var wire 1 3$ A0 $end
$var wire 1 a# A1 $end
$var wire 1 P% S $end
$var supply1 1 c6 VPWR $end
$var supply0 1 d6 VGND $end
$var supply1 1 e6 VPB $end
$var supply0 1 f6 VNB $end
$scope module base $end
$var wire 1 `6 X $end
$var wire 1 3$ A0 $end
$var wire 1 a# A1 $end
$var wire 1 P% S $end
$var wire 1 g6 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 a6 X $end
$var wire 1 '' A0 $end
$var wire 1 `6 A1 $end
$var wire 1 Q% S $end
$var supply1 1 h6 VPWR $end
$var supply0 1 i6 VGND $end
$var supply1 1 j6 VPB $end
$var supply0 1 k6 VNB $end
$scope module base $end
$var wire 1 a6 X $end
$var wire 1 '' A0 $end
$var wire 1 `6 A1 $end
$var wire 1 Q% S $end
$var wire 1 l6 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_119 $end
$var wire 1 q$ Y $end
$var wire 1 b6 A $end
$var supply1 1 m6 VPWR $end
$var supply0 1 n6 VGND $end
$var supply1 1 o6 VPB $end
$var supply0 1 p6 VNB $end
$scope module base $end
$var wire 1 q$ Y $end
$var wire 1 b6 A $end
$var wire 1 q6 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_120 $end
$var wire 1 b6 Y $end
$var wire 1 a6 A $end
$var supply1 1 r6 VPWR $end
$var supply0 1 s6 VGND $end
$var supply1 1 t6 VPB $end
$var supply0 1 u6 VNB $end
$scope module base $end
$var wire 1 b6 Y $end
$var wire 1 a6 A $end
$var wire 1 v6 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_47 $end
$var wire 1 b# in [0] $end
$var wire 1 4$ in [1] $end
$var wire 1 R% sram [0] $end
$var wire 1 S% sram [1] $end
$var wire 1 z' sram_inv [0] $end
$var wire 1 {' sram_inv [1] $end
$var wire 1 r$ out [0] $end
$var wire 1 +' p0 $end
$var wire 1 w6 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 x6 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 y6 BUF_net_122 $end
$scope module mux_l1_in_0_ $end
$var wire 1 w6 X $end
$var wire 1 4$ A0 $end
$var wire 1 b# A1 $end
$var wire 1 R% S $end
$var supply1 1 z6 VPWR $end
$var supply0 1 {6 VGND $end
$var supply1 1 |6 VPB $end
$var supply0 1 }6 VNB $end
$scope module base $end
$var wire 1 w6 X $end
$var wire 1 4$ A0 $end
$var wire 1 b# A1 $end
$var wire 1 R% S $end
$var wire 1 ~6 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 x6 X $end
$var wire 1 +' A0 $end
$var wire 1 w6 A1 $end
$var wire 1 S% S $end
$var supply1 1 !7 VPWR $end
$var supply0 1 "7 VGND $end
$var supply1 1 #7 VPB $end
$var supply0 1 $7 VNB $end
$scope module base $end
$var wire 1 x6 X $end
$var wire 1 +' A0 $end
$var wire 1 w6 A1 $end
$var wire 1 S% S $end
$var wire 1 %7 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_121 $end
$var wire 1 r$ Y $end
$var wire 1 y6 A $end
$var supply1 1 &7 VPWR $end
$var supply0 1 '7 VGND $end
$var supply1 1 (7 VPB $end
$var supply0 1 )7 VNB $end
$scope module base $end
$var wire 1 r$ Y $end
$var wire 1 y6 A $end
$var wire 1 *7 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_122 $end
$var wire 1 y6 Y $end
$var wire 1 x6 A $end
$var supply1 1 +7 VPWR $end
$var supply0 1 ,7 VGND $end
$var supply1 1 -7 VPB $end
$var supply0 1 .7 VNB $end
$scope module base $end
$var wire 1 y6 Y $end
$var wire 1 x6 A $end
$var wire 1 /7 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_49 $end
$var wire 1 c# in [0] $end
$var wire 1 5$ in [1] $end
$var wire 1 T% sram [0] $end
$var wire 1 U% sram [1] $end
$var wire 1 |' sram_inv [0] $end
$var wire 1 }' sram_inv [1] $end
$var wire 1 s$ out [0] $end
$var wire 1 +' p0 $end
$var wire 1 07 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 17 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 27 BUF_net_148 $end
$scope module mux_l1_in_0_ $end
$var wire 1 07 X $end
$var wire 1 5$ A0 $end
$var wire 1 c# A1 $end
$var wire 1 T% S $end
$var supply1 1 37 VPWR $end
$var supply0 1 47 VGND $end
$var supply1 1 57 VPB $end
$var supply0 1 67 VNB $end
$scope module base $end
$var wire 1 07 X $end
$var wire 1 5$ A0 $end
$var wire 1 c# A1 $end
$var wire 1 T% S $end
$var wire 1 77 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 17 X $end
$var wire 1 +' A0 $end
$var wire 1 07 A1 $end
$var wire 1 U% S $end
$var supply1 1 87 VPWR $end
$var supply0 1 97 VGND $end
$var supply1 1 :7 VPB $end
$var supply0 1 ;7 VNB $end
$scope module base $end
$var wire 1 17 X $end
$var wire 1 +' A0 $end
$var wire 1 07 A1 $end
$var wire 1 U% S $end
$var wire 1 <7 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_147 $end
$var wire 1 s$ Y $end
$var wire 1 27 A $end
$var supply1 1 =7 VPWR $end
$var supply0 1 >7 VGND $end
$var supply1 1 ?7 VPB $end
$var supply0 1 @7 VNB $end
$scope module base $end
$var wire 1 s$ Y $end
$var wire 1 27 A $end
$var wire 1 A7 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_148 $end
$var wire 1 27 Y $end
$var wire 1 17 A $end
$var supply1 1 B7 VPWR $end
$var supply0 1 C7 VGND $end
$var supply1 1 D7 VPB $end
$var supply0 1 E7 VNB $end
$scope module base $end
$var wire 1 27 Y $end
$var wire 1 17 A $end
$var wire 1 F7 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_51 $end
$var wire 1 d# in [0] $end
$var wire 1 6$ in [1] $end
$var wire 1 V% sram [0] $end
$var wire 1 W% sram [1] $end
$var wire 1 ~' sram_inv [0] $end
$var wire 1 !( sram_inv [1] $end
$var wire 1 t$ out [0] $end
$var wire 1 '' p0 $end
$var wire 1 G7 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 H7 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 I7 BUF_net_150 $end
$scope module mux_l1_in_0_ $end
$var wire 1 G7 X $end
$var wire 1 6$ A0 $end
$var wire 1 d# A1 $end
$var wire 1 V% S $end
$var supply1 1 J7 VPWR $end
$var supply0 1 K7 VGND $end
$var supply1 1 L7 VPB $end
$var supply0 1 M7 VNB $end
$scope module base $end
$var wire 1 G7 X $end
$var wire 1 6$ A0 $end
$var wire 1 d# A1 $end
$var wire 1 V% S $end
$var wire 1 N7 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 H7 X $end
$var wire 1 '' A0 $end
$var wire 1 G7 A1 $end
$var wire 1 W% S $end
$var supply1 1 O7 VPWR $end
$var supply0 1 P7 VGND $end
$var supply1 1 Q7 VPB $end
$var supply0 1 R7 VNB $end
$scope module base $end
$var wire 1 H7 X $end
$var wire 1 '' A0 $end
$var wire 1 G7 A1 $end
$var wire 1 W% S $end
$var wire 1 S7 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_149 $end
$var wire 1 t$ Y $end
$var wire 1 I7 A $end
$var supply1 1 T7 VPWR $end
$var supply0 1 U7 VGND $end
$var supply1 1 V7 VPB $end
$var supply0 1 W7 VNB $end
$scope module base $end
$var wire 1 t$ Y $end
$var wire 1 I7 A $end
$var wire 1 X7 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_150 $end
$var wire 1 I7 Y $end
$var wire 1 H7 A $end
$var supply1 1 Y7 VPWR $end
$var supply0 1 Z7 VGND $end
$var supply1 1 [7 VPB $end
$var supply0 1 \7 VNB $end
$scope module base $end
$var wire 1 I7 Y $end
$var wire 1 H7 A $end
$var wire 1 ]7 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_55 $end
$var wire 1 f# in [0] $end
$var wire 1 8$ in [1] $end
$var wire 1 X% sram [0] $end
$var wire 1 Y% sram [1] $end
$var wire 1 "( sram_inv [0] $end
$var wire 1 #( sram_inv [1] $end
$var wire 1 v$ out [0] $end
$var wire 1 '' p0 $end
$var wire 1 ^7 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 _7 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 `7 BUF_net_128 $end
$scope module mux_l1_in_0_ $end
$var wire 1 ^7 X $end
$var wire 1 8$ A0 $end
$var wire 1 f# A1 $end
$var wire 1 X% S $end
$var supply1 1 a7 VPWR $end
$var supply0 1 b7 VGND $end
$var supply1 1 c7 VPB $end
$var supply0 1 d7 VNB $end
$scope module base $end
$var wire 1 ^7 X $end
$var wire 1 8$ A0 $end
$var wire 1 f# A1 $end
$var wire 1 X% S $end
$var wire 1 e7 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 _7 X $end
$var wire 1 '' A0 $end
$var wire 1 ^7 A1 $end
$var wire 1 Y% S $end
$var supply1 1 f7 VPWR $end
$var supply0 1 g7 VGND $end
$var supply1 1 h7 VPB $end
$var supply0 1 i7 VNB $end
$scope module base $end
$var wire 1 _7 X $end
$var wire 1 '' A0 $end
$var wire 1 ^7 A1 $end
$var wire 1 Y% S $end
$var wire 1 j7 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_128 $end
$var wire 1 `7 Y $end
$var wire 1 _7 A $end
$var supply1 1 k7 VPWR $end
$var supply0 1 l7 VGND $end
$var supply1 1 m7 VPB $end
$var supply0 1 n7 VNB $end
$scope module base $end
$var wire 1 `7 Y $end
$var wire 1 _7 A $end
$var wire 1 o7 not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_151 $end
$var wire 1 v$ Y $end
$var wire 1 `7 A $end
$var supply1 1 p7 VPWR $end
$var supply0 1 q7 VGND $end
$var supply1 1 r7 VPB $end
$var supply0 1 s7 VNB $end
$scope module base $end
$var wire 1 v$ Y $end
$var wire 1 `7 A $end
$var wire 1 t7 not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_57 $end
$var wire 1 g# in [0] $end
$var wire 1 9$ in [1] $end
$var wire 1 Z% sram [0] $end
$var wire 1 [% sram [1] $end
$var wire 1 $( sram_inv [0] $end
$var wire 1 %( sram_inv [1] $end
$var wire 1 w$ out [0] $end
$var wire 1 ~& p0 $end
$var wire 1 u7 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 v7 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 w$ X $end
$var wire 1 v7 A $end
$var supply1 1 w7 VPWR $end
$var supply0 1 x7 VGND $end
$var supply1 1 y7 VPB $end
$var supply0 1 z7 VNB $end
$scope module base $end
$var wire 1 w$ X $end
$var wire 1 v7 A $end
$var wire 1 {7 buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 u7 X $end
$var wire 1 9$ A0 $end
$var wire 1 g# A1 $end
$var wire 1 Z% S $end
$var supply1 1 |7 VPWR $end
$var supply0 1 }7 VGND $end
$var supply1 1 ~7 VPB $end
$var supply0 1 !8 VNB $end
$scope module base $end
$var wire 1 u7 X $end
$var wire 1 9$ A0 $end
$var wire 1 g# A1 $end
$var wire 1 Z% S $end
$var wire 1 "8 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 v7 X $end
$var wire 1 ~& A0 $end
$var wire 1 u7 A1 $end
$var wire 1 [% S $end
$var supply1 1 #8 VPWR $end
$var supply0 1 $8 VGND $end
$var supply1 1 %8 VPB $end
$var supply0 1 &8 VNB $end
$scope module base $end
$var wire 1 v7 X $end
$var wire 1 ~& A0 $end
$var wire 1 u7 A1 $end
$var wire 1 [% S $end
$var wire 1 '8 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_59 $end
$var wire 1 h# in [0] $end
$var wire 1 :$ in [1] $end
$var wire 1 \% sram [0] $end
$var wire 1 ]% sram [1] $end
$var wire 1 &( sram_inv [0] $end
$var wire 1 '( sram_inv [1] $end
$var wire 1 x$ out [0] $end
$var wire 1 ~& p0 $end
$var wire 1 (8 sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 )8 sky130_fd_sc_hd__mux2_1_1_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 x$ X $end
$var wire 1 )8 A $end
$var supply1 1 *8 VPWR $end
$var supply0 1 +8 VGND $end
$var supply1 1 ,8 VPB $end
$var supply0 1 -8 VNB $end
$scope module base $end
$var wire 1 x$ X $end
$var wire 1 )8 A $end
$var wire 1 .8 buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 (8 X $end
$var wire 1 :$ A0 $end
$var wire 1 h# A1 $end
$var wire 1 \% S $end
$var supply1 1 /8 VPWR $end
$var supply0 1 08 VGND $end
$var supply1 1 18 VPB $end
$var supply0 1 28 VNB $end
$scope module base $end
$var wire 1 (8 X $end
$var wire 1 :$ A0 $end
$var wire 1 h# A1 $end
$var wire 1 \% S $end
$var wire 1 38 mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 )8 X $end
$var wire 1 ~& A0 $end
$var wire 1 (8 A1 $end
$var wire 1 ]% S $end
$var supply1 1 48 VPWR $end
$var supply0 1 58 VGND $end
$var supply1 1 68 VPB $end
$var supply0 1 78 VNB $end
$scope module base $end
$var wire 1 )8 X $end
$var wire 1 ~& A0 $end
$var wire 1 (8 A1 $end
$var wire 1 ]% S $end
$var wire 1 88 mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_13 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 i& ccff_head [0] $end
$var wire 1 l% ccff_tail [0] $end
$var wire 1 "% mem_out [0] $end
$var wire 1 #% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 "% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 i& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 98 VPWR $end
$var supply0 1 :8 VGND $end
$var supply1 1 ;8 VPB $end
$var supply0 1 <8 VNB $end
$scope module base $end
$var wire 1 "% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 i& D $end
$var wire 1 K# RESET_B $end
$var wire 1 =8 buf_Q $end
$var wire 1 >8 RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 #% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 "% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 ?8 VPWR $end
$var supply0 1 @8 VGND $end
$var supply1 1 A8 VPB $end
$var supply0 1 B8 VNB $end
$scope module base $end
$var wire 1 #% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 "% D $end
$var wire 1 K# RESET_B $end
$var wire 1 C8 buf_Q $end
$var wire 1 D8 RESET $end
$upscope $end
$upscope $end
$scope module FTB_13__12 $end
$var wire 1 l% X $end
$var wire 1 #% A $end
$var supply1 1 E8 VPWR $end
$var supply0 1 F8 VGND $end
$var supply1 1 G8 VPB $end
$var supply0 1 H8 VNB $end
$scope module base $end
$var wire 1 l% X $end
$var wire 1 #% A $end
$var wire 1 I8 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_15 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 l% ccff_head [0] $end
$var wire 1 w% ccff_tail [0] $end
$var wire 1 8% mem_out [0] $end
$var wire 1 9% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 8% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 l% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 J8 VPWR $end
$var supply0 1 K8 VGND $end
$var supply1 1 L8 VPB $end
$var supply0 1 M8 VNB $end
$scope module base $end
$var wire 1 8% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 l% D $end
$var wire 1 K# RESET_B $end
$var wire 1 N8 buf_Q $end
$var wire 1 O8 RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 9% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 8% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 P8 VPWR $end
$var supply0 1 Q8 VGND $end
$var supply1 1 R8 VPB $end
$var supply0 1 S8 VNB $end
$scope module base $end
$var wire 1 9% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 8% D $end
$var wire 1 K# RESET_B $end
$var wire 1 T8 buf_Q $end
$var wire 1 U8 RESET $end
$upscope $end
$upscope $end
$scope module FTB_14__13 $end
$var wire 1 w% X $end
$var wire 1 9% A $end
$var supply1 1 V8 VPWR $end
$var supply0 1 W8 VGND $end
$var supply1 1 X8 VPB $end
$var supply0 1 Y8 VNB $end
$scope module base $end
$var wire 1 w% X $end
$var wire 1 9% A $end
$var wire 1 Z8 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_17 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 w% ccff_head [0] $end
$var wire 1 $& ccff_tail [0] $end
$var wire 1 N% mem_out [0] $end
$var wire 1 O% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 N% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 w% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 [8 VPWR $end
$var supply0 1 \8 VGND $end
$var supply1 1 ]8 VPB $end
$var supply0 1 ^8 VNB $end
$scope module base $end
$var wire 1 N% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 w% D $end
$var wire 1 K# RESET_B $end
$var wire 1 _8 buf_Q $end
$var wire 1 `8 RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 O% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 N% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 a8 VPWR $end
$var supply0 1 b8 VGND $end
$var supply1 1 c8 VPB $end
$var supply0 1 d8 VNB $end
$scope module base $end
$var wire 1 O% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 N% D $end
$var wire 1 K# RESET_B $end
$var wire 1 e8 buf_Q $end
$var wire 1 f8 RESET $end
$upscope $end
$upscope $end
$scope module FTB_15__14 $end
$var wire 1 $& X $end
$var wire 1 O% A $end
$var supply1 1 g8 VPWR $end
$var supply0 1 h8 VGND $end
$var supply1 1 i8 VPB $end
$var supply0 1 j8 VNB $end
$scope module base $end
$var wire 1 $& X $end
$var wire 1 O% A $end
$var wire 1 k8 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_19 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 $& ccff_head [0] $end
$var wire 1 +& ccff_tail [0] $end
$var wire 1 ^% mem_out [0] $end
$var wire 1 _% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 ^% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 $& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 l8 VPWR $end
$var supply0 1 m8 VGND $end
$var supply1 1 n8 VPB $end
$var supply0 1 o8 VNB $end
$scope module base $end
$var wire 1 ^% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 $& D $end
$var wire 1 K# RESET_B $end
$var wire 1 p8 buf_Q $end
$var wire 1 q8 RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 _% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ^% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 r8 VPWR $end
$var supply0 1 s8 VGND $end
$var supply1 1 t8 VPB $end
$var supply0 1 u8 VNB $end
$scope module base $end
$var wire 1 _% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ^% D $end
$var wire 1 K# RESET_B $end
$var wire 1 v8 buf_Q $end
$var wire 1 w8 RESET $end
$upscope $end
$upscope $end
$scope module FTB_16__15 $end
$var wire 1 +& X $end
$var wire 1 _% A $end
$var supply1 1 x8 VPWR $end
$var supply0 1 y8 VGND $end
$var supply1 1 z8 VPB $end
$var supply0 1 {8 VNB $end
$scope module base $end
$var wire 1 +& X $end
$var wire 1 _% A $end
$var wire 1 |8 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_21 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 +& ccff_head [0] $end
$var wire 1 ,& ccff_tail [0] $end
$var wire 1 `% mem_out [0] $end
$var wire 1 a% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 `% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 +& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 }8 VPWR $end
$var supply0 1 ~8 VGND $end
$var supply1 1 !9 VPB $end
$var supply0 1 "9 VNB $end
$scope module base $end
$var wire 1 `% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 +& D $end
$var wire 1 K# RESET_B $end
$var wire 1 #9 buf_Q $end
$var wire 1 $9 RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 a% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 `% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 %9 VPWR $end
$var supply0 1 &9 VGND $end
$var supply1 1 '9 VPB $end
$var supply0 1 (9 VNB $end
$scope module base $end
$var wire 1 a% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 `% D $end
$var wire 1 K# RESET_B $end
$var wire 1 )9 buf_Q $end
$var wire 1 *9 RESET $end
$upscope $end
$upscope $end
$scope module FTB_17__16 $end
$var wire 1 ,& X $end
$var wire 1 a% A $end
$var supply1 1 +9 VPWR $end
$var supply0 1 ,9 VGND $end
$var supply1 1 -9 VPB $end
$var supply0 1 .9 VNB $end
$scope module base $end
$var wire 1 ,& X $end
$var wire 1 a% A $end
$var wire 1 /9 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_23 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 ,& ccff_head [0] $end
$var wire 1 -& ccff_tail [0] $end
$var wire 1 b% mem_out [0] $end
$var wire 1 c% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 b% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ,& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 09 VPWR $end
$var supply0 1 19 VGND $end
$var supply1 1 29 VPB $end
$var supply0 1 39 VNB $end
$scope module base $end
$var wire 1 b% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ,& D $end
$var wire 1 K# RESET_B $end
$var wire 1 49 buf_Q $end
$var wire 1 59 RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 c% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 b% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 69 VPWR $end
$var supply0 1 79 VGND $end
$var supply1 1 89 VPB $end
$var supply0 1 99 VNB $end
$scope module base $end
$var wire 1 c% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 b% D $end
$var wire 1 K# RESET_B $end
$var wire 1 :9 buf_Q $end
$var wire 1 ;9 RESET $end
$upscope $end
$upscope $end
$scope module FTB_18__17 $end
$var wire 1 -& X $end
$var wire 1 c% A $end
$var supply1 1 <9 VPWR $end
$var supply0 1 =9 VGND $end
$var supply1 1 >9 VPB $end
$var supply0 1 ?9 VNB $end
$scope module base $end
$var wire 1 -& X $end
$var wire 1 c% A $end
$var wire 1 @9 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_25 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 -& ccff_head [0] $end
$var wire 1 .& ccff_tail [0] $end
$var wire 1 d% mem_out [0] $end
$var wire 1 e% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 d% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 -& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 A9 VPWR $end
$var supply0 1 B9 VGND $end
$var supply1 1 C9 VPB $end
$var supply0 1 D9 VNB $end
$scope module base $end
$var wire 1 d% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 -& D $end
$var wire 1 K# RESET_B $end
$var wire 1 E9 buf_Q $end
$var wire 1 F9 RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 e% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 d% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 G9 VPWR $end
$var supply0 1 H9 VGND $end
$var supply1 1 I9 VPB $end
$var supply0 1 J9 VNB $end
$scope module base $end
$var wire 1 e% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 d% D $end
$var wire 1 K# RESET_B $end
$var wire 1 K9 buf_Q $end
$var wire 1 L9 RESET $end
$upscope $end
$upscope $end
$scope module FTB_19__18 $end
$var wire 1 .& X $end
$var wire 1 e% A $end
$var supply1 1 M9 VPWR $end
$var supply0 1 N9 VGND $end
$var supply1 1 O9 VPB $end
$var supply0 1 P9 VNB $end
$scope module base $end
$var wire 1 .& X $end
$var wire 1 e% A $end
$var wire 1 Q9 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_27 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 .& ccff_head [0] $end
$var wire 1 /& ccff_tail [0] $end
$var wire 1 f% mem_out [0] $end
$var wire 1 g% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 f% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 .& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 R9 VPWR $end
$var supply0 1 S9 VGND $end
$var supply1 1 T9 VPB $end
$var supply0 1 U9 VNB $end
$scope module base $end
$var wire 1 f% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 .& D $end
$var wire 1 K# RESET_B $end
$var wire 1 V9 buf_Q $end
$var wire 1 W9 RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 g% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 f% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 X9 VPWR $end
$var supply0 1 Y9 VGND $end
$var supply1 1 Z9 VPB $end
$var supply0 1 [9 VNB $end
$scope module base $end
$var wire 1 g% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 f% D $end
$var wire 1 K# RESET_B $end
$var wire 1 \9 buf_Q $end
$var wire 1 ]9 RESET $end
$upscope $end
$upscope $end
$scope module FTB_20__19 $end
$var wire 1 /& X $end
$var wire 1 g% A $end
$var supply1 1 ^9 VPWR $end
$var supply0 1 _9 VGND $end
$var supply1 1 `9 VPB $end
$var supply0 1 a9 VNB $end
$scope module base $end
$var wire 1 /& X $end
$var wire 1 g% A $end
$var wire 1 b9 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_39 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 :& ccff_head [0] $end
$var wire 1 0& ccff_tail [0] $end
$var wire 1 h% mem_out [0] $end
$var wire 1 i% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 h% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 :& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 c9 VPWR $end
$var supply0 1 d9 VGND $end
$var supply1 1 e9 VPB $end
$var supply0 1 f9 VNB $end
$scope module base $end
$var wire 1 h% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 :& D $end
$var wire 1 K# RESET_B $end
$var wire 1 g9 buf_Q $end
$var wire 1 h9 RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 i% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 h% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 i9 VPWR $end
$var supply0 1 j9 VGND $end
$var supply1 1 k9 VPB $end
$var supply0 1 l9 VNB $end
$scope module base $end
$var wire 1 i% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 h% D $end
$var wire 1 K# RESET_B $end
$var wire 1 m9 buf_Q $end
$var wire 1 n9 RESET $end
$upscope $end
$upscope $end
$scope module FTB_21__20 $end
$var wire 1 0& X $end
$var wire 1 i% A $end
$var supply1 1 o9 VPWR $end
$var supply0 1 p9 VGND $end
$var supply1 1 q9 VPB $end
$var supply0 1 r9 VNB $end
$scope module base $end
$var wire 1 0& X $end
$var wire 1 i% A $end
$var wire 1 s9 buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_41 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 0& ccff_head [0] $end
$var wire 1 1& ccff_tail [0] $end
$var wire 1 j% mem_out [0] $end
$var wire 1 k% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 j% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 0& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 t9 VPWR $end
$var supply0 1 u9 VGND $end
$var supply1 1 v9 VPB $end
$var supply0 1 w9 VNB $end
$scope module base $end
$var wire 1 j% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 0& D $end
$var wire 1 K# RESET_B $end
$var wire 1 x9 buf_Q $end
$var wire 1 y9 RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 k% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 j% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 z9 VPWR $end
$var supply0 1 {9 VGND $end
$var supply1 1 |9 VPB $end
$var supply0 1 }9 VNB $end
$scope module base $end
$var wire 1 k% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 j% D $end
$var wire 1 K# RESET_B $end
$var wire 1 ~9 buf_Q $end
$var wire 1 !: RESET $end
$upscope $end
$upscope $end
$scope module FTB_22__21 $end
$var wire 1 1& X $end
$var wire 1 k% A $end
$var supply1 1 ": VPWR $end
$var supply0 1 #: VGND $end
$var supply1 1 $: VPB $end
$var supply0 1 %: VNB $end
$scope module base $end
$var wire 1 1& X $end
$var wire 1 k% A $end
$var wire 1 &: buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_43 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 1& ccff_head [0] $end
$var wire 1 m% ccff_tail [0] $end
$var wire 1 $% mem_out [0] $end
$var wire 1 %% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 $% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 1& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 ': VPWR $end
$var supply0 1 (: VGND $end
$var supply1 1 ): VPB $end
$var supply0 1 *: VNB $end
$scope module base $end
$var wire 1 $% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 1& D $end
$var wire 1 K# RESET_B $end
$var wire 1 +: buf_Q $end
$var wire 1 ,: RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 %% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 $% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 -: VPWR $end
$var supply0 1 .: VGND $end
$var supply1 1 /: VPB $end
$var supply0 1 0: VNB $end
$scope module base $end
$var wire 1 %% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 $% D $end
$var wire 1 K# RESET_B $end
$var wire 1 1: buf_Q $end
$var wire 1 2: RESET $end
$upscope $end
$upscope $end
$scope module FTB_23__22 $end
$var wire 1 m% X $end
$var wire 1 %% A $end
$var supply1 1 3: VPWR $end
$var supply0 1 4: VGND $end
$var supply1 1 5: VPB $end
$var supply0 1 6: VNB $end
$scope module base $end
$var wire 1 m% X $end
$var wire 1 %% A $end
$var wire 1 7: buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_47 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 ;& ccff_head [0] $end
$var wire 1 n% ccff_tail [0] $end
$var wire 1 &% mem_out [0] $end
$var wire 1 '% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 &% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ;& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 8: VPWR $end
$var supply0 1 9: VGND $end
$var supply1 1 :: VPB $end
$var supply0 1 ;: VNB $end
$scope module base $end
$var wire 1 &% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ;& D $end
$var wire 1 K# RESET_B $end
$var wire 1 <: buf_Q $end
$var wire 1 =: RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 '% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 &% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 >: VPWR $end
$var supply0 1 ?: VGND $end
$var supply1 1 @: VPB $end
$var supply0 1 A: VNB $end
$scope module base $end
$var wire 1 '% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 &% D $end
$var wire 1 K# RESET_B $end
$var wire 1 B: buf_Q $end
$var wire 1 C: RESET $end
$upscope $end
$upscope $end
$scope module FTB_24__23 $end
$var wire 1 n% X $end
$var wire 1 '% A $end
$var supply1 1 D: VPWR $end
$var supply0 1 E: VGND $end
$var supply1 1 F: VPB $end
$var supply0 1 G: VNB $end
$scope module base $end
$var wire 1 n% X $end
$var wire 1 '% A $end
$var wire 1 H: buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_49 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 n% ccff_head [0] $end
$var wire 1 o% ccff_tail [0] $end
$var wire 1 (% mem_out [0] $end
$var wire 1 )% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 (% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 n% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 I: VPWR $end
$var supply0 1 J: VGND $end
$var supply1 1 K: VPB $end
$var supply0 1 L: VNB $end
$scope module base $end
$var wire 1 (% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 n% D $end
$var wire 1 K# RESET_B $end
$var wire 1 M: buf_Q $end
$var wire 1 N: RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 )% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 (% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 O: VPWR $end
$var supply0 1 P: VGND $end
$var supply1 1 Q: VPB $end
$var supply0 1 R: VNB $end
$scope module base $end
$var wire 1 )% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 (% D $end
$var wire 1 K# RESET_B $end
$var wire 1 S: buf_Q $end
$var wire 1 T: RESET $end
$upscope $end
$upscope $end
$scope module FTB_25__24 $end
$var wire 1 o% X $end
$var wire 1 )% A $end
$var supply1 1 U: VPWR $end
$var supply0 1 V: VGND $end
$var supply1 1 W: VPB $end
$var supply0 1 X: VNB $end
$scope module base $end
$var wire 1 o% X $end
$var wire 1 )% A $end
$var wire 1 Y: buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_51 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 o% ccff_head [0] $end
$var wire 1 p% ccff_tail [0] $end
$var wire 1 *% mem_out [0] $end
$var wire 1 +% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 *% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 o% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 Z: VPWR $end
$var supply0 1 [: VGND $end
$var supply1 1 \: VPB $end
$var supply0 1 ]: VNB $end
$scope module base $end
$var wire 1 *% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 o% D $end
$var wire 1 K# RESET_B $end
$var wire 1 ^: buf_Q $end
$var wire 1 _: RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 +% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 *% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 `: VPWR $end
$var supply0 1 a: VGND $end
$var supply1 1 b: VPB $end
$var supply0 1 c: VNB $end
$scope module base $end
$var wire 1 +% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 *% D $end
$var wire 1 K# RESET_B $end
$var wire 1 d: buf_Q $end
$var wire 1 e: RESET $end
$upscope $end
$upscope $end
$scope module FTB_26__25 $end
$var wire 1 p% X $end
$var wire 1 +% A $end
$var supply1 1 f: VPWR $end
$var supply0 1 g: VGND $end
$var supply1 1 h: VPB $end
$var supply0 1 i: VNB $end
$scope module base $end
$var wire 1 p% X $end
$var wire 1 +% A $end
$var wire 1 j: buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_53 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 p% ccff_head [0] $end
$var wire 1 q% ccff_tail [0] $end
$var wire 1 ,% mem_out [0] $end
$var wire 1 -% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 ,% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 p% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 k: VPWR $end
$var supply0 1 l: VGND $end
$var supply1 1 m: VPB $end
$var supply0 1 n: VNB $end
$scope module base $end
$var wire 1 ,% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 p% D $end
$var wire 1 K# RESET_B $end
$var wire 1 o: buf_Q $end
$var wire 1 p: RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 -% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ,% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 q: VPWR $end
$var supply0 1 r: VGND $end
$var supply1 1 s: VPB $end
$var supply0 1 t: VNB $end
$scope module base $end
$var wire 1 -% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ,% D $end
$var wire 1 K# RESET_B $end
$var wire 1 u: buf_Q $end
$var wire 1 v: RESET $end
$upscope $end
$upscope $end
$scope module FTB_27__26 $end
$var wire 1 q% X $end
$var wire 1 -% A $end
$var supply1 1 w: VPWR $end
$var supply0 1 x: VGND $end
$var supply1 1 y: VPB $end
$var supply0 1 z: VNB $end
$scope module base $end
$var wire 1 q% X $end
$var wire 1 -% A $end
$var wire 1 {: buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_13 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 d& ccff_head [0] $end
$var wire 1 r% ccff_tail [0] $end
$var wire 1 .% mem_out [0] $end
$var wire 1 /% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 .% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 d& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 |: VPWR $end
$var supply0 1 }: VGND $end
$var supply1 1 ~: VPB $end
$var supply0 1 !; VNB $end
$scope module base $end
$var wire 1 .% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 d& D $end
$var wire 1 K# RESET_B $end
$var wire 1 "; buf_Q $end
$var wire 1 #; RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 /% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 .% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 $; VPWR $end
$var supply0 1 %; VGND $end
$var supply1 1 &; VPB $end
$var supply0 1 '; VNB $end
$scope module base $end
$var wire 1 /% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 .% D $end
$var wire 1 K# RESET_B $end
$var wire 1 (; buf_Q $end
$var wire 1 ); RESET $end
$upscope $end
$upscope $end
$scope module FTB_28__27 $end
$var wire 1 r% X $end
$var wire 1 /% A $end
$var supply1 1 *; VPWR $end
$var supply0 1 +; VGND $end
$var supply1 1 ,; VPB $end
$var supply0 1 -; VNB $end
$scope module base $end
$var wire 1 r% X $end
$var wire 1 /% A $end
$var wire 1 .; buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_15 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 r% ccff_head [0] $end
$var wire 1 s% ccff_tail [0] $end
$var wire 1 0% mem_out [0] $end
$var wire 1 1% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 0% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 r% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 /; VPWR $end
$var supply0 1 0; VGND $end
$var supply1 1 1; VPB $end
$var supply0 1 2; VNB $end
$scope module base $end
$var wire 1 0% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 r% D $end
$var wire 1 K# RESET_B $end
$var wire 1 3; buf_Q $end
$var wire 1 4; RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 1% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 0% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 5; VPWR $end
$var supply0 1 6; VGND $end
$var supply1 1 7; VPB $end
$var supply0 1 8; VNB $end
$scope module base $end
$var wire 1 1% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 0% D $end
$var wire 1 K# RESET_B $end
$var wire 1 9; buf_Q $end
$var wire 1 :; RESET $end
$upscope $end
$upscope $end
$scope module FTB_29__28 $end
$var wire 1 s% X $end
$var wire 1 1% A $end
$var supply1 1 ;; VPWR $end
$var supply0 1 <; VGND $end
$var supply1 1 =; VPB $end
$var supply0 1 >; VNB $end
$scope module base $end
$var wire 1 s% X $end
$var wire 1 1% A $end
$var wire 1 ?; buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_17 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 s% ccff_head [0] $end
$var wire 1 t% ccff_tail [0] $end
$var wire 1 2% mem_out [0] $end
$var wire 1 3% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 2% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 s% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 @; VPWR $end
$var supply0 1 A; VGND $end
$var supply1 1 B; VPB $end
$var supply0 1 C; VNB $end
$scope module base $end
$var wire 1 2% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 s% D $end
$var wire 1 K# RESET_B $end
$var wire 1 D; buf_Q $end
$var wire 1 E; RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 3% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 2% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 F; VPWR $end
$var supply0 1 G; VGND $end
$var supply1 1 H; VPB $end
$var supply0 1 I; VNB $end
$scope module base $end
$var wire 1 3% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 2% D $end
$var wire 1 K# RESET_B $end
$var wire 1 J; buf_Q $end
$var wire 1 K; RESET $end
$upscope $end
$upscope $end
$scope module FTB_30__29 $end
$var wire 1 t% X $end
$var wire 1 3% A $end
$var supply1 1 L; VPWR $end
$var supply0 1 M; VGND $end
$var supply1 1 N; VPB $end
$var supply0 1 O; VNB $end
$scope module base $end
$var wire 1 t% X $end
$var wire 1 3% A $end
$var wire 1 P; buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_19 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 t% ccff_head [0] $end
$var wire 1 u% ccff_tail [0] $end
$var wire 1 4% mem_out [0] $end
$var wire 1 5% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 4% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 t% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 Q; VPWR $end
$var supply0 1 R; VGND $end
$var supply1 1 S; VPB $end
$var supply0 1 T; VNB $end
$scope module base $end
$var wire 1 4% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 t% D $end
$var wire 1 K# RESET_B $end
$var wire 1 U; buf_Q $end
$var wire 1 V; RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 5% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 4% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 W; VPWR $end
$var supply0 1 X; VGND $end
$var supply1 1 Y; VPB $end
$var supply0 1 Z; VNB $end
$scope module base $end
$var wire 1 5% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 4% D $end
$var wire 1 K# RESET_B $end
$var wire 1 [; buf_Q $end
$var wire 1 \; RESET $end
$upscope $end
$upscope $end
$scope module FTB_31__30 $end
$var wire 1 u% X $end
$var wire 1 5% A $end
$var supply1 1 ]; VPWR $end
$var supply0 1 ^; VGND $end
$var supply1 1 _; VPB $end
$var supply0 1 `; VNB $end
$scope module base $end
$var wire 1 u% X $end
$var wire 1 5% A $end
$var wire 1 a; buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_21 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 u% ccff_head [0] $end
$var wire 1 v% ccff_tail [0] $end
$var wire 1 6% mem_out [0] $end
$var wire 1 7% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 6% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 u% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 b; VPWR $end
$var supply0 1 c; VGND $end
$var supply1 1 d; VPB $end
$var supply0 1 e; VNB $end
$scope module base $end
$var wire 1 6% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 u% D $end
$var wire 1 K# RESET_B $end
$var wire 1 f; buf_Q $end
$var wire 1 g; RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 7% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 6% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 h; VPWR $end
$var supply0 1 i; VGND $end
$var supply1 1 j; VPB $end
$var supply0 1 k; VNB $end
$scope module base $end
$var wire 1 7% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 6% D $end
$var wire 1 K# RESET_B $end
$var wire 1 l; buf_Q $end
$var wire 1 m; RESET $end
$upscope $end
$upscope $end
$scope module FTB_32__31 $end
$var wire 1 v% X $end
$var wire 1 7% A $end
$var supply1 1 n; VPWR $end
$var supply0 1 o; VGND $end
$var supply1 1 p; VPB $end
$var supply0 1 q; VNB $end
$scope module base $end
$var wire 1 v% X $end
$var wire 1 7% A $end
$var wire 1 r; buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_23 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 v% ccff_head [0] $end
$var wire 1 x% ccff_tail [0] $end
$var wire 1 :% mem_out [0] $end
$var wire 1 ;% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 :% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 v% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 s; VPWR $end
$var supply0 1 t; VGND $end
$var supply1 1 u; VPB $end
$var supply0 1 v; VNB $end
$scope module base $end
$var wire 1 :% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 v% D $end
$var wire 1 K# RESET_B $end
$var wire 1 w; buf_Q $end
$var wire 1 x; RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 ;% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 :% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 y; VPWR $end
$var supply0 1 z; VGND $end
$var supply1 1 {; VPB $end
$var supply0 1 |; VNB $end
$scope module base $end
$var wire 1 ;% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 :% D $end
$var wire 1 K# RESET_B $end
$var wire 1 }; buf_Q $end
$var wire 1 ~; RESET $end
$upscope $end
$upscope $end
$scope module FTB_33__32 $end
$var wire 1 x% X $end
$var wire 1 ;% A $end
$var supply1 1 !< VPWR $end
$var supply0 1 "< VGND $end
$var supply1 1 #< VPB $end
$var supply0 1 $< VNB $end
$scope module base $end
$var wire 1 x% X $end
$var wire 1 ;% A $end
$var wire 1 %< buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_25 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 x% ccff_head [0] $end
$var wire 1 y% ccff_tail [0] $end
$var wire 1 <% mem_out [0] $end
$var wire 1 =% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 <% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 x% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 &< VPWR $end
$var supply0 1 '< VGND $end
$var supply1 1 (< VPB $end
$var supply0 1 )< VNB $end
$scope module base $end
$var wire 1 <% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 x% D $end
$var wire 1 K# RESET_B $end
$var wire 1 *< buf_Q $end
$var wire 1 +< RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 =% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 <% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 ,< VPWR $end
$var supply0 1 -< VGND $end
$var supply1 1 .< VPB $end
$var supply0 1 /< VNB $end
$scope module base $end
$var wire 1 =% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 <% D $end
$var wire 1 K# RESET_B $end
$var wire 1 0< buf_Q $end
$var wire 1 1< RESET $end
$upscope $end
$upscope $end
$scope module FTB_34__33 $end
$var wire 1 y% X $end
$var wire 1 =% A $end
$var supply1 1 2< VPWR $end
$var supply0 1 3< VGND $end
$var supply1 1 4< VPB $end
$var supply0 1 5< VNB $end
$scope module base $end
$var wire 1 y% X $end
$var wire 1 =% A $end
$var wire 1 6< buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_27 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 y% ccff_head [0] $end
$var wire 1 z% ccff_tail [0] $end
$var wire 1 >% mem_out [0] $end
$var wire 1 ?% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 >% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 y% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 7< VPWR $end
$var supply0 1 8< VGND $end
$var supply1 1 9< VPB $end
$var supply0 1 :< VNB $end
$scope module base $end
$var wire 1 >% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 y% D $end
$var wire 1 K# RESET_B $end
$var wire 1 ;< buf_Q $end
$var wire 1 << RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 ?% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 >% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 =< VPWR $end
$var supply0 1 >< VGND $end
$var supply1 1 ?< VPB $end
$var supply0 1 @< VNB $end
$scope module base $end
$var wire 1 ?% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 >% D $end
$var wire 1 K# RESET_B $end
$var wire 1 A< buf_Q $end
$var wire 1 B< RESET $end
$upscope $end
$upscope $end
$scope module FTB_35__34 $end
$var wire 1 z% X $end
$var wire 1 ?% A $end
$var supply1 1 C< VPWR $end
$var supply0 1 D< VGND $end
$var supply1 1 E< VPB $end
$var supply0 1 F< VNB $end
$scope module base $end
$var wire 1 z% X $end
$var wire 1 ?% A $end
$var wire 1 G< buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_31 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 <& ccff_head [0] $end
$var wire 1 {% ccff_tail [0] $end
$var wire 1 @% mem_out [0] $end
$var wire 1 A% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 @% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 <& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 H< VPWR $end
$var supply0 1 I< VGND $end
$var supply1 1 J< VPB $end
$var supply0 1 K< VNB $end
$scope module base $end
$var wire 1 @% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 <& D $end
$var wire 1 K# RESET_B $end
$var wire 1 L< buf_Q $end
$var wire 1 M< RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 A% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 @% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 N< VPWR $end
$var supply0 1 O< VGND $end
$var supply1 1 P< VPB $end
$var supply0 1 Q< VNB $end
$scope module base $end
$var wire 1 A% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 @% D $end
$var wire 1 K# RESET_B $end
$var wire 1 R< buf_Q $end
$var wire 1 S< RESET $end
$upscope $end
$upscope $end
$scope module FTB_36__35 $end
$var wire 1 {% X $end
$var wire 1 A% A $end
$var supply1 1 T< VPWR $end
$var supply0 1 U< VGND $end
$var supply1 1 V< VPB $end
$var supply0 1 W< VNB $end
$scope module base $end
$var wire 1 {% X $end
$var wire 1 A% A $end
$var wire 1 X< buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_33 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 {% ccff_head [0] $end
$var wire 1 |% ccff_tail [0] $end
$var wire 1 B% mem_out [0] $end
$var wire 1 C% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 B% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 {% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 Y< VPWR $end
$var supply0 1 Z< VGND $end
$var supply1 1 [< VPB $end
$var supply0 1 \< VNB $end
$scope module base $end
$var wire 1 B% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 {% D $end
$var wire 1 K# RESET_B $end
$var wire 1 ]< buf_Q $end
$var wire 1 ^< RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 C% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 B% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 _< VPWR $end
$var supply0 1 `< VGND $end
$var supply1 1 a< VPB $end
$var supply0 1 b< VNB $end
$scope module base $end
$var wire 1 C% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 B% D $end
$var wire 1 K# RESET_B $end
$var wire 1 c< buf_Q $end
$var wire 1 d< RESET $end
$upscope $end
$upscope $end
$scope module FTB_37__36 $end
$var wire 1 |% X $end
$var wire 1 C% A $end
$var supply1 1 e< VPWR $end
$var supply0 1 f< VGND $end
$var supply1 1 g< VPB $end
$var supply0 1 h< VNB $end
$scope module base $end
$var wire 1 |% X $end
$var wire 1 C% A $end
$var wire 1 i< buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_35 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 |% ccff_head [0] $end
$var wire 1 }% ccff_tail [0] $end
$var wire 1 D% mem_out [0] $end
$var wire 1 E% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 D% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 |% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 j< VPWR $end
$var supply0 1 k< VGND $end
$var supply1 1 l< VPB $end
$var supply0 1 m< VNB $end
$scope module base $end
$var wire 1 D% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 |% D $end
$var wire 1 K# RESET_B $end
$var wire 1 n< buf_Q $end
$var wire 1 o< RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 E% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 D% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 p< VPWR $end
$var supply0 1 q< VGND $end
$var supply1 1 r< VPB $end
$var supply0 1 s< VNB $end
$scope module base $end
$var wire 1 E% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 D% D $end
$var wire 1 K# RESET_B $end
$var wire 1 t< buf_Q $end
$var wire 1 u< RESET $end
$upscope $end
$upscope $end
$scope module FTB_38__37 $end
$var wire 1 }% X $end
$var wire 1 E% A $end
$var supply1 1 v< VPWR $end
$var supply0 1 w< VGND $end
$var supply1 1 x< VPB $end
$var supply0 1 y< VNB $end
$scope module base $end
$var wire 1 }% X $end
$var wire 1 E% A $end
$var wire 1 z< buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_37 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 }% ccff_head [0] $end
$var wire 1 ~% ccff_tail [0] $end
$var wire 1 F% mem_out [0] $end
$var wire 1 G% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 F% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 }% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 {< VPWR $end
$var supply0 1 |< VGND $end
$var supply1 1 }< VPB $end
$var supply0 1 ~< VNB $end
$scope module base $end
$var wire 1 F% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 }% D $end
$var wire 1 K# RESET_B $end
$var wire 1 != buf_Q $end
$var wire 1 "= RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 G% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 F% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 #= VPWR $end
$var supply0 1 $= VGND $end
$var supply1 1 %= VPB $end
$var supply0 1 &= VNB $end
$scope module base $end
$var wire 1 G% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 F% D $end
$var wire 1 K# RESET_B $end
$var wire 1 '= buf_Q $end
$var wire 1 (= RESET $end
$upscope $end
$upscope $end
$scope module FTB_39__38 $end
$var wire 1 ~% X $end
$var wire 1 G% A $end
$var supply1 1 )= VPWR $end
$var supply0 1 *= VGND $end
$var supply1 1 += VPB $end
$var supply0 1 ,= VNB $end
$scope module base $end
$var wire 1 ~% X $end
$var wire 1 G% A $end
$var wire 1 -= buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_39 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 ~% ccff_head [0] $end
$var wire 1 !& ccff_tail [0] $end
$var wire 1 H% mem_out [0] $end
$var wire 1 I% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 H% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ~% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 .= VPWR $end
$var supply0 1 /= VGND $end
$var supply1 1 0= VPB $end
$var supply0 1 1= VNB $end
$scope module base $end
$var wire 1 H% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 ~% D $end
$var wire 1 K# RESET_B $end
$var wire 1 2= buf_Q $end
$var wire 1 3= RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 I% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 H% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 4= VPWR $end
$var supply0 1 5= VGND $end
$var supply1 1 6= VPB $end
$var supply0 1 7= VNB $end
$scope module base $end
$var wire 1 I% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 H% D $end
$var wire 1 K# RESET_B $end
$var wire 1 8= buf_Q $end
$var wire 1 9= RESET $end
$upscope $end
$upscope $end
$scope module FTB_40__39 $end
$var wire 1 !& X $end
$var wire 1 I% A $end
$var supply1 1 := VPWR $end
$var supply0 1 ;= VGND $end
$var supply1 1 <= VPB $end
$var supply0 1 == VNB $end
$scope module base $end
$var wire 1 !& X $end
$var wire 1 I% A $end
$var wire 1 >= buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_41 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 !& ccff_head [0] $end
$var wire 1 "& ccff_tail [0] $end
$var wire 1 J% mem_out [0] $end
$var wire 1 K% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 J% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 !& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 ?= VPWR $end
$var supply0 1 @= VGND $end
$var supply1 1 A= VPB $end
$var supply0 1 B= VNB $end
$scope module base $end
$var wire 1 J% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 !& D $end
$var wire 1 K# RESET_B $end
$var wire 1 C= buf_Q $end
$var wire 1 D= RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 K% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 J% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 E= VPWR $end
$var supply0 1 F= VGND $end
$var supply1 1 G= VPB $end
$var supply0 1 H= VNB $end
$scope module base $end
$var wire 1 K% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 J% D $end
$var wire 1 K# RESET_B $end
$var wire 1 I= buf_Q $end
$var wire 1 J= RESET $end
$upscope $end
$upscope $end
$scope module FTB_41__40 $end
$var wire 1 "& X $end
$var wire 1 K% A $end
$var supply1 1 K= VPWR $end
$var supply0 1 L= VGND $end
$var supply1 1 M= VPB $end
$var supply0 1 N= VNB $end
$scope module base $end
$var wire 1 "& X $end
$var wire 1 K% A $end
$var wire 1 O= buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_43 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 "& ccff_head [0] $end
$var wire 1 #& ccff_tail [0] $end
$var wire 1 L% mem_out [0] $end
$var wire 1 M% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 L% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 "& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 P= VPWR $end
$var supply0 1 Q= VGND $end
$var supply1 1 R= VPB $end
$var supply0 1 S= VNB $end
$scope module base $end
$var wire 1 L% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 "& D $end
$var wire 1 K# RESET_B $end
$var wire 1 T= buf_Q $end
$var wire 1 U= RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 M% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 L% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 V= VPWR $end
$var supply0 1 W= VGND $end
$var supply1 1 X= VPB $end
$var supply0 1 Y= VNB $end
$scope module base $end
$var wire 1 M% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 L% D $end
$var wire 1 K# RESET_B $end
$var wire 1 Z= buf_Q $end
$var wire 1 [= RESET $end
$upscope $end
$upscope $end
$scope module FTB_42__41 $end
$var wire 1 #& X $end
$var wire 1 M% A $end
$var supply1 1 \= VPWR $end
$var supply0 1 ]= VGND $end
$var supply1 1 ^= VPB $end
$var supply0 1 _= VNB $end
$scope module base $end
$var wire 1 #& X $end
$var wire 1 M% A $end
$var wire 1 `= buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_45 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 #& ccff_head [0] $end
$var wire 1 %& ccff_tail [0] $end
$var wire 1 P% mem_out [0] $end
$var wire 1 Q% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 P% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 #& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 a= VPWR $end
$var supply0 1 b= VGND $end
$var supply1 1 c= VPB $end
$var supply0 1 d= VNB $end
$scope module base $end
$var wire 1 P% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 #& D $end
$var wire 1 K# RESET_B $end
$var wire 1 e= buf_Q $end
$var wire 1 f= RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 Q% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 P% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 g= VPWR $end
$var supply0 1 h= VGND $end
$var supply1 1 i= VPB $end
$var supply0 1 j= VNB $end
$scope module base $end
$var wire 1 Q% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 P% D $end
$var wire 1 K# RESET_B $end
$var wire 1 k= buf_Q $end
$var wire 1 l= RESET $end
$upscope $end
$upscope $end
$scope module FTB_43__42 $end
$var wire 1 %& X $end
$var wire 1 Q% A $end
$var supply1 1 m= VPWR $end
$var supply0 1 n= VGND $end
$var supply1 1 o= VPB $end
$var supply0 1 p= VNB $end
$scope module base $end
$var wire 1 %& X $end
$var wire 1 Q% A $end
$var wire 1 q= buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_47 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 %& ccff_head [0] $end
$var wire 1 && ccff_tail [0] $end
$var wire 1 R% mem_out [0] $end
$var wire 1 S% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 R% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 %& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 r= VPWR $end
$var supply0 1 s= VGND $end
$var supply1 1 t= VPB $end
$var supply0 1 u= VNB $end
$scope module base $end
$var wire 1 R% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 %& D $end
$var wire 1 K# RESET_B $end
$var wire 1 v= buf_Q $end
$var wire 1 w= RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 S% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 R% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 x= VPWR $end
$var supply0 1 y= VGND $end
$var supply1 1 z= VPB $end
$var supply0 1 {= VNB $end
$scope module base $end
$var wire 1 S% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 R% D $end
$var wire 1 K# RESET_B $end
$var wire 1 |= buf_Q $end
$var wire 1 }= RESET $end
$upscope $end
$upscope $end
$scope module FTB_44__43 $end
$var wire 1 && X $end
$var wire 1 S% A $end
$var supply1 1 ~= VPWR $end
$var supply0 1 !> VGND $end
$var supply1 1 "> VPB $end
$var supply0 1 #> VNB $end
$scope module base $end
$var wire 1 && X $end
$var wire 1 S% A $end
$var wire 1 $> buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_49 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 && ccff_head [0] $end
$var wire 1 '& ccff_tail [0] $end
$var wire 1 T% mem_out [0] $end
$var wire 1 U% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 T% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 && D $end
$var wire 1 K# RESET_B $end
$var supply1 1 %> VPWR $end
$var supply0 1 &> VGND $end
$var supply1 1 '> VPB $end
$var supply0 1 (> VNB $end
$scope module base $end
$var wire 1 T% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 && D $end
$var wire 1 K# RESET_B $end
$var wire 1 )> buf_Q $end
$var wire 1 *> RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 U% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 T% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 +> VPWR $end
$var supply0 1 ,> VGND $end
$var supply1 1 -> VPB $end
$var supply0 1 .> VNB $end
$scope module base $end
$var wire 1 U% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 T% D $end
$var wire 1 K# RESET_B $end
$var wire 1 /> buf_Q $end
$var wire 1 0> RESET $end
$upscope $end
$upscope $end
$scope module FTB_45__44 $end
$var wire 1 '& X $end
$var wire 1 U% A $end
$var supply1 1 1> VPWR $end
$var supply0 1 2> VGND $end
$var supply1 1 3> VPB $end
$var supply0 1 4> VNB $end
$scope module base $end
$var wire 1 '& X $end
$var wire 1 U% A $end
$var wire 1 5> buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_51 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 '& ccff_head [0] $end
$var wire 1 (& ccff_tail [0] $end
$var wire 1 V% mem_out [0] $end
$var wire 1 W% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 V% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 '& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 6> VPWR $end
$var supply0 1 7> VGND $end
$var supply1 1 8> VPB $end
$var supply0 1 9> VNB $end
$scope module base $end
$var wire 1 V% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 '& D $end
$var wire 1 K# RESET_B $end
$var wire 1 :> buf_Q $end
$var wire 1 ;> RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 W% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 V% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 <> VPWR $end
$var supply0 1 => VGND $end
$var supply1 1 >> VPB $end
$var supply0 1 ?> VNB $end
$scope module base $end
$var wire 1 W% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 V% D $end
$var wire 1 K# RESET_B $end
$var wire 1 @> buf_Q $end
$var wire 1 A> RESET $end
$upscope $end
$upscope $end
$scope module FTB_46__45 $end
$var wire 1 (& X $end
$var wire 1 W% A $end
$var supply1 1 B> VPWR $end
$var supply0 1 C> VGND $end
$var supply1 1 D> VPB $end
$var supply0 1 E> VNB $end
$scope module base $end
$var wire 1 (& X $end
$var wire 1 W% A $end
$var wire 1 F> buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_55 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 =& ccff_head [0] $end
$var wire 1 )& ccff_tail [0] $end
$var wire 1 X% mem_out [0] $end
$var wire 1 Y% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 X% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 =& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 G> VPWR $end
$var supply0 1 H> VGND $end
$var supply1 1 I> VPB $end
$var supply0 1 J> VNB $end
$scope module base $end
$var wire 1 X% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 =& D $end
$var wire 1 K# RESET_B $end
$var wire 1 K> buf_Q $end
$var wire 1 L> RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 Y% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 X% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 M> VPWR $end
$var supply0 1 N> VGND $end
$var supply1 1 O> VPB $end
$var supply0 1 P> VNB $end
$scope module base $end
$var wire 1 Y% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 X% D $end
$var wire 1 K# RESET_B $end
$var wire 1 Q> buf_Q $end
$var wire 1 R> RESET $end
$upscope $end
$upscope $end
$scope module FTB_47__46 $end
$var wire 1 )& X $end
$var wire 1 Y% A $end
$var supply1 1 S> VPWR $end
$var supply0 1 T> VGND $end
$var supply1 1 U> VPB $end
$var supply0 1 V> VNB $end
$scope module base $end
$var wire 1 )& X $end
$var wire 1 Y% A $end
$var wire 1 W> buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_57 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 )& ccff_head [0] $end
$var wire 1 *& ccff_tail [0] $end
$var wire 1 Z% mem_out [0] $end
$var wire 1 [% mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 Z% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 )& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 X> VPWR $end
$var supply0 1 Y> VGND $end
$var supply1 1 Z> VPB $end
$var supply0 1 [> VNB $end
$scope module base $end
$var wire 1 Z% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 )& D $end
$var wire 1 K# RESET_B $end
$var wire 1 \> buf_Q $end
$var wire 1 ]> RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 [% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 Z% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 ^> VPWR $end
$var supply0 1 _> VGND $end
$var supply1 1 `> VPB $end
$var supply0 1 a> VNB $end
$scope module base $end
$var wire 1 [% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 Z% D $end
$var wire 1 K# RESET_B $end
$var wire 1 b> buf_Q $end
$var wire 1 c> RESET $end
$upscope $end
$upscope $end
$scope module FTB_48__47 $end
$var wire 1 *& X $end
$var wire 1 [% A $end
$var supply1 1 d> VPWR $end
$var supply0 1 e> VGND $end
$var supply1 1 f> VPB $end
$var supply0 1 g> VNB $end
$scope module base $end
$var wire 1 *& X $end
$var wire 1 [% A $end
$var wire 1 h> buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_59 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 *& ccff_head [0] $end
$var wire 1 y$ ccff_tail [0] $end
$var wire 1 \% mem_out [0] $end
$var wire 1 ]% mem_out [1] $end
$var wire 1 i> copt_net_172 $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 \% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 *& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 j> VPWR $end
$var supply0 1 k> VGND $end
$var supply1 1 l> VPB $end
$var supply0 1 m> VNB $end
$scope module base $end
$var wire 1 \% Q $end
$var wire 1 ~$ CLK $end
$var wire 1 *& D $end
$var wire 1 K# RESET_B $end
$var wire 1 n> buf_Q $end
$var wire 1 o> RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 i> Q $end
$var wire 1 ~$ CLK $end
$var wire 1 \% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 p> VPWR $end
$var supply0 1 q> VGND $end
$var supply1 1 r> VPB $end
$var supply0 1 s> VNB $end
$scope module base $end
$var wire 1 i> Q $end
$var wire 1 ~$ CLK $end
$var wire 1 \% D $end
$var wire 1 K# RESET_B $end
$var wire 1 t> buf_Q $end
$var wire 1 u> RESET $end
$upscope $end
$upscope $end
$scope module FTB_49__48 $end
$var wire 1 y$ X $end
$var wire 1 ]% A $end
$var supply1 1 v> VPWR $end
$var supply0 1 w> VGND $end
$var supply1 1 x> VPB $end
$var supply0 1 y> VNB $end
$scope module base $end
$var wire 1 y$ X $end
$var wire 1 ]% A $end
$var wire 1 z> buf0_out_X $end
$upscope $end
$upscope $end
$scope module copt_h_inst_1348 $end
$var wire 1 ]% X $end
$var wire 1 i> A $end
$var supply1 1 {> VPWR $end
$var supply0 1 |> VGND $end
$var supply1 1 }> VPB $end
$var supply0 1 ~> VNB $end
$scope module base $end
$var wire 1 ]% X $end
$var wire 1 i> A $end
$var wire 1 !? buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_29 $end
$var wire 1 j# in [0] $end
$var wire 1 r# in [1] $end
$var wire 1 $$ in [2] $end
$var wire 1 2& sram [0] $end
$var wire 1 3& sram [1] $end
$var wire 1 (( sram_inv [0] $end
$var wire 1 )( sram_inv [1] $end
$var wire 1 K$ out [0] $end
$var wire 1 3' p0 $end
$var wire 1 "? sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 #? sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 $? sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 %? BUF_net_130 $end
$scope module mux_l1_in_0_ $end
$var wire 1 "? X $end
$var wire 1 r# A0 $end
$var wire 1 j# A1 $end
$var wire 1 2& S $end
$var supply1 1 &? VPWR $end
$var supply0 1 '? VGND $end
$var supply1 1 (? VPB $end
$var supply0 1 )? VNB $end
$scope module base $end
$var wire 1 "? X $end
$var wire 1 r# A0 $end
$var wire 1 j# A1 $end
$var wire 1 2& S $end
$var wire 1 *? mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_1_ $end
$var wire 1 #? X $end
$var wire 1 3' A0 $end
$var wire 1 $$ A1 $end
$var wire 1 2& S $end
$var supply1 1 +? VPWR $end
$var supply0 1 ,? VGND $end
$var supply1 1 -? VPB $end
$var supply0 1 .? VNB $end
$scope module base $end
$var wire 1 #? X $end
$var wire 1 3' A0 $end
$var wire 1 $$ A1 $end
$var wire 1 2& S $end
$var wire 1 /? mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 $? X $end
$var wire 1 #? A0 $end
$var wire 1 "? A1 $end
$var wire 1 3& S $end
$var supply1 1 0? VPWR $end
$var supply0 1 1? VGND $end
$var supply1 1 2? VPB $end
$var supply0 1 3? VNB $end
$scope module base $end
$var wire 1 $? X $end
$var wire 1 #? A0 $end
$var wire 1 "? A1 $end
$var wire 1 3& S $end
$var wire 1 4? mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_129 $end
$var wire 1 K$ Y $end
$var wire 1 %? A $end
$var supply1 1 5? VPWR $end
$var supply0 1 6? VGND $end
$var supply1 1 7? VPB $end
$var supply0 1 8? VNB $end
$scope module base $end
$var wire 1 K$ Y $end
$var wire 1 %? A $end
$var wire 1 9? not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_130 $end
$var wire 1 %? Y $end
$var wire 1 $? A $end
$var supply1 1 :? VPWR $end
$var supply0 1 ;? VGND $end
$var supply1 1 VPB $end
$var supply0 1 =? VNB $end
$scope module base $end
$var wire 1 %? Y $end
$var wire 1 $? A $end
$var wire 1 >? not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_bottom_track_45 $end
$var wire 1 j# in [0] $end
$var wire 1 n# in [1] $end
$var wire 1 ,$ in [2] $end
$var wire 1 4& sram [0] $end
$var wire 1 5& sram [1] $end
$var wire 1 *( sram_inv [0] $end
$var wire 1 +( sram_inv [1] $end
$var wire 1 S$ out [0] $end
$var wire 1 q& p0 $end
$var wire 1 ?? sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 @? sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 A? sky130_fd_sc_hd__mux2_1_2_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 S$ X $end
$var wire 1 A? A $end
$var supply1 1 B? VPWR $end
$var supply0 1 C? VGND $end
$var supply1 1 D? VPB $end
$var supply0 1 E? VNB $end
$scope module base $end
$var wire 1 S$ X $end
$var wire 1 A? A $end
$var wire 1 F? buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 ?? X $end
$var wire 1 n# A0 $end
$var wire 1 j# A1 $end
$var wire 1 4& S $end
$var supply1 1 G? VPWR $end
$var supply0 1 H? VGND $end
$var supply1 1 I? VPB $end
$var supply0 1 J? VNB $end
$scope module base $end
$var wire 1 ?? X $end
$var wire 1 n# A0 $end
$var wire 1 j# A1 $end
$var wire 1 4& S $end
$var wire 1 K? mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_1_ $end
$var wire 1 @? X $end
$var wire 1 q& A0 $end
$var wire 1 ,$ A1 $end
$var wire 1 4& S $end
$var supply1 1 L? VPWR $end
$var supply0 1 M? VGND $end
$var supply1 1 N? VPB $end
$var supply0 1 O? VNB $end
$scope module base $end
$var wire 1 @? X $end
$var wire 1 q& A0 $end
$var wire 1 ,$ A1 $end
$var wire 1 4& S $end
$var wire 1 P? mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 A? X $end
$var wire 1 @? A0 $end
$var wire 1 ?? A1 $end
$var wire 1 5& S $end
$var supply1 1 Q? VPWR $end
$var supply0 1 R? VGND $end
$var supply1 1 S? VPB $end
$var supply0 1 T? VNB $end
$scope module base $end
$var wire 1 A? X $end
$var wire 1 @? A0 $end
$var wire 1 ?? A1 $end
$var wire 1 5& S $end
$var wire 1 U? mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_29 $end
$var wire 1 Y# in [0] $end
$var wire 1 3$ in [1] $end
$var wire 1 ;$ in [2] $end
$var wire 1 6& sram [0] $end
$var wire 1 7& sram [1] $end
$var wire 1 ,( sram_inv [0] $end
$var wire 1 -( sram_inv [1] $end
$var wire 1 i$ out [0] $end
$var wire 1 '' p0 $end
$var wire 1 V? sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 W? sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 X? sky130_fd_sc_hd__mux2_1_2_X [0] $end
$scope module sky130_fd_sc_hd__buf_4_0_ $end
$var wire 1 i$ X $end
$var wire 1 X? A $end
$var supply1 1 Y? VPWR $end
$var supply0 1 Z? VGND $end
$var supply1 1 [? VPB $end
$var supply0 1 \? VNB $end
$scope module base $end
$var wire 1 i$ X $end
$var wire 1 X? A $end
$var wire 1 ]? buf0_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_0_ $end
$var wire 1 V? X $end
$var wire 1 3$ A0 $end
$var wire 1 Y# A1 $end
$var wire 1 6& S $end
$var supply1 1 ^? VPWR $end
$var supply0 1 _? VGND $end
$var supply1 1 `? VPB $end
$var supply0 1 a? VNB $end
$scope module base $end
$var wire 1 V? X $end
$var wire 1 3$ A0 $end
$var wire 1 Y# A1 $end
$var wire 1 6& S $end
$var wire 1 b? mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_1_ $end
$var wire 1 W? X $end
$var wire 1 '' A0 $end
$var wire 1 ;$ A1 $end
$var wire 1 6& S $end
$var supply1 1 c? VPWR $end
$var supply0 1 d? VGND $end
$var supply1 1 e? VPB $end
$var supply0 1 f? VNB $end
$scope module base $end
$var wire 1 W? X $end
$var wire 1 '' A0 $end
$var wire 1 ;$ A1 $end
$var wire 1 6& S $end
$var wire 1 g? mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 X? X $end
$var wire 1 W? A0 $end
$var wire 1 V? A1 $end
$var wire 1 7& S $end
$var supply1 1 h? VPWR $end
$var supply0 1 i? VGND $end
$var supply1 1 j? VPB $end
$var supply0 1 k? VNB $end
$scope module base $end
$var wire 1 X? X $end
$var wire 1 W? A0 $end
$var wire 1 V? A1 $end
$var wire 1 7& S $end
$var wire 1 l? mux_2to10_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mux_left_track_53 $end
$var wire 1 e# in [0] $end
$var wire 1 7$ in [1] $end
$var wire 1 ;$ in [2] $end
$var wire 1 8& sram [0] $end
$var wire 1 9& sram [1] $end
$var wire 1 .( sram_inv [0] $end
$var wire 1 /( sram_inv [1] $end
$var wire 1 u$ out [0] $end
$var wire 1 +' p0 $end
$var wire 1 m? sky130_fd_sc_hd__mux2_1_0_X [0] $end
$var wire 1 n? sky130_fd_sc_hd__mux2_1_1_X [0] $end
$var wire 1 o? sky130_fd_sc_hd__mux2_1_2_X [0] $end
$var wire 1 p? BUF_net_132 $end
$scope module mux_l1_in_0_ $end
$var wire 1 m? X $end
$var wire 1 7$ A0 $end
$var wire 1 e# A1 $end
$var wire 1 8& S $end
$var supply1 1 q? VPWR $end
$var supply0 1 r? VGND $end
$var supply1 1 s? VPB $end
$var supply0 1 t? VNB $end
$scope module base $end
$var wire 1 m? X $end
$var wire 1 7$ A0 $end
$var wire 1 e# A1 $end
$var wire 1 8& S $end
$var wire 1 u? mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l1_in_1_ $end
$var wire 1 n? X $end
$var wire 1 +' A0 $end
$var wire 1 ;$ A1 $end
$var wire 1 8& S $end
$var supply1 1 v? VPWR $end
$var supply0 1 w? VGND $end
$var supply1 1 x? VPB $end
$var supply0 1 y? VNB $end
$scope module base $end
$var wire 1 n? X $end
$var wire 1 +' A0 $end
$var wire 1 ;$ A1 $end
$var wire 1 8& S $end
$var wire 1 z? mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module mux_l2_in_0_ $end
$var wire 1 o? X $end
$var wire 1 n? A0 $end
$var wire 1 m? A1 $end
$var wire 1 9& S $end
$var supply1 1 {? VPWR $end
$var supply0 1 |? VGND $end
$var supply1 1 }? VPB $end
$var supply0 1 ~? VNB $end
$scope module base $end
$var wire 1 o? X $end
$var wire 1 n? A0 $end
$var wire 1 m? A1 $end
$var wire 1 9& S $end
$var wire 1 !@ mux_2to10_out_X $end
$upscope $end
$upscope $end
$scope module BINV_R_131 $end
$var wire 1 u$ Y $end
$var wire 1 p? A $end
$var supply1 1 "@ VPWR $end
$var supply0 1 #@ VGND $end
$var supply1 1 $@ VPB $end
$var supply0 1 %@ VNB $end
$scope module base $end
$var wire 1 u$ Y $end
$var wire 1 p? A $end
$var wire 1 &@ not0_out_Y $end
$upscope $end
$upscope $end
$scope module BINV_R_132 $end
$var wire 1 p? Y $end
$var wire 1 o? A $end
$var supply1 1 '@ VPWR $end
$var supply0 1 (@ VGND $end
$var supply1 1 )@ VPB $end
$var supply0 1 *@ VNB $end
$scope module base $end
$var wire 1 p? Y $end
$var wire 1 o? A $end
$var wire 1 +@ not0_out_Y $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_29 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 /& ccff_head [0] $end
$var wire 1 :& ccff_tail [0] $end
$var wire 1 2& mem_out [0] $end
$var wire 1 3& mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 2& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 /& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 ,@ VPWR $end
$var supply0 1 -@ VGND $end
$var supply1 1 .@ VPB $end
$var supply0 1 /@ VNB $end
$scope module base $end
$var wire 1 2& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 /& D $end
$var wire 1 K# RESET_B $end
$var wire 1 0@ buf_Q $end
$var wire 1 1@ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 3& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 2& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 2@ VPWR $end
$var supply0 1 3@ VGND $end
$var supply1 1 4@ VPB $end
$var supply0 1 5@ VNB $end
$scope module base $end
$var wire 1 3& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 2& D $end
$var wire 1 K# RESET_B $end
$var wire 1 6@ buf_Q $end
$var wire 1 7@ RESET $end
$upscope $end
$upscope $end
$scope module FTB_50__49 $end
$var wire 1 :& X $end
$var wire 1 3& A $end
$var supply1 1 8@ VPWR $end
$var supply0 1 9@ VGND $end
$var supply1 1 :@ VPB $end
$var supply0 1 ;@ VNB $end
$scope module base $end
$var wire 1 :& X $end
$var wire 1 3& A $end
$var wire 1 <@ buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_bottom_track_45 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 m% ccff_head [0] $end
$var wire 1 ;& ccff_tail [0] $end
$var wire 1 4& mem_out [0] $end
$var wire 1 5& mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 4& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 m% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 =@ VPWR $end
$var supply0 1 >@ VGND $end
$var supply1 1 ?@ VPB $end
$var supply0 1 @@ VNB $end
$scope module base $end
$var wire 1 4& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 m% D $end
$var wire 1 K# RESET_B $end
$var wire 1 A@ buf_Q $end
$var wire 1 B@ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 5& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 4& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 C@ VPWR $end
$var supply0 1 D@ VGND $end
$var supply1 1 E@ VPB $end
$var supply0 1 F@ VNB $end
$scope module base $end
$var wire 1 5& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 4& D $end
$var wire 1 K# RESET_B $end
$var wire 1 G@ buf_Q $end
$var wire 1 H@ RESET $end
$upscope $end
$upscope $end
$scope module FTB_51__50 $end
$var wire 1 ;& X $end
$var wire 1 5& A $end
$var supply1 1 I@ VPWR $end
$var supply0 1 J@ VGND $end
$var supply1 1 K@ VPB $end
$var supply0 1 L@ VNB $end
$scope module base $end
$var wire 1 ;& X $end
$var wire 1 5& A $end
$var wire 1 M@ buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_29 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 z% ccff_head [0] $end
$var wire 1 <& ccff_tail [0] $end
$var wire 1 6& mem_out [0] $end
$var wire 1 7& mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 6& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 z% D $end
$var wire 1 K# RESET_B $end
$var supply1 1 N@ VPWR $end
$var supply0 1 O@ VGND $end
$var supply1 1 P@ VPB $end
$var supply0 1 Q@ VNB $end
$scope module base $end
$var wire 1 6& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 z% D $end
$var wire 1 K# RESET_B $end
$var wire 1 R@ buf_Q $end
$var wire 1 S@ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 7& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 6& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 T@ VPWR $end
$var supply0 1 U@ VGND $end
$var supply1 1 V@ VPB $end
$var supply0 1 W@ VNB $end
$scope module base $end
$var wire 1 7& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 6& D $end
$var wire 1 K# RESET_B $end
$var wire 1 X@ buf_Q $end
$var wire 1 Y@ RESET $end
$upscope $end
$upscope $end
$scope module FTB_52__51 $end
$var wire 1 <& X $end
$var wire 1 7& A $end
$var supply1 1 Z@ VPWR $end
$var supply0 1 [@ VGND $end
$var supply1 1 \@ VPB $end
$var supply0 1 ]@ VNB $end
$scope module base $end
$var wire 1 <& X $end
$var wire 1 7& A $end
$var wire 1 ^@ buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module mem_left_track_53 $end
$var wire 1 K# pReset [0] $end
$var wire 1 ~$ prog_clk [0] $end
$var wire 1 (& ccff_head [0] $end
$var wire 1 =& ccff_tail [0] $end
$var wire 1 8& mem_out [0] $end
$var wire 1 9& mem_out [1] $end
$scope module sky130_fd_sc_hd__dfrtp_1_0_ $end
$var wire 1 8& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 (& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 _@ VPWR $end
$var supply0 1 `@ VGND $end
$var supply1 1 a@ VPB $end
$var supply0 1 b@ VNB $end
$scope module base $end
$var wire 1 8& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 (& D $end
$var wire 1 K# RESET_B $end
$var wire 1 c@ buf_Q $end
$var wire 1 d@ RESET $end
$upscope $end
$upscope $end
$scope module sky130_fd_sc_hd__dfrtp_1_1_ $end
$var wire 1 9& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 8& D $end
$var wire 1 K# RESET_B $end
$var supply1 1 e@ VPWR $end
$var supply0 1 f@ VGND $end
$var supply1 1 g@ VPB $end
$var supply0 1 h@ VNB $end
$scope module base $end
$var wire 1 9& Q $end
$var wire 1 ~$ CLK $end
$var wire 1 8& D $end
$var wire 1 K# RESET_B $end
$var wire 1 i@ buf_Q $end
$var wire 1 j@ RESET $end
$upscope $end
$upscope $end
$scope module FTB_53__52 $end
$var wire 1 =& X $end
$var wire 1 9& A $end
$var supply1 1 k@ VPWR $end
$var supply0 1 l@ VGND $end
$var supply1 1 m@ VPB $end
$var supply0 1 n@ VNB $end
$scope module base $end
$var wire 1 =& X $end
$var wire 1 9& A $end
$var wire 1 o@ buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$scope module pReset_FTB00 $end
$var wire 1 K# X $end
$var wire 1 {$ A $end
$var supply1 1 p@ VPWR $end
$var supply0 1 q@ VGND $end
$var supply1 1 r@ VPB $end
$var supply0 1 s@ VNB $end
$scope module base $end
$var wire 1 K# X $end
$var wire 1 {$ A $end
$var wire 1 t@ buf0_out_X $end
$upscope $end
$upscope $end
$scope module prog_clk_0_FTB00 $end
$var wire 1 ~$ X $end
$var wire 1 |$ A $end
$var supply1 1 u@ VPWR $end
$var supply0 1 v@ VGND $end
$var supply1 1 w@ VPB $end
$var supply0 1 x@ VNB $end
$scope module base $end
$var wire 1 ~$ X $end
$var wire 1 |$ A $end
$var wire 1 y@ buf0_out_X $end
$upscope $end
$upscope $end
$scope module FTB_54__53 $end
$var wire 1 }$ X $end
$var wire 1 s# A $end
$var supply1 1 z@ VPWR $end
$var supply0 1 {@ VGND $end
$var supply1 1 |@ VPB $end
$var supply0 1 }@ VNB $end
$scope module base $end
$var wire 1 }$ X $end
$var wire 1 s# A $end
$var wire 1 ~@ buf0_out_X $end
$upscope $end
$upscope $end
$scope module FTB_55__54 $end
$var wire 1 L$ X $end
$var wire 1 %$ A $end
$var supply1 1 !A VPWR $end
$var supply0 1 "A VGND $end
$var supply1 1 #A VPB $end
$var supply0 1 $A VNB $end
$scope module base $end
$var wire 1 L$ X $end
$var wire 1 %$ A $end
$var wire 1 %A buf0_out_X $end
$upscope $end
$upscope $end
$scope module FTB_56__55 $end
$var wire 1 M$ X $end
$var wire 1 &$ A $end
$var supply1 1 &A VPWR $end
$var supply0 1 'A VGND $end
$var supply1 1 (A VPB $end
$var supply0 1 )A VNB $end
$scope module base $end
$var wire 1 M$ X $end
$var wire 1 &$ A $end
$var wire 1 *A buf0_out_X $end
$upscope $end
$upscope $end
$scope module FTB_57__56 $end
$var wire 1 N$ X $end
$var wire 1 '$ A $end
$var supply1 1 +A VPWR $end
$var supply0 1 ,A VGND $end
$var supply1 1 -A VPB $end
$var supply0 1 .A VNB $end
$scope module base $end
$var wire 1 N$ X $end
$var wire 1 '$ A $end
$var wire 1 /A buf0_out_X $end
$upscope $end
$upscope $end
$scope module FTB_58__57 $end
$var wire 1 O$ X $end
$var wire 1 ($ A $end
$var supply1 1 0A VPWR $end
$var supply0 1 1A VGND $end
$var supply1 1 2A VPB $end
$var supply0 1 3A VNB $end
$scope module base $end
$var wire 1 O$ X $end
$var wire 1 ($ A $end
$var wire 1 4A buf0_out_X $end
$upscope $end
$upscope $end
$scope module FTB_59__58 $end
$var wire 1 X$ X $end
$var wire 1 1$ A $end
$var supply1 1 5A VPWR $end
$var supply0 1 6A VGND $end
$var supply1 1 7A VPB $end
$var supply0 1 8A VNB $end
$scope module base $end
$var wire 1 X$ X $end
$var wire 1 1$ A $end
$var wire 1 9A buf0_out_X $end
$upscope $end
$upscope $end
$scope module FTB_60__59 $end
$var wire 1 Y$ X $end
$var wire 1 2$ A $end
$var supply1 1 :A VPWR $end
$var supply0 1 ;A VGND $end
$var supply1 1 A buf0_out_X $end
$upscope $end
$upscope $end
$scope module FTB_61__60 $end
$var wire 1 z$ X $end
$var wire 1 $ A $end
$var supply1 1 ?A VPWR $end
$var supply0 1 @A VGND $end
$var supply1 1 AA VPB $end
$var supply0 1 BA VNB $end
$scope module base $end
$var wire 1 z$ X $end
$var wire 1 $ A $end
$var wire 1 CA buf0_out_X $end
$upscope $end
$upscope $end
$scope module optlc_157 $end
$var wire 1 q& HI $end
$var wire 1 0( LO $end
$var supply1 1 DA VPWR $end
$var supply0 1 EA VGND $end
$var supply1 1 FA VPB $end
$var supply0 1 GA VNB $end
$scope module base $end
$var wire 1 q& HI $end
$var wire 1 0( LO $end
$upscope $end
$upscope $end
$scope module optlc_161 $end
$var wire 1 '' HI $end
$var wire 1 1( LO $end
$var supply1 1 HA VPWR $end
$var supply0 1 IA VGND $end
$var supply1 1 JA VPB $end
$var supply0 1 KA VNB $end
$scope module base $end
$var wire 1 '' HI $end
$var wire 1 1( LO $end
$upscope $end
$upscope $end
$scope module optlc_164 $end
$var wire 1 3' HI $end
$var wire 1 2( LO $end
$var supply1 1 LA VPWR $end
$var supply0 1 MA VGND $end
$var supply1 1 NA VPB $end
$var supply0 1 OA VNB $end
$scope module base $end
$var wire 1 3' HI $end
$var wire 1 2( LO $end
$upscope $end
$upscope $end
$scope module optlc_168 $end
$var wire 1 +' HI $end
$var wire 1 3( LO $end
$var supply1 1 PA VPWR $end
$var supply0 1 QA VGND $end
$var supply1 1 RA VPB $end
$var supply0 1 SA VNB $end
$scope module base $end
$var wire 1 +' HI $end
$var wire 1 3( LO $end
$upscope $end
$upscope $end
$scope module optlc_170 $end
$var wire 1 <' HI $end
$var wire 1 4( LO $end
$var supply1 1 TA VPWR $end
$var supply0 1 UA VGND $end
$var supply1 1 VA VPB $end
$var supply0 1 WA VNB $end
$scope module base $end
$var wire 1 <' HI $end
$var wire 1 4( LO $end
$upscope $end
$upscope $end
$scope module optlc_173 $end
$var wire 1 ~& HI $end
$var wire 1 5( LO $end
$var supply1 1 XA VPWR $end
$var supply0 1 YA VGND $end
$var supply1 1 ZA VPB $end
$var supply0 1 [A VNB $end
$scope module base $end
$var wire 1 ~& HI $end
$var wire 1 5( LO $end
$upscope $end
$upscope $end
$scope module optlc_175 $end
$var wire 1 /' HI $end
$var wire 1 6( LO $end
$var supply1 1 \A VPWR $end
$var supply0 1 ]A VGND $end
$var supply1 1 ^A VPB $end
$var supply0 1 _A VNB $end
$scope module base $end
$var wire 1 /' HI $end
$var wire 1 6( LO $end
$upscope $end
$upscope $end
$scope module optlc_177 $end
$var wire 1 [' HI $end
$var wire 1 7( LO $end
$var supply1 1 `A VPWR $end
$var supply0 1 aA VGND $end
$var supply1 1 bA VPB $end
$var supply0 1 cA VNB $end
$scope module base $end
$var wire 1 [' HI $end
$var wire 1 7( LO $end
$upscope $end
$upscope $end
$scope module ropt_mt_inst_1359 $end
$var wire 1 Z$ X $end
$var wire 1 }$ A $end
$var supply1 1 dA VPWR $end
$var supply0 1 eA VGND $end
$var supply1 1 fA VPB $end
$var supply0 1 gA VNB $end
$scope module base $end
$var wire 1 Z$ X $end
$var wire 1 }$ A $end
$var wire 1 hA buf0_out_X $end
$upscope $end
$upscope $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
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