SOFA /

.readthedocs.yml

ARCH/README.md

ARCH/fabric_key/fabric_key_2x2.xml

ARCH/fabric_key/fabric_key_12x12.xml

ARCH/fabric_key/fabric_key_32x32.xml

ARCH/openfpga_arch/README.md

ARCH/openfpga_arch_template/README.md

ARCH/openfpga_arch_template/k4_N8_reset_softadder_register_scan_chain_caravel_io_skywater130nm_fdhd_cc_openfpga.xml

ARCH/openfpga_arch_template/k4_frac_N8_register_scan_chain_caravel_io_skywater130nm_fdhd_cc_openfpga.xml

ARCH/openfpga_arch_template/k4_frac_N8_reset_register_scan_chain_caravel_io_skywater130nm_fdhd_cc_openfpga.xml

ARCH/openfpga_arch_template/k4_frac_N8_reset_softadder_register_scan_chain_caravel_io_skywater130nm_customhd_cc_openfpga.xml

ARCH/openfpga_arch_template/k4_frac_N8_reset_softadder_register_scan_chain_caravel_io_skywater130nm_fdhd_cc_openfpga.xml

ARCH/openfpga_arch_template/k4_frac_N8_softadder_register_scan_chain_caravel_io_skywater130nm_fdhd_cc_openfpga.xml

ARCH/openfpga_arch_template/ql_ap3_8x8_arch_vpr_routing_skywater130nm_fdhd_cc_openfpga.xml

ARCH/timing_annotation/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm_timing_tt_025C_1v80.yml

ARCH/timing_annotation/k4_frac_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm_chd_timing_tt_025C_1v80.yml

ARCH/timing_annotation/k4_frac_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm_timing_tt_025C_1v80.yml

ARCH/vpr_arch/README.md

ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml

ARCH/vpr_arch/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml

ARCH/vpr_arch/k4_frac_N8_tileable_reset_register_scan_chain_nonLR_caravel_io_skywater130nm.xml

ARCH/vpr_arch/k4_frac_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml

ARCH/vpr_arch/k4_frac_N8_tileable_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml

ARCH/vpr_arch/ql_ap3_8x8_arch_vpr_routing.xml

BENCHMARK/Simon_bit_serial_top_module/Simon_bit_serial_top_module_yosys.blif

BENCHMARK/Simon_bit_serial_top_module/rtl/Simon_bit_serial_datapath_FPGA.v

BENCHMARK/Simon_bit_serial_top_module/rtl/Simon_bit_serial_key_expansion_FPGA.v

BENCHMARK/Simon_bit_serial_top_module/rtl/Simon_bit_serial_top_module.v

BENCHMARK/ULPSH_fabric/rtl/src/CM_FIFO_1x.v

BENCHMARK/ULPSH_fabric/rtl/src/CM_FIFO_autodrain.v

BENCHMARK/ULPSH_fabric/rtl/src/FFEControlMemory_4k.v

BENCHMARK/ULPSH_fabric/rtl/src/FFEDataMemoryMux.v

BENCHMARK/ULPSH_fabric/rtl/src/FFE_ALU.v

BENCHMARK/ULPSH_fabric/rtl/src/FFE_Control.v

BENCHMARK/ULPSH_fabric/rtl/src/MicroOpCodesDecode.v

BENCHMARK/ULPSH_fabric/rtl/src/SMEMemoryMux.v

BENCHMARK/ULPSH_fabric/rtl/src/SMMemory.v

BENCHMARK/ULPSH_fabric/rtl/src/SPI_slave.v

BENCHMARK/ULPSH_fabric/rtl/src/SensorHubDefines.v

BENCHMARK/ULPSH_fabric/rtl/src/SensorManager.v

BENCHMARK/ULPSH_fabric/rtl/src/StateMachine.v

BENCHMARK/ULPSH_fabric/rtl/src/SystemClockControl.v

BENCHMARK/ULPSH_fabric/rtl/src/TLC.v

BENCHMARK/ULPSH_fabric/rtl/src/ULPSH_fabric.v

BENCHMARK/ULPSH_fabric/rtl/src/hard_macros_ql/Aurora/primitive_macros.v

BENCHMARK/ULPSH_fabric/rtl/src/hard_macros_ql/Aurora/qlprim.v

BENCHMARK/ULPSH_fabric/rtl/src/hard_macros_ql/clock_buffer_ql.v

BENCHMARK/ULPSH_fabric/rtl/src/hard_macros_ql/dff_pre_clr_ql.v

BENCHMARK/ULPSH_fabric/rtl/src/ring_osc_adjust.v

BENCHMARK/ULPSH_fabric/rtl/src/ulpsh_rtl_defines.v

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