5 Commits

Author	SHA1	Message	Date
Ganesh Gore	5679ee0cb4	[QLSOFA-HD] Fixed reset signal short/GDS precision to 1000	2020-12-06 20:47:52 -07:00
Ganesh Gore	12ffaed8fa	[QLSOFA-HD] Added screenshots for top level PnR	2020-12-06 20:45:31 -07:00
Ganesh Gore	452af85e98	[Cleanup] Removed/Ignored testbench files from generated source	2020-12-06 01:40:21 -07:00
Ganesh Gore	923a502c24	[FPGA1212_v1.1] Added PostPnR files	2020-12-02 01:43:58 -07:00
Ganesh Gore	f385c0ca11	[FPGA1212_v1.1] Added OpenFPGA task and verilog netlist	2020-12-02 01:43:05 -07:00