tangxifan
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72f8323468
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[Script] Start developing scripts to initialize the repository
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2020-10-09 18:32:59 -06:00 |
tangxifan
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0053c57954
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[Arch] Update architecture file
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2020-10-09 18:32:31 -06:00 |
tangxifan
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069c36cbfc
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[Architecture] Create template architecture for openfpga
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2020-10-09 17:28:14 -06:00 |
tangxifan
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a2b42c2e5f
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[Script] Now use variables to redirect the output directory of Verilog/SDC files
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2020-10-09 16:00:41 -06:00 |
tangxifan
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b9cbe3c69e
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[Flow] Add openfpga task for generate fabric
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2020-10-09 15:07:18 -06:00 |
tangxifan
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241aae76e4
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[Architecture] Rename architecture file
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2020-10-09 15:04:21 -06:00 |
tangxifan
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64bbaf374d
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[Flow] Add scripts to run OpenFPGA tasks
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2020-10-09 14:49:54 -06:00 |
tangxifan
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c5d6bcd15f
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[Architecture] Add VPR and OpenFPGA architecture description which is binded to skywater 130nm sclib
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2020-10-09 14:33:42 -06:00 |
Laboratory for Nano Integrated Systems (LNIS)
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e999a847b4
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Initial commit
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2020-10-09 14:16:36 -06:00 |