diff --git a/ARCH/vpr_arch/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml b/ARCH/vpr_arch/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
index d6e1a2f..1496f32 100644
--- a/ARCH/vpr_arch/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
+++ b/ARCH/vpr_arch/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
@@ -135,18 +135,19 @@
       <output name="regout" num_pins="1"/>
       <output name="scout" num_pins="1"/>
       <clock name="clk" num_pins="1"/>
-      <fc in_type="frac" in_val="0.15" out_type="frac" out_val="0.10">
+      <fc in_type="frac" in_val="0.2" out_type="frac" out_val="0.10">
         <fc_override port_name="regin" fc_type="frac" fc_val="0"/>
         <fc_override port_name="regout" fc_type="frac" fc_val="0"/>
         <fc_override port_name="scin" fc_type="frac" fc_val="0"/>
         <fc_override port_name="scout" fc_type="frac" fc_val="0"/>
+        <fc_override port_name="clk" fc_type="frac" fc_val="0"/>
       </fc>
       <!--pinlocations pattern="spread"/-->
       <pinlocations pattern="custom">
-        <loc side="left"></loc>
+        <loc side="left">clb.clk</loc>
         <loc side="top">clb.regin clb.scin clb.O[7:0] clb.I0 clb.I0i clb.I1 clb.I1i clb.I2 clb.I2i clb.I3 clb.I3i </loc>
         <loc side="right">clb.O[15:8] clb.I4 clb.I4i clb.I5 clb.I5i clb.I6 clb.I6i clb.I7 clb.I7i</loc>
-        <loc side="bottom">clb.regout clb.scout clb.clk</loc>
+        <loc side="bottom">clb.regout clb.scout</loc>
       </pinlocations>
     </tile>
   </tiles>