diff --git a/HDL/common/caravel_wrapper_pin_assignment_v1.0.json b/HDL/common/caravel_wrapper_pin_assignment_v1.0.json
index 24be77f..c8451d6 100644
--- a/HDL/common/caravel_wrapper_pin_assignment_v1.0.json
+++ b/HDL/common/caravel_wrapper_pin_assignment_v1.0.json
@@ -5,8 +5,8 @@
   "caravel_logic_analyzer_input_name": "la_data_in",
   "caravel_logic_analyzer_output_name": "la_data_out",
   "caravel_logic_analyzer_direction_name": "la_oen",
-  "caravel_wishbone_clock_input_name": "wbs_clk_i",
-  "caravel_wishbone_reset_input_name": "wbs_rst_i",
+  "caravel_wishbone_clock_input_name": "wb_clk_i",
+  "caravel_wishbone_reset_input_name": "wb_rst_i",
   "caravel_wishbone_ack_output_name": "wbs_ack_o",
   "caravel_wishbone_cyc_input_name": "wbs_cyc_i",
   "caravel_wishbone_stb_input_name": "wbs_stb_i",
diff --git a/HDL/common/caravel_wrapper_pin_assignment_v1.1.json b/HDL/common/caravel_wrapper_pin_assignment_v1.1.json
index bec2e01..8100de6 100644
--- a/HDL/common/caravel_wrapper_pin_assignment_v1.1.json
+++ b/HDL/common/caravel_wrapper_pin_assignment_v1.1.json
@@ -5,8 +5,8 @@
   "caravel_logic_analyzer_input_name": "la_data_in",
   "caravel_logic_analyzer_output_name": "la_data_out",
   "caravel_logic_analyzer_direction_name": "la_oen",
-  "caravel_wishbone_clock_input_name": "wbs_clk_i",
-  "caravel_wishbone_reset_input_name": "wbs_rst_i",
+  "caravel_wishbone_clock_input_name": "wb_clk_i",
+  "caravel_wishbone_reset_input_name": "wb_rst_i",
   "caravel_wishbone_ack_output_name": "wbs_ack_o",
   "caravel_wishbone_cyc_input_name": "wbs_cyc_i",
   "caravel_wishbone_stb_input_name": "wbs_stb_i",