From efe404e62bc351253705b1f455bae4ab478fc8f3 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Wed, 16 Dec 2020 16:09:06 -0700 Subject: [PATCH] [Testbench] Remove unnecessary RTL netlist from synthesis --- HDL/common/caravel_qlsofa_hd_rtl_include_netlists.v | 1 - 1 file changed, 1 deletion(-) diff --git a/HDL/common/caravel_qlsofa_hd_rtl_include_netlists.v b/HDL/common/caravel_qlsofa_hd_rtl_include_netlists.v index 5a2d741..074fab0 100644 --- a/HDL/common/caravel_qlsofa_hd_rtl_include_netlists.v +++ b/HDL/common/caravel_qlsofa_hd_rtl_include_netlists.v @@ -31,7 +31,6 @@ `include "/research/ece/lnis/USERS/tang/github/caravel/verilog/rtl/simple_por.v" `include "/research/ece/lnis/USERS/tang/github/caravel/verilog/rtl/sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v" `include "/research/ece/lnis/USERS/tang/github/caravel/verilog/rtl/storage.v" -`include "/research/ece/lnis/USERS/tang/github/caravel/verilog/rtl/user_proj_example.v" `include "/research/ece/lnis/USERS/tang/github/caravel/verilog/rtl/sram_1rw1r_32_256_8_sky130.v" `include "/research/ece/lnis/USERS/tang/github/caravel/verilog/rtl/DFFRAM.v" `include "/research/ece/lnis/USERS/tang/github/caravel/verilog/rtl/DFFRAMBB.v"