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[Doc] Add I/O cell truth table

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tangxifan 2020-11-17 21:12:08 -07:00
parent 2b0c5c67e9
commit ed98aa27a8
1 changed files with 6 additions and 1 deletions
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7
DOC/source/arch/io_resource.rst
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@ -83,6 +83,12 @@ As shown in :numref:`fig_embedded_io_schematic`, the I/O circuit used in the I/O
- An internal configurable memory element to control the direction of I/O cell
The truth table of the I/O cell is consistent with the GPIO cell of Caravel SoC, where
- When configuration bit (FF output) is logic ``1``, the I/O cell is in input mode
- When configuration bit (FF output) is logic ``0``, the I/O cell is in output mode
.. _fig_embedded_io_schematic:
.. figure:: ./figures/embedded_io_schematic.png
@ -90,4 +96,3 @@ As shown in :numref:`fig_embedded_io_schematic`, the I/O circuit used in the I/O
:alt: Schematic of embedded I/O cell used in FPGA
Schematic of embedded I/O cell used in FPGA