mirror of https://github.com/lnis-uofu/SOFA.git
[HDL] Bug fix due to custom cell name changing
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@ -3,7 +3,7 @@
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// type: scs8hd_muxinv8_1
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`timescale 1ns/10ps
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`celldefine
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module scs8hd_muxinv2_1 (Z, Q1, Q2, S0, S0B, S1, S1B);
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module sky130_uuopenfpga_cc_hd_invmux2_1 (Z, Q1, Q2, S0, S0B, S1, S1B);
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output Z;
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input Q1, Q2, S0, S0B, S1, S1B;
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@ -36,7 +36,7 @@ endmodule
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// type: scs8hd_muxinv8_1
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`timescale 1ns/10ps
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`celldefine
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module scs8hd_muxinv3_1 (Z, Q1, Q2, Q3, S0, S0B, S1, S1B, S2, S2B);
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module sky130_uuopenfpga_cc_hd_invmux3_1 (Z, Q1, Q2, Q3, S0, S0B, S1, S1B, S2, S2B);
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output Z;
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input Q1, Q2, Q3, S0, S0B, S1, S1B, S2, S2B;
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