diff --git a/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdhd_cc_openfpga.xml b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdhd_cc_openfpga.xml
new file mode 100644
index 0000000..e6d1b24
--- /dev/null
+++ b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdhd_cc_openfpga.xml
@@ -0,0 +1,270 @@
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diff --git a/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdhs_cc_openfpga.xml b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdhs_cc_openfpga.xml
new file mode 100644
index 0000000..9880c7a
--- /dev/null
+++ b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdhs_cc_openfpga.xml
@@ -0,0 +1,270 @@
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diff --git a/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdhvl_cc_openfpga.xml b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdhvl_cc_openfpga.xml
new file mode 100644
index 0000000..a5efd99
--- /dev/null
+++ b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdhvl_cc_openfpga.xml
@@ -0,0 +1,270 @@
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diff --git a/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdls_cc_openfpga.xml b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdls_cc_openfpga.xml
new file mode 100644
index 0000000..1ebbe06
--- /dev/null
+++ b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdls_cc_openfpga.xml
@@ -0,0 +1,270 @@
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diff --git a/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdms_cc_openfpga.xml b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdms_cc_openfpga.xml
new file mode 100644
index 0000000..1bbf6d7
--- /dev/null
+++ b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_fdms_cc_openfpga.xml
@@ -0,0 +1,270 @@
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diff --git a/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_ndafdms_cc_openfpga.xml b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_ndafdms_cc_openfpga.xml
new file mode 100644
index 0000000..a47ab93
--- /dev/null
+++ b/ARCH/openfpga_arch_template/k4_frac_N8_adder_register_scan_chain_skywater130nm_ndafdms_cc_openfpga.xml
@@ -0,0 +1,269 @@
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+ 10e-12
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+ 10e-12
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+ 10e-12
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+ 10e-12
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+ 10e-12 5e-12
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diff --git a/ARCH/openfpga_arch_template/k4_frac_N8_register_scan_chain_skywater130nm_fdhd_cc_openfpga.xml b/ARCH/openfpga_arch_template/k4_frac_N8_register_scan_chain_skywater130nm_fdhd_cc_openfpga.xml
new file mode 100644
index 0000000..ae31d83
--- /dev/null
+++ b/ARCH/openfpga_arch_template/k4_frac_N8_register_scan_chain_skywater130nm_fdhd_cc_openfpga.xml
@@ -0,0 +1,255 @@
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+ 10e-12
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+ 10e-12
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+ 10e-12
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+ 10e-12
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+ 10e-12
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+ 10e-12
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+ 10e-12
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+ 10e-12
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+ 10e-12 5e-12
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+ 10e-12 5e-12
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diff --git a/README.md b/README.md
index a0870a8..0d1671b 100644
--- a/README.md
+++ b/README.md
@@ -1,10 +1,5 @@
-# SOFA
-[](https://github.com/LNIS-Projects/skywater-openfpga/actions)
-[](https://skywater-openfpga.readthedocs.io/en/latest/?badge=latest)
-
-## Introduction
-
-SOFA (**S**kywater **O**pensource **F**PG**A**s) are a series of open-source FPGA IPs using the open-source [Skywater 130nm PDK](https://github.com/google/skywater-pdk) and [OpenFPGA](https://github.com/lnis-uofu/OpenFPGA) framework
+# skywater-openfpga
+FPGA tape-outs using the open-source Skywater 130nm PDK and OpenFPGA
## Quick Start
@@ -13,14 +8,13 @@ SOFA (**S**kywater **O**pensource **F**PG**A**s) are a series of open-source FPG
git clone https://github.com/LNIS-Projects/skywater-openfpga.git
python3 SCRIPT/repo_setup.py --openfpga_root_path ${OPENFPGA_PROJECT_DIRECTORY}
```
----
-* If you have openfpga repository cloned at the same level of this project, you can simple call
+* If you have openfpga repository cloned in the level of this project, you can simple call
```bash
python3 SCRIPT/repo_setup.py
```
-Otherwise, you should provide full path using the option _--openfpga\_root\_path_
+Otherwise, you should provide full path for the --openfpga\root\_path
## Directory Organization
@@ -37,9 +31,7 @@ Otherwise, you should provide full path using the option _--openfpga\_root\_path
Keep a README inside the folder about the ICC2 version and how-to-use.
- **MSIM**: workspace of verification using Mentor ModelSim
----
-
* Note:
- Please **ONLY** place folders under this directory.
README should be the **ONLY** file under this directory
- - Each EDA tool should have **independent** workspace in separated directories.
+ - Each EDA tool should have **independent** workspace in separated directories