diff --git a/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/and2_latch_post_pnr_autocheck_top_tb.v b/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/and2_latch_post_pnr_autocheck_top_tb.v
index 8ff6c4e..2a059ad 100644
--- a/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/and2_latch_post_pnr_autocheck_top_tb.v
+++ b/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/and2_latch_post_pnr_autocheck_top_tb.v
@@ -3,7 +3,7 @@
 //	Description: FPGA Verilog Testbench for Top-level netlist of Design: and2_latch
 //	Author: Xifan TANG
 //	Organization: University of Utah
-//	Date: Tue Nov 17 15:03:02 2020
+//	Date: Tue Nov 17 19:54:57 2020
 //-------------------------------------------
 //----- Time scale -----
 `timescale 1ns / 1ps
@@ -12,14 +12,15 @@ module and2_latch_autocheck_top_tb;
 // ----- Local wires for global ports of FPGA fabric -----
 wire [0:0] prog_clk;
 wire [0:0] Test_en;
+wire [0:0] IO_ISOL_N;
 wire [0:0] clk;
 
 // ----- Local wires for I/Os of FPGA fabric -----
 
-wire [0:143] gfpga_pad_EMBEDDED_IO_SOC_IN;
+wire [0:143] gfpga_pad_EMBEDDED_IO_HD_SOC_IN;
 
-wire [0:143] gfpga_pad_EMBEDDED_IO_SOC_OUT;
-wire [0:143] gfpga_pad_EMBEDDED_IO_SOC_DIR;
+wire [0:143] gfpga_pad_EMBEDDED_IO_HD_SOC_OUT;
+wire [0:143] gfpga_pad_EMBEDDED_IO_HD_SOC_DIR;
 
 reg [0:0] config_done;
 wire [0:0] prog_clock;
@@ -141,321 +142,325 @@ initial
 	assign prog_clk[0] = prog_clock[0];
 	assign clk[0] = op_clock[0];
 	assign Test_en[0] = 1'b0;
+	assign IO_ISOL_N[0] = 1'b1;
 	assign sc_head[0] = 1'b0;
 // ----- End connecting global ports of FPGA fabric to stimuli -----
 // ----- FPGA top-level module to be capsulated -----
 	fpga_core FPGA_DUT (
 		.prog_clk(prog_clk[0]),
 		.Test_en(Test_en[0]),
+		.IO_ISOL_N(IO_ISOL_N[0]),
 		.clk(clk[0]),
-		.gfpga_pad_EMBEDDED_IO_SOC_IN(gfpga_pad_EMBEDDED_IO_SOC_IN[0:143]),
-		.gfpga_pad_EMBEDDED_IO_SOC_OUT(gfpga_pad_EMBEDDED_IO_SOC_OUT[0:143]),
-		.gfpga_pad_EMBEDDED_IO_SOC_DIR(gfpga_pad_EMBEDDED_IO_SOC_DIR[0:143]),
+		.gfpga_pad_EMBEDDED_IO_HD_SOC_IN(gfpga_pad_EMBEDDED_IO_HD_SOC_IN[0:143]),
+		.gfpga_pad_EMBEDDED_IO_HD_SOC_OUT(gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[0:143]),
+		.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR(gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[0:143]),
+		.ccff_head(ccff_head[0]),
+		.ccff_tail(ccff_tail[0]),
 		.sc_head(sc_head[0]),
 		.sc_tail(sc_tail[0])
         );
 
 // ----- Link BLIF Benchmark I/Os to FPGA I/Os -----
-// ----- Blif Benchmark input a is mapped to FPGA IOPAD gfpga_pad_EMBEDDED_IO_SOC_IN[11] -----
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[11] = a[0];
+// ----- Blif Benchmark input a is mapped to FPGA IOPAD gfpga_pad_EMBEDDED_IO_HD_SOC_IN[11] -----
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[11] = a[0];
 
-// ----- Blif Benchmark input b is mapped to FPGA IOPAD gfpga_pad_EMBEDDED_IO_SOC_IN[12] -----
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[12] = b[0];
+// ----- Blif Benchmark input b is mapped to FPGA IOPAD gfpga_pad_EMBEDDED_IO_HD_SOC_IN[12] -----
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[12] = b[0];
 
-// ----- Blif Benchmark input clk is mapped to FPGA IOPAD gfpga_pad_EMBEDDED_IO_SOC_IN[42] -----
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[42] = clk[0];
+// ----- Blif Benchmark input clk is mapped to FPGA IOPAD gfpga_pad_EMBEDDED_IO_HD_SOC_IN[42] -----
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[42] = clk[0];
 
-// ----- Blif Benchmark output out_c is mapped to FPGA IOPAD gfpga_pad_EMBEDDED_IO_SOC_OUT[13] -----
-	assign out_c_fpga[0] = gfpga_pad_EMBEDDED_IO_SOC_OUT[13];
+// ----- Blif Benchmark output out_c is mapped to FPGA IOPAD gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[13] -----
+	assign out_c_fpga[0] = gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[13];
 
-// ----- Blif Benchmark output out_d is mapped to FPGA IOPAD gfpga_pad_EMBEDDED_IO_SOC_OUT[10] -----
-	assign out_d_fpga[0] = gfpga_pad_EMBEDDED_IO_SOC_OUT[10];
+// ----- Blif Benchmark output out_d is mapped to FPGA IOPAD gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[10] -----
+	assign out_d_fpga[0] = gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[10];
 
 // ----- Wire unused FPGA I/Os to constants -----
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[0] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[1] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[2] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[3] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[4] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[5] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[6] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[7] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[8] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[9] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[10] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[13] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[14] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[15] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[16] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[17] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[18] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[19] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[20] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[21] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[22] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[23] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[24] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[25] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[26] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[27] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[28] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[29] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[30] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[31] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[32] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[33] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[34] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[35] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[36] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[37] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[38] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[39] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[40] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[41] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[43] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[44] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[45] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[46] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[47] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[48] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[49] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[50] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[51] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[52] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[53] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[54] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[55] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[56] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[57] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[58] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[59] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[60] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[61] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[62] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[63] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[64] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[65] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[66] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[67] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[68] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[69] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[70] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[71] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[72] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[73] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[74] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[75] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[76] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[77] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[78] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[79] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[80] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[81] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[82] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[83] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[84] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[85] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[86] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[87] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[88] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[89] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[90] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[91] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[92] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[93] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[94] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[95] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[96] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[97] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[98] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[99] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[100] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[101] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[102] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[103] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[104] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[105] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[106] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[107] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[108] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[109] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[110] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[111] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[112] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[113] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[114] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[115] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[116] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[117] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[118] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[119] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[120] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[121] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[122] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[123] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[124] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[125] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[126] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[127] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[128] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[129] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[130] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[131] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[132] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[133] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[134] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[135] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[136] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[137] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[138] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[139] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[140] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[141] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[142] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_IN[143] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[0] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[1] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[2] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[3] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[4] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[5] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[6] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[7] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[8] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[9] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[10] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[13] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[14] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[15] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[16] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[17] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[18] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[19] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[20] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[21] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[22] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[23] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[24] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[25] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[26] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[27] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[28] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[29] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[30] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[31] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[32] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[33] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[34] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[35] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[36] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[37] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[38] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[39] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[40] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[41] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[43] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[44] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[45] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[46] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[47] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[48] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[49] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[50] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[51] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[52] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[53] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[54] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[55] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[56] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[57] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[58] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[59] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[60] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[61] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[62] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[63] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[64] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[65] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[66] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[67] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[68] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[69] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[70] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[71] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[72] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[73] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[74] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[75] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[76] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[77] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[78] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[79] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[80] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[81] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[82] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[83] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[84] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[85] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[86] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[87] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[88] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[89] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[90] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[91] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[92] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[93] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[94] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[95] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[96] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[97] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[98] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[99] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[100] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[101] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[102] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[103] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[104] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[105] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[106] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[107] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[108] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[109] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[110] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[111] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[112] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[113] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[114] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[115] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[116] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[117] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[118] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[119] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[120] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[121] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[122] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[123] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[124] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[125] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[126] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[127] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[128] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[129] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[130] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[131] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[132] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[133] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[134] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[135] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[136] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[137] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[138] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[139] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[140] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[141] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[142] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_IN[143] = 1'b0;
 
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[0] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[1] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[2] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[3] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[4] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[5] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[6] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[7] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[8] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[9] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[11] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[12] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[14] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[15] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[16] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[17] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[18] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[19] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[20] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[21] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[22] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[23] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[24] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[25] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[26] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[27] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[28] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[29] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[30] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[31] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[32] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[33] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[34] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[35] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[36] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[37] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[38] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[39] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[40] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[41] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[42] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[43] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[44] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[45] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[46] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[47] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[48] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[49] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[50] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[51] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[52] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[53] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[54] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[55] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[56] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[57] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[58] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[59] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[60] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[61] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[62] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[63] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[64] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[65] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[66] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[67] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[68] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[69] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[70] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[71] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[72] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[73] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[74] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[75] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[76] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[77] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[78] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[79] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[80] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[81] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[82] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[83] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[84] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[85] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[86] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[87] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[88] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[89] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[90] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[91] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[92] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[93] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[94] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[95] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[96] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[97] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[98] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[99] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[100] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[101] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[102] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[103] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[104] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[105] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[106] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[107] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[108] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[109] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[110] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[111] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[112] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[113] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[114] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[115] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[116] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[117] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[118] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[119] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[120] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[121] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[122] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[123] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[124] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[125] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[126] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[127] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[128] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[129] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[130] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[131] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[132] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[133] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[134] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[135] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[136] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[137] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[138] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[139] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[140] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[141] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[142] = 1'b0;
-	assign gfpga_pad_EMBEDDED_IO_SOC_OUT[143] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[0] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[1] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[2] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[3] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[4] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[5] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[6] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[7] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[8] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[9] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[11] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[12] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[14] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[15] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[16] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[17] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[18] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[19] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[20] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[21] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[22] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[23] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[24] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[25] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[26] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[27] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[28] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[29] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[30] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[31] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[32] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[33] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[34] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[35] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[36] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[37] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[38] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[39] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[40] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[41] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[42] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[43] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[44] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[45] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[46] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[47] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[48] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[49] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[50] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[51] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[52] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[53] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[54] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[55] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[56] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[57] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[58] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[59] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[60] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[61] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[62] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[63] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[64] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[65] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[66] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[67] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[68] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[69] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[70] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[71] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[72] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[73] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[74] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[75] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[76] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[77] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[78] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[79] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[80] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[81] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[82] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[83] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[84] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[85] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[86] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[87] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[88] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[89] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[90] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[91] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[92] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[93] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[94] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[95] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[96] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[97] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[98] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[99] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[100] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[101] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[102] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[103] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[104] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[105] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[106] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[107] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[108] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[109] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[110] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[111] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[112] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[113] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[114] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[115] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[116] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[117] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[118] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[119] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[120] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[121] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[122] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[123] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[124] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[125] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[126] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[127] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[128] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[129] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[130] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[131] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[132] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[133] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[134] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[135] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[136] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[137] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[138] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[139] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[140] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[141] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[142] = 1'b0;
+	assign gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[143] = 1'b0;
 
 `ifdef AUTOCHECKED_SIMULATION
 // ----- Reference Benchmark Instanication -------
diff --git a/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/and2_latch_post_pnr_include_netlists.v b/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/and2_latch_post_pnr_include_netlists.v
index 6f55c69..4ad7663 100644
--- a/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/and2_latch_post_pnr_include_netlists.v
+++ b/TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/and2_latch_post_pnr_include_netlists.v
@@ -55,10 +55,13 @@
 `include "/research/ece/lnis/USERS/tang/github/skywater-openfpga/PDK/skywater-pdk/libraries/sky130_fd_sc_hd/latest/cells/buf/sky130_fd_sc_hd__buf_1.v"
 `include "/research/ece/lnis/USERS/tang/github/skywater-openfpga/PDK/skywater-pdk/libraries/sky130_fd_sc_hd/latest/cells/buf/sky130_fd_sc_hd__buf_16.v"
 `include "/research/ece/lnis/USERS/tang/github/skywater-openfpga/PDK/skywater-pdk/libraries/sky130_fd_sc_hd/latest/cells/bufbuf/sky130_fd_sc_hd__bufbuf_16.v"
+`include "/research/ece/lnis/USERS/tang/github/skywater-openfpga/PDK/skywater-pdk/libraries/sky130_fd_sc_hd/latest/cells/bufbuf/sky130_fd_sc_hd__bufbuf_8.v"
+`include "/research/ece/lnis/USERS/tang/github/skywater-openfpga/PDK/skywater-pdk/libraries/sky130_fd_sc_hd/latest/cells/nor2b/sky130_fd_sc_hd__nor2b_1.v"
+`include "/research/ece/lnis/USERS/tang/github/skywater-openfpga/PDK/skywater-pdk/libraries/sky130_fd_sc_hd/latest/cells/and2/sky130_fd_sc_hd__and2_0.v"
 
 // ------ Include fabric top-level netlists -----
 //`include "/research/ece/lnis/USERS/tang/github/skywater-openfpga/FPGA1212_FC_HD_SKY_PNR/fpga_core/fpga_core_icv_in_design.pt.v"
-`include "/research/ece/lnis/USERS/DARPA_ERI/Tapeout/Nov2020_Skywater/FPGA1212_FLAT_HD_SKY_PNR/fpga_core/fpga_core_icv_in_design.pt.v"
+`include "/research/ece/lnis/USERS/DARPA_ERI/Tapeout/Nov2020_Skywater/FPGA1212_FLAT_HD_SKY_PNR/fpga_top/fpga_top_icv_in_design.pt.v"
 
 `ifdef AUTOCHECKED_SIMULATION
 	`include "and2_latch_output_verilog.v"