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[DRCFix] Fixed filler cell boundary SOFA CHD

This commit is contained in:
Ganesh Gore 2021-02-10 23:29:18 -07:00
parent 7309d3822c
commit a203d2aeee
3 changed files with 21 additions and 21 deletions
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FPGA1212_SOFA_CHD_PNR/fpga_top/fpga_top_icv_in_design.gds.gz
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FPGA1212_SOFA_CHD_PNR/fpga_top/fpga_top_icv_in_design.lvs.v
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@ -11332,18 +11332,6 @@ sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x570400y54400 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x625600y54400 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x680800y54400 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x0y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x55200y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_8 \xofiller!sky130_fd_sc_hd__decap_8!x110400y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_3 \xofiller!sky130_fd_sc_hd__decap_3!x147200y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_8 \xofiller!sky130_fd_sc_hd__decap_8!x202400y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1283 ( .A ( ropt_net_127 ) ,
.X ( chany_top_out[10] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1284 ( .A ( ropt_net_128 ) ,
@ -11400,10 +11388,22 @@ sky130_fd_sc_hd__buf_8 ropt_mt_inst_1309 ( .A ( ropt_net_153 ) ,
.X ( chany_top_out[23] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1310 ( .A ( ropt_net_154 ) ,
.X ( chany_top_out[19] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x303600y81600 (
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x680800y54400 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1312 ( .A ( ropt_net_156 ) ,
.X ( chany_top_out[20] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x0y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x55200y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_8 \xofiller!sky130_fd_sc_hd__decap_8!x110400y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_3 \xofiller!sky130_fd_sc_hd__decap_3!x147200y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_8 \xofiller!sky130_fd_sc_hd__decap_8!x202400y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x303600y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_8 \xofiller!sky130_fd_sc_hd__decap_8!x414000y81600 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_6 \xofiller!sky130_fd_sc_hd__decap_6!x515200y81600 (
@ -34832,12 +34832,12 @@ sky130_fd_sc_hd__conb_1 optlc_187 ( .LO ( SYNOPSYS_UNCONNECTED_134 ) ,
.HI ( optlc_net_181 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__conb_1 optlc_189 ( .LO ( SYNOPSYS_UNCONNECTED_135 ) ,
.HI ( optlc_net_182 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1398 ( .A ( ropt_net_206 ) ,
.X ( chany_bottom_out[18] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_6 \xofiller!sky130_fd_sc_hd__decap_6!x303600y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_6 \xofiller!sky130_fd_sc_hd__decap_6!x501400y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1398 ( .A ( ropt_net_206 ) ,
.X ( chany_bottom_out[18] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_3 \xofiller!sky130_fd_sc_hd__decap_3!x657800y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_3 \xofiller!sky130_fd_sc_hd__decap_3!x933800y0 (
@ -92445,10 +92445,10 @@ sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x639400y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_8 \xofiller!sky130_fd_sc_hd__decap_8!x694600y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1316 ( .A ( ropt_net_127 ) ,
.X ( chany_bottom_out[5] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x0y27200 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1316 ( .A ( ropt_net_127 ) ,
.X ( chany_bottom_out[5] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_4 \xofiller!sky130_fd_sc_hd__decap_4!x55200y27200 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x119600y27200 (
@ -107774,20 +107774,20 @@ sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x220800y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x276000y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1323 ( .A ( ropt_net_132 ) ,
.X ( chany_top_out[28] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x331200y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x386400y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1326 ( .A ( ropt_net_135 ) ,
.X ( chany_top_out[4] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x441600y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1323 ( .A ( ropt_net_132 ) ,
.X ( chany_top_out[28] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x496800y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x552000y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1326 ( .A ( ropt_net_135 ) ,
.X ( chany_top_out[4] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x607200y0 (
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
sky130_fd_sc_hd__decap_12 \xofiller!sky130_fd_sc_hd__decap_12!x662400y0 (

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FPGA1212_SOFA_CHD_PNR/fpga_top/fpga_top_icv_in_design.nominal_25.spef.gz
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