From 0cdd94139f596f299138c69be0183c28a7962316 Mon Sep 17 00:00:00 2001 From: Lalit Sharma Date: Wed, 3 Feb 2021 01:08:27 -0800 Subject: [PATCH 1/3] using default yosys script instead of custom script for multi_enc_decx2x4 design as custom script generated blif file is causing an assertion in openfpga. This is done temporarily to enable developers to checkin in SOFA, also requested Xifan to review this crash in openfpga. --- .../generate_testbench/config/task_template.conf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/SCRIPT/skywater_openfpga_task/k4_N8_reset_softadder_caravel_cc_fdhd_32x32/generate_testbench/config/task_template.conf b/SCRIPT/skywater_openfpga_task/k4_N8_reset_softadder_caravel_cc_fdhd_32x32/generate_testbench/config/task_template.conf index be53569..fce1c3d 100644 --- a/SCRIPT/skywater_openfpga_task/k4_N8_reset_softadder_caravel_cc_fdhd_32x32/generate_testbench/config/task_template.conf +++ b/SCRIPT/skywater_openfpga_task/k4_N8_reset_softadder_caravel_cc_fdhd_32x32/generate_testbench/config/task_template.conf @@ -89,7 +89,7 @@ bench14_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3 bench17_top = jpeg_qnr bench17_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys bench18_top = multi_enc_decx2x4 -bench18_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys +#bench18_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys #bench19_top = sdc_controller bench20_top = sha256 bench20_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys From 1e3490dc8da1802843e06afc58828f78e6e3feb1 Mon Sep 17 00:00:00 2001 From: Maciej Kurc Date: Mon, 1 Feb 2021 15:45:48 +0100 Subject: [PATCH 2/3] Added port relations to models and timing annotation to pb_types of the k4_N8 VPR architecture. Signed-off-by: Maciej Kurc --- ...n_chain_nonLR_caravel_io_skywater130nm.xml | 30 ++++++++++++++++--- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml b/ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml index 3bdd6bf..64c0f78 100644 --- a/ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml +++ b/ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml @@ -36,7 +36,7 @@ Authors: Xifan Tang - + @@ -45,9 +45,9 @@ Authors: Xifan Tang - - - + + + @@ -486,12 +486,34 @@ Authors: Xifan Tang + + + 261e-12 + 261e-12 + 261e-12 + 261e-12 + 261e-12 + 261e-12 + 261e-12 + 261e-12 + + + 261e-12 + 261e-12 + 261e-12 + 261e-12 + + + + + From a6db672595419e36e5985901498f6ff931241f65 Mon Sep 17 00:00:00 2001 From: Maciej Kurc Date: Tue, 2 Feb 2021 10:05:34 +0100 Subject: [PATCH 3/3] Fixed incorrect IREG pack-pattern Signed-off-by: Maciej Kurc --- ...er_register_scan_chain_nonLR_caravel_io_skywater130nm.xml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml b/ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml index 64c0f78..9a43261 100644 --- a/ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml +++ b/ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml @@ -415,9 +415,10 @@ Authors: Xifan Tang - + + + -