From 8c44532e4ec1b00ca738f98cdbfb124b36ad391b Mon Sep 17 00:00:00 2001 From: tangxifan Date: Sat, 28 Nov 2020 14:24:27 -0700 Subject: [PATCH] [Script] Add python script to run all the testbenches in a given repo --- MSIM/common/run_post_pnr_msim_task.py | 76 +++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 MSIM/common/run_post_pnr_msim_task.py diff --git a/MSIM/common/run_post_pnr_msim_task.py b/MSIM/common/run_post_pnr_msim_task.py new file mode 100644 index 0000000..951d8d6 --- /dev/null +++ b/MSIM/common/run_post_pnr_msim_task.py @@ -0,0 +1,76 @@ +##################################################################### +# Python script to run ModelSim simulations for all the post-pnr testbenches +# in a project directory +# This script will +# - Collect all the testbenches in a given directory +# For instance: +# ../k4_arch/pre_pnr/verilog_testbenches/and2_post_pnr_include_netlist.v +# - Use run_post_pnr_msim_test.py to run Modelsim simulations and check results +##################################################################### + +import os +from os.path import dirname, abspath +import shutil +import re +import argparse +import logging +import subprocess +import glob + +##################################################################### +# Initialize logger +##################################################################### +logging.basicConfig(format='%(levelname)s: %(message)s', level=logging.INFO) + +##################################################################### +# Parse the options +##################################################################### +parser = argparse.ArgumentParser(description='Run a ModelSim verification task for a tape-out FPGA') +parser.add_argument('--testbench_dir_name', required=True, + help='Specify the directory path for the Verilog testbenches') +parser.add_argument('--task_name', required=True, + help='Specify the directory path for the Verilog testbenches') +args = parser.parse_args() + +##################################################################### +# Walk through the parent directory and find all the pre-PnR testbenches +##################################################################### +logging.info("Finding testbenches..."); + +testbench_dir_abspath = abspath(args.testbench_dir_name) + "/postpnr/verilog_testbench"; + +testbench_files = [] +for globbed_file in glob.glob(testbench_dir_abspath + "/*_include_netlists.v"): + testbench_files.append(globbed_file) + +logging.info("Found " + str(len(testbench_files)) + " testbenches") + +##################################################################### +# Try to create the directory of Modelsim projects +##################################################################### +parent_dir_abspath = dirname(dirname(abspath(__file__))) +msim_task_dir_abspath = abspath(parent_dir_abspath + args.task_name) + "/postpnr/verilog_testbench"; +os.makedirs(msim_task_dir_abspath, exist_ok=True) + +##################################################################### +# Run ModelSim simulations for each testbench +##################################################################### +logging.info("Running Modelsim simulations..."); + +num_sim_finished = 0 + +msim_testrun_script_abspath = os.path.abspath(__file__) +msim_testrun_script_abspath = re.sub(os.path.basename(msim_testrun_script_abspath), "run_post_pnr_msim_test.py", msim_testrun_script_abspath) + +for testbench_file in testbench_files: + # Find testbench name + testbench_name = re.findall("(\w+)_include_netlists.v", os.path.basename(testbench_file))[0] + cmd = "python3 " + msim_testrun_script_abspath \ + + " --verilog_testbench " + testbench_file \ + + " --project_path " + msim_task_dir_abspath + "/" + testbench_name \ + + " --testbench_name " + testbench_name + subprocess.run(cmd, shell=True, check=True) + num_sim_finished += 1 + +logging.info("Done") +logging.info("Finish " + str(num_sim_finished) + " ModelSim simulations")