diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml new file mode 100644 index 0000000..3fc3bad --- /dev/null +++ b/.github/workflows/build.yml @@ -0,0 +1,90 @@ +name: linux_build + +# Run CI on +# - each push +# - each pull request +# - scheduled weekly +on: + push: + pull_request: + schedule: + - cron: '0 0 * * 0 ' # weekly + +# Environment variables +env: + # Customize the CMake build type here (Release, Debug, RelWithDebInfo, etc.) + BUILD_TYPE: Release + MAKEFLAGS: "-j8" + +# Multiple job to tests +jobs: + # Test the compilation compatibility + linux_build: + name: ${{ matrix.config.name }} + runs-on: ${{ matrix.config.os }} + + # Branch on different OS and settings + strategy: + fail-fast: false + matrix: + config: + - { + name: "Quick Test: GCC-8 (Ubuntu 18.04)", + artifact: "OpenFPGA-basic-tests-ubuntu-18.04-gcc8-build.7z", + os: ubuntu-18.04, + cc: "gcc-8", cxx: "g++-8", + reg_script: "quick_test.sh" + } + + # Define the steps to run the build job + steps: + - name: Checkout Skywater-OpenFPGA repo + uses: actions/checkout@v2 + + - name: Checkout OpenFPGA repo + uses: actions/checkout@v2 + with: + repository: LNIS-Projects/OpenFPGA + path: OpenFPGA + + - name: Install dependency + run: source ./.github/workflows/install_dependency.sh + + - name: Checkout CMake version + run: cmake --version + + - name: Checkout iVerilog version + run: | + iverilog -V + vvp -V + + - name: Create CMake build environment + # Some projects don't allow in-source building, so create a separate build directory + # We'll use this as our working directory for all subsequent commands + run: cmake -E make_directory ${{runner.workspace}}/OpenFPGA/build + + - name: Configure CMake + # Use a bash shell so we can use the same syntax for environment variable + # access regardless of the host operating system + shell: bash + working-directory: ${{runner.workspace}}/OpenFPGA/build + # Note the current convention is to use the -S and -B options here to specify source + # and build directories, but this is only available with CMake 3.13 and higher. + # The CMake binaries on the Github Actions machines are (as of this writing) 3.12 + run: | + export CC=${{ matrix.config.cc }} + export CXX=${{ matrix.config.cxx }} + cmake $GITHUB_WORKSPACE/OpenFPGA -DCMAKE_BUILD_TYPE=$BUILD_TYPE + + - name: Build + working-directory: ${{runner.workspace}}/OpenFPGA/build + shell: bash + # Execute the build. You can specify a specific target with "--target " + run: | + cmake --build . --config $BUILD_TYPE + + - name: ${{matrix.config.name}} + if: contains(matrix.config.name, 'Quick Test') + shell: bash + # Execute the test. + run: source ./.github/workflows/${{matrix.config.reg_script}} diff --git a/.github/workflows/install_dependency.sh b/.github/workflows/install_dependency.sh new file mode 100644 index 0000000..0e663ef --- /dev/null +++ b/.github/workflows/install_dependency.sh @@ -0,0 +1,48 @@ +# Install all the dependency for OpenFPGA in Ubuntu-18.04 +sudo apt-get update +sudo apt-get install autoconf +sudo apt-get install automake +sudo apt-get install bash +sudo apt-get install bison +sudo apt-get install build-essential +sudo apt-get install cmake +sudo apt-get install ccache +sudo apt-get install ctags +sudo apt-get install curl +sudo apt-get install doxygen +sudo apt-get install flex +sudo apt-get install fontconfig +sudo apt-get install gdb +sudo apt-get install git +sudo apt-get install gperf +sudo apt-get install iverilog +sudo apt-get install libcairo2-dev +sudo apt-get install libevent-dev +sudo apt-get install libfontconfig1-dev +sudo apt-get install liblist-moreutils-perl +sudo apt-get install libncurses5-dev +sudo apt-get install libx11-dev +sudo apt-get install libxft-dev +sudo apt-get install libxml++2.6-dev +sudo apt-get install perl +sudo apt-get install python +sudo apt-get install python-lxml +sudo apt-get install texinfo +sudo apt-get install time +sudo apt-get install valgrind +sudo apt-get install zip +sudo apt-get install qt5-default +sudo apt-get install clang-format-7 +# Add all the supported compilers +sudo apt-get install g++-5 +sudo apt-get install gcc-5 +sudo apt-get install g++-6 +sudo apt-get install gcc-6 +sudo apt-get install g++-7 +sudo apt-get install gcc-7 +sudo apt-get install g++-8 +sudo apt-get install gcc-8 +sudo apt-get install g++-9 +sudo apt-get install gcc-9 +sudo apt-get install clang-6.0 +sudo apt-get install clang-8 diff --git a/.github/workflows/quick_test.sh b/.github/workflows/quick_test.sh new file mode 100755 index 0000000..3927dcc --- /dev/null +++ b/.github/workflows/quick_test.sh @@ -0,0 +1,20 @@ +#!/bin/bash + +set -e + +############################################### +# OpenFPGA Shell with VPR8 +############################################## + +############################################## +# Initialize the repository +# - Generate final version of architecture files +# - Run FPGA tasks to validate netlist generations +python3 SCRIPT/repo_setup.py --openfpga_root_path ./OpenFPGA + +############################################## +# Generate post-PnR testbenches +python3 TESTBENCH/common/generate_post_pnr_testbenches.py --pre_pnr_testbench_dir_name ./TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc --pin_assignment_file ./HDL/common/caravel_wrapper_pin_assignment_v1.0.json +python3 TESTBENCH/common/generate_post_pnr_testbenches.py --pre_pnr_testbench_dir_name ./TESTBENCH/k4_N8_reset_caravel_io_FPGA_12x12_fdhd_cc --pin_assignment_file ./HDL/common/caravel_wrapper_pin_assignment_v1.1.json +python3 TESTBENCH/common/generate_post_pnr_testbenches.py --pre_pnr_testbench_dir_name ./TESTBENCH/k4_N8_softadder_caravel_io_FPGA_12x12_fdhd_cc --pin_assignment_file ./HDL/common/caravel_wrapper_pin_assignment_v1.0.json +python3 TESTBENCH/common/generate_post_pnr_testbenches.py --pre_pnr_testbench_dir_name ./TESTBENCH/k4_N8_reset_softadder_caravel_io_FPGA_12x12_fdhd_cc --pin_assignment_file ./HDL/common/caravel_wrapper_pin_assignment_v1.1.json diff --git a/README.md b/README.md index f2de4f1..b7a4b0a 100644 --- a/README.md +++ b/README.md @@ -1,4 +1,9 @@ -# skywater-openfpga +# Skywater + OpenFPGA: Open-Source FPGAs +[![linux_build](https://github.com/LNIS-Projects/skywater-openfpga/workflows/linux_build/badge.svg)](https://github.com/LNIS-Projects/skywater-openfpga/actions) +[![Documentation Status](https://readthedocs.org/projects/skywater-openfpga/badge/?version=latest)](https://skywater-openfpga.readthedocs.io/en/latest/?badge=latest) + +## Introduction + FPGA tape-outs using the open-source Skywater 130nm PDK and OpenFPGA ## Quick Start diff --git a/TESTBENCH/common/generate_post_pnr_testbenches.py b/TESTBENCH/common/generate_post_pnr_testbenches.py index 962cdef..51c06f7 100644 --- a/TESTBENCH/common/generate_post_pnr_testbenches.py +++ b/TESTBENCH/common/generate_post_pnr_testbenches.py @@ -40,6 +40,7 @@ args = parser.parse_args() ##################################################################### logging.info("Finding pre-PnR testbenches..."); +script_base_dir_abspath = dirname(os.path.abspath(__file__)) pre_pnr_testbench_dir_abspath = abspath(args.pre_pnr_testbench_dir_name) + "/prepnr/verilog_testbench"; # Count how many testbenches have been converted @@ -69,7 +70,7 @@ for curr_pre_pnr_testbench_file in pre_pnr_testbench_files: logging.info("Processing " + curr_pre_pnr_testbench_file + " testbench:") curr_post_pnr_testbench_file = re.sub("_autocheck_top_tb.v$", "_post_pnr_autocheck_top_tb.v", curr_pre_pnr_testbench_file) curr_post_pnr_testbench_file = re.sub("\/prepnr\/", "\/postpnr\/", curr_post_pnr_testbench_file) - cmd = "python3 ./post_pnr_testbench_converter.py " \ + cmd = "python3 " + script_base_dir_abspath + "/post_pnr_testbench_converter.py " \ + " --pre_pnr_testbench " + curr_pre_pnr_testbench_file \ + " --post_pnr_testbench " + curr_post_pnr_testbench_file subprocess.run(cmd, shell=True, check=True) @@ -87,7 +88,7 @@ for curr_pre_pnr_testbench_file in pre_pnr_testbench_files: curr_post_pnr_testbench_file = re.sub("\/prepnr\/", "\/postpnr\/", curr_post_pnr_testbench_file) curr_wrapper_testbench_file = re.sub("_autocheck_top_tb.v$", "_wrapper_autocheck_top_tb.v", curr_post_pnr_testbench_file) logging.info("Processing " + curr_post_pnr_testbench_file + " testbench:") - cmd = "python3 ./post_pnr_wrapper_testbench_converter.py " \ + cmd = "python3 " + script_base_dir_abspath + "/post_pnr_wrapper_testbench_converter.py " \ + " --post_pnr_testbench " + curr_post_pnr_testbench_file \ + " --pin_assignment_file " + args.pin_assignment_file \ + " --wrapper_testbench " + curr_wrapper_testbench_file