mirror of https://github.com/lnis-uofu/SOFA.git
[Script] Add missing QL synthesis arguments
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@ -23,6 +23,8 @@ openfpga_vpr_device_layout=32x32
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openfpga_vpr_route_chan_width=60
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openfpga_sdc_output_dir=${SKYWATER_OPENFPGA_HOME}/SDC/k4_N8_reset_softadder_caravel_io_FPGA_32x32_fdhd_cc
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external_fabric_key_file=${SKYWATER_OPENFPGA_HOME}/ARCH/fabric_key/fabric_key_32x32.xml
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# Yosys parameters
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yosys_args = -no_adder -family qlf_k4n8 -no_ff_map
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[ARCHITECTURES]
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arch0=${SKYWATER_OPENFPGA_HOME}/ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
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@ -24,6 +24,8 @@ openfpga_vpr_route_chan_width=60
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openfpga_verilog_output_dir=${SKYWATER_OPENFPGA_HOME}/TESTBENCH/k4_N8_reset_softadder_caravel_io_FPGA_32x32_fdhd_cc/prepnr
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openfpga_fabric_verilog_netlist=${SKYWATER_OPENFPGA_HOME}/HDL/k4_N8_reset_softadder_caravel_io_FPGA_32x32_fdhd_cc/SRC/fabric_netlists.v
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external_fabric_key_file=${SKYWATER_OPENFPGA_HOME}/ARCH/fabric_key/fabric_key_32x32.xml
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# Yosys parameters
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yosys_args = -no_adder -family qlf_k4n8 -no_ff_map
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[ARCHITECTURES]
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arch0=${SKYWATER_OPENFPGA_HOME}/ARCH/vpr_arch/k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
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