diff --git a/.github/buildactionScripts.sh b/.github/buildactionScripts.sh deleted file mode 100755 index d2dcf52..0000000 --- a/.github/buildactionScripts.sh +++ /dev/null @@ -1,20 +0,0 @@ -#!/bin/bash - -SCAN_SOFA_HD_KEY="FPGA1212_SOFA_HD_PNR" -SCAN_QLSOFA_HD_KEY="FPGA1212_QLSOFA_HD_PNR" -SCAN_SOFA_CHD_KEY="FPGA1212_SOFA_CHD_PNR" -SCAN_QLAP3_KEY="FPGA1212_QLAP3_PNR" - -# TODO: Strip comments while reading using yq -# TODO: Add SOFA_CHD and QLAP3 for later -for repo in SOFA_HD ; do - ScanDir=$(eval "echo \$SCAN_${repo}_KEY") - action_filename=$(echo "$repo" | awk '{print tolower($0)}') - repo_name=$(echo "$repo" | sed "s/_/-/") - echo $ScanDir $action_filename $repo_name - cat deploy_sofa.yaml | \ - sed -e "s/SOFA_HD/${repo}/" \ - -e "s/SOFA-HD/${repo_name}/" \ - -e "s/FPGA1212_FLAT_HD_SKY_PNR/${ScanDir}/" | \ - yq r - -X > ./workflows/deploy_${action_filename}.yaml -done \ No newline at end of file diff --git a/.github/deploy_sofa.yaml b/.github/deploy_sofa.yaml deleted file mode 100644 index 24fd8bc..0000000 --- a/.github/deploy_sofa.yaml +++ /dev/null @@ -1,90 +0,0 @@ -name: Caravel-SOFA_HD Deployment - -# = = = Env Variable = = = = = -# secrets.TEST_REPO_KEY -# secrets.SOFA_HD_KEY -# secrets.SOFA_CHD_KEY -# secrets.QLSOFA_HD_KEY -# secrets.QLAP3_KEY -# yq r -X deploy_sofa.yaml > ./workflows/deploy_sofa_hd.yaml - -env: - SCAN_DIRECTORY: &SCAN_DIRECTORY - 'FPGA1212_FLAT_HD_SKY_PNR/**' - PROJ_SUFFIX: &PROJ_SUFFIX - SOFA_HD - DEST_DIR: &DEST_DIR - Caravel-SOFA-HD - DEST_REPO: &DEST_REPO - lnis-uofu/Caravel-SOFA-HD - REPO_KEY: &REPO_KEY - ${{ secrets.SOFA_HD_KEY }} - CARAVEL_COMPARE_COMMIT: &CARAVEL_COMPARE_COMMIT - f48448d4736bd6d56fed4dbf7f9cc50552d8745d - -on: - push: - paths: - - '.github/**' - - 'SynRepoConfig/**' - - '$SCAN_DIRECTORY' - branches: - - ganesh_dev - pull_request: - types: closed - branches: - - master -jobs: - linux: - name: Updating release repository - runs-on: ubuntu-latest - steps: - - name: Checkout SOFA-Chips - uses: actions/checkout@v2 - with: - path: SOFA-Chips - - - name: Checkout caravel repo - uses: actions/checkout@master - with: - repository: *DEST_REPO - path: *DEST_DIR - - - name: Checkout open_mpw_precheck repo - uses: actions/checkout@master - with: - repository: efabless/open_mpw_precheck - path: open_mpw_precheck - - - name: Perform checks with open_mpw_precheck - uses: ganeshgore/docker-run-action@49cd3a1 - with: - image: goreganesh/open_mpw_prechecker - options: > - -v ${{github.workspace}}/open_mpw_precheck:/usr/local/bin - -v ${{github.workspace}}:/usr/local/workspace - -e DEST_DIR=$DEST_DIR - -e SCAN_DIRECTORY=$SCAN_DIRECTORY - -e PRECHECKER_OPTS="--skip_drc" - --workdir /usr/local/workspace - run: cd /usr/local/workspace && pwd && ls && bash ./SOFA-Chips/.github/workflows/perform_precheck.sh - - - name: Deploy files - run: bash ./SOFA-Chips/.github/workflows/sync_repo.sh - - - name: Local log - if: ${{ github.event_name == 'pull_request' && contains(github.ref, "master") && github.event.action == 'merged' }} - run: - git status - - # - name: Deploy Changes localbranch - # uses: peaceiris/actions-gh-pages@v3 - # if: ${{! (github.event_name == 'pull_request' && contains(github.ref, "master") && github.event.action == 'merged') }} - # with: - # user_name: "lnis.uofu" - # user_email: "lnis.uofu@gmail.com" - # github_token: ${{ secrets.GITHUB_TOKEN }} - # publish_dir: ./SOFA-Chips/local_checks/Caravel-SOFA_HD - # publish_branch: master - # disable_nojekyll: true - # commit_message: '[Deployment] ${{ github.event.head_commit.message }}' diff --git a/.github/workflows/buildDocker.yml b/.github/workflows/buildDocker.yml deleted file mode 100644 index a6b0c0d..0000000 --- a/.github/workflows/buildDocker.yml +++ /dev/null @@ -1,50 +0,0 @@ -# ############################################################################## -# TODO: Add verification task after the netlist modification -################################################################################ - -name: Arch XML Regression - -# Run CI on push on each branch -on: - push: - pull_request: - -jobs: - generate_netlist: - name: Arch development - runs-on: ubuntu-18.04 - container: ghcr.io/lnis-uofu/openfpga-master:latest - strategy: - fail-fast: false - matrix: - config: - - name: "FPGA1212_QLSOFA_HD" - - name: "FPGA1212_SOFA_CHD" - - name: "FPGA1212_SOFA_HD" - steps: - - name: Runner workspace path - run: | - echo "Cleaning up previous run" - rm -rf "${{ github.workspace }}" - mkdir -p "${{ github.workspace }}" - - name: Checkout OpenFPGA-ArcticPro3 repo - uses: actions/checkout@v2 - - name: Detect changes - uses: technote-space/get-diff-action@v4 - with: - PATTERNS: | - ${{ matrix.config.name }}_PNR/*_task/** - - name: Running benchmark - shell: bash - if: ${{ env.GIT_DIFF || (github.event_name == 'pull_request' && github.ref == 'refs/heads/master') || (github.ref == 'refs/heads/master') }} - run: | - ${PYTHON_EXEC} -m pip install -r requirements.txt - cat ${{ matrix.config.name }}_PNR/${{ matrix.config.name }}_task/config/task_simulation.conf - cd ${{ matrix.config.name }}_PNR && make clean runOpenFPGA - - name: Upload artifact - uses: actions/upload-artifact@v2 - if: ${{ failure() }} - with: - name: failed_${{matrix.config.name}}_regression_log - retention-days: 1 - path: "${{ matrix.config.name }}_PNR/*_task/latest/*.log" diff --git a/.github/workflows/install_dependency.sh b/.github/workflows/install_dependency.sh deleted file mode 100644 index ddfe8eb..0000000 --- a/.github/workflows/install_dependency.sh +++ /dev/null @@ -1,53 +0,0 @@ -# Install all the dependency for OpenFPGA in Ubuntu-18.04 -sudo apt-get update -sudo apt-get install autoconf -sudo apt-get install automake -sudo apt-get install bash -sudo apt-get install bison -sudo apt-get install build-essential -sudo apt-get install cmake -sudo apt-get install ccache -sudo apt-get install ctags -sudo apt-get install curl -sudo apt-get install doxygen -sudo apt-get install flex -sudo apt-get install fontconfig -sudo apt-get install gdb -sudo apt-get install git -sudo apt-get install gperf -sudo apt-get install iverilog -sudo apt-get install libcairo2-dev -sudo apt-get install libevent-dev -sudo apt-get install libfontconfig1-dev -sudo apt-get install liblist-moreutils-perl -sudo apt-get install libncurses5-dev -sudo apt-get install libx11-dev -sudo apt-get install libxft-dev -sudo apt-get install libxml++2.6-dev -sudo apt-get install perl -sudo apt-get install python -sudo apt-get install python3-setuptools -sudo apt-get install python-lxml -sudo apt-get install tcllib -sudo apt-get install tcl8.6-dev -sudo apt-get install texinfo -sudo apt-get install time -sudo apt-get install valgrind -sudo apt-get install zip -sudo apt-get install qt5-default -sudo apt-get install clang-format-7 -# Add all the supported compilers -sudo apt-get install g++-5 -sudo apt-get install gcc-5 -sudo apt-get install g++-6 -sudo apt-get install gcc-6 -sudo apt-get install g++-7 -sudo apt-get install gcc-7 -sudo apt-get install g++-8 -sudo apt-get install gcc-8 -sudo apt-get install g++-9 -sudo apt-get install gcc-9 -sudo apt-get install clang-6.0 -sudo apt-get install clang-8 -# Python dependencies -python3 -m pip install -r /home/runner/work/SOFA/SOFA/OpenFPGA/requirements.txt \ No newline at end of file diff --git a/.github/workflows/perform_precheck.sh b/.github/workflows/perform_precheck.sh deleted file mode 100644 index 0361025..0000000 --- a/.github/workflows/perform_precheck.sh +++ /dev/null @@ -1,90 +0,0 @@ -#!/bin/bash - -# Working directory in github workspace -# Original repo is places ../SOFA-Chips -# for conditional file copy use PROJ_SUFFIX (example SOFA_HD) - -cd ./${DEST_DIR} -echo "[Info] Running in directory ${PWD}" - -cp ../SOFA-Chips/${SCAN_DIRECTORY}/fpga_top_icv_in_design.gds.gz ./gds/ -if test -f "./gds/fpga_top_icv_in_design.gds.gz.sha1"; then - sha1sum --status -c ./gds/fpga_top_icv_in_design.gds.gz.sha1 - status=$? - [ $status -eq 0 ] && echo "SHA1 matched GDS is already merged ... skipping drc" && exit -fi -fpga_top_sha1=$(sha1sum ./gds/fpga_top_icv_in_design.gds.gz) - -make uncompress -echo "[Info] All files are uncompressed" - -# = = = = = = = = = = = = Modify Merge Scripts = = = = = = = = = = = = = = = = -AddLine="use fpga_top fpga_top_uut\n"\ -"transform 1 0 0 0 1 0\n"\ -"box 0 0 2500 3000" -sed -i "s/<< properties >>/${AddLine}\n<< properties >>/" ./mag/user_project_wrapper_empty.mag -echo "[Info] Updated user_project_wrapper_empty" - -# = = = Running magic to merge fpga_top with user_project_wrapper = = = = = = = -[ ! -d "/usr/local/workspace/${DEST_DIR}/checks" ] && mkdir /usr/local/workspace/${DEST_DIR}/checks -MAGTYPE=mag \ -magic -rcfile ${PDK_ROOT}/sky130A/libs.tech/magic/current/sky130A.magicrc \ --noconsole -dnull \ -../SOFA-Chips/SCRIPT/merge_fpga_top.tcl \ -/usr/local/workspace/${DEST_DIR}/checks/magic_merge_user_project_wrapper.log - -git checkout HEAD ./mag/user_project_wrapper_empty.mag -echo "[Info] merge fpga-top" - -# = = = = = = = = = = Build Caravel with Klayout = = = = = = = = = = = = = = = -klayout -r ../SOFA-Chips/SCRIPT/merge_caravel_klayout.py -zz > \ -/usr/local/workspace/${DEST_DIR}/checks/KlayoutMerge.log -echo "[Info] Finished shiping chip with Klayout" -rm -rf ./gds/fpga_top* -rm -rf ./gds/user_project_wrapper_empty.gds -rm -rf ./gds/user_proj_example.gds -mv ./gds/caravel_merged.gds ./gds/caravel.gds - -# = = = = = = = = = Build Caravel with Magic = = = = = = = = = = = = = = = = = -# for i in {1..30}; do sleep 1m; echo "Still shipping"; done & # 30 min timeout for merge GDS -# make ship -# kill %1 -# echo "[Info] Finished shiping chip with Magic " -# rm -f gds/caravel.old.gds - -# = = = = = = = = = = = = = Perform Open MPW Checks = = = = = = = = = = = = = = -if [[ "$SKIP_PRECHECK" != 1 ]]; then - echo "[Info] Running MPW Prechecker" - cd /usr/local/bin - python3 open_mpw_prechecker.py \ - --target_path /usr/local/workspace/${DEST_DIR} \ - --pdk_root $PDK_ROOT ${PRECHECKER_OPTS} - echo "[Info] Finished MPW Prechecker" -else - make compress - echo "[Info] Skipped MPW Prechecker" -fi - -# = = = = = = = Convert DRC Errors to RDB = = = = = = = = = = = = = = = = = = = -cd /usr/local/workspace/${DEST_DIR} -if test -f "./checks/caravel.magic.drc"; then - python3 ../SOFA-Chips/SCRIPT/magic_drc_to_rdb.py \ - --magic_drc_in ./checks/caravel.magic.drc \ - --rdb_out ./checks/caravel.magic.rdb - echo "[Info] Converted errors in RDB format" -fi - -# = = = = = = = Clean up repo = = = = = = = = = = = = = = = = = = = -rm -rf user_project_wrapper.mag -rm -rf gds/caravel.mag -rm -rf magic_drc.log -git checkout HEAD -- ./mag/user_project_wrapper.mag -git checkout HEAD -- ./mag/user_project_wrapper.mag - -echo ${CARAVEL_COMPARE_COMMIT} -if [[ 0 -eq $(git cat-file -e $CARAVEL_COMPARE_COMMIT) ]]; then - git diff --stat $CARAVEL_COMPARE_COMMIT . > \ - /usr/local/workspace/${DEST_DIR}/checks/compare_caravel.txt - echo "[Info] Create compare_caravel.txt" -fi -echo $fpga_top_sha1 > ./gds/fpga_top_icv_in_design.gds.gz.sha1 diff --git a/.github/workflows/quick_test.sh b/.github/workflows/quick_test.sh deleted file mode 100755 index b3f3a05..0000000 --- a/.github/workflows/quick_test.sh +++ /dev/null @@ -1,36 +0,0 @@ -#!/bin/bash - -set -e - -############################################### -# OpenFPGA Shell with VPR8 -############################################## - -############################################## -# Initialize the repository -# - Generate final version of architecture files -# - Run FPGA tasks to validate netlist generations -python3 SCRIPT/repo_setup.py --openfpga_root_path ./OpenFPGA - -# Post processing netlist to use custom cells -python3 HDL/common/custom_cell_mux_primitive_generator.py --template_netlist HDL/k4_N8_reset_softadder_caravel_io_FPGA_12x12_customhd_cc/SRC/sub_module/mux_primitives.v --output_verilog HDL/k4_N8_reset_softadder_caravel_io_FPGA_12x12_customhd_cc/SRC/sub_module/mux_primitives_hd.v - -############################################## -# Generate wrapper HDL codes to bridge Caravel I/Os and FPGA I/Os -python3 HDL/common/wrapper_lines_generator.py --template_netlist HDL/common/caravel_fpga_wrapper_hd_template.v --pin_assignment_file HDL/common/caravel_wrapper_pin_assignment_v1.0.json --output_verilog HDL/common/caravel_fpga_wrapper_hd_v1.0.v -python3 HDL/common/wrapper_lines_generator.py --template_netlist HDL/common/caravel_fpga_wrapper_hd_template.v --pin_assignment_file HDL/common/caravel_wrapper_pin_assignment_v1.1.json --output_verilog HDL/common/caravel_fpga_wrapper_hd_v1.1.v - -############################################## -# Generate post-PnR testbenches -python3 TESTBENCH/common/generate_post_pnr_testbenches.py --pre_pnr_testbench_dir_name ./TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc --pin_assignment_file ./HDL/common/caravel_wrapper_pin_assignment_v1.0.json -python3 TESTBENCH/common/generate_post_pnr_testbenches.py --pre_pnr_testbench_dir_name ./TESTBENCH/k4_N8_reset_softadder_caravel_io_FPGA_12x12_fdhd_cc --pin_assignment_file ./HDL/common/caravel_wrapper_pin_assignment_v1.1.json -python3 TESTBENCH/common/generate_post_pnr_testbenches.py --pre_pnr_testbench_dir_name ./TESTBENCH/k4_N8_reset_softadder_caravel_io_FPGA_12x12_customhd_cc --pin_assignment_file ./HDL/common/caravel_wrapper_pin_assignment_v1.1.json - -# Generate wrapper testbenches from template tesbenches for configuration chain tests -python3 TESTBENCH/common/post_pnr_wrapper_testbench_converter.py --post_pnr_testbench TESTBENCH/common/ccff_test_post_pnr_v1.0.v --pin_assignment_file HDL/common/caravel_wrapper_pin_assignment_v1.0.json --wrapper_testbench TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/ccff_test_post_pnr_wrapper.v -python3 TESTBENCH/common/post_pnr_wrapper_testbench_converter.py --post_pnr_testbench TESTBENCH/common/ccff_test_post_pnr_v1.1.v --pin_assignment_file HDL/common/caravel_wrapper_pin_assignment_v1.1.json --wrapper_testbench TESTBENCH/k4_N8_reset_softadder_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/ccff_test_post_pnr_wrapper.v - -# Generate wrapper testbenches from template tesbenches for scan chain tests -python3 TESTBENCH/common/post_pnr_wrapper_testbench_converter.py --post_pnr_testbench TESTBENCH/common/scff_test_post_pnr_v1.0.v --pin_assignment_file HDL/common/caravel_wrapper_pin_assignment_v1.0.json --wrapper_testbench TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/scff_test_post_pnr_wrapper.v -python3 TESTBENCH/common/post_pnr_wrapper_testbench_converter.py --post_pnr_testbench TESTBENCH/common/scff_test_post_pnr_v1.1.v --pin_assignment_file HDL/common/caravel_wrapper_pin_assignment_v1.1.json --wrapper_testbench TESTBENCH/k4_N8_reset_softadder_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/scff_test_post_pnr_wrapper.v - diff --git a/.github/workflows/sync_repo.sh b/.github/workflows/sync_repo.sh deleted file mode 100644 index 1c0a005..0000000 --- a/.github/workflows/sync_repo.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/bash -# This script runs after the prechecks and before the deployment -# In the host enviroment (All the GITHUB variables are available) - -# Working directory in github workspace -# Original repo is places SOFA-Chips -# for conditional file copy use PROJ_SUFFIX (example SOFA_HD) -COPY_FILE="./SOFA-Chips/SynRepoConfig/sync_files_${PROJ_SUFFIX,,}.csv" -echo "[Info] Using file for rsync $COPY_FILE" -tail -n +2 $COPY_FILE | while IFS=, read -r srcLoc dstLoc; do - srcLoc=$(echo $(eval "echo $srcLoc")) - dstLoc=$(echo $(eval "echo $dstLoc")) - echo "Copying ./SOFA-Chips/$srcLoc --> ${DEST_DIR}/$dstLoc" - rsync -ap ./SOFA-Chips/$srcLoc ${DEST_DIR}/$dstLoc -done - -cd ${DEST_DIR} - -[ -s source_commit_hash.txt ] || echo "---- Start ----" > source_commit_hash.txt - -sed -i "1i GITHUB_SHA ${GITHUB_SHA:--}" source_commit_hash.txt -sed -i "1i Date $(date)" source_commit_hash.txt -sed -i '1i = = = = = = = = = = = = = = = =' source_commit_hash.txt - -# Clean up file from repo -git checkout master qflow -rm -rf .travis* -rm -f .travis.yml -find . -xtype l -delete