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[HDL] Name fix to be compatible with testbench generation

This commit is contained in:
tangxifan 2020-11-29 21:01:44 -07:00
parent e3efcebf2b
commit 78addbe294
3 changed files with 5 additions and 5 deletions
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BIN
HDL/common/caravel_fpga_wrapper_hd_template.v (Stored with Git LFS)
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4
HDL/common/caravel_wrapper_pin_assignment_v1.0.json
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@ -46,13 +46,13 @@
"caravel_pin_index": ["10:2"] "caravel_pin_index": ["10:2"]
}, },
{ {
"fpga_pin_type": "io_isol_n", "fpga_pin_type": "IO_ISOL_N",
"fpga_pin_index": "0:0", "fpga_pin_index": "0:0",
"caravel_pin_type": ["input"], "caravel_pin_type": ["input"],
"caravel_pin_index": ["1:1"] "caravel_pin_index": ["1:1"]
}, },
{ {
"fpga_pin_type": "test_en", "fpga_pin_type": "Test_en",
"fpga_pin_index": "0:0", "fpga_pin_index": "0:0",
"caravel_pin_type": ["input"], "caravel_pin_type": ["input"],
"caravel_pin_index": ["0:0"] "caravel_pin_index": ["0:0"]

4
HDL/common/caravel_wrapper_pin_assignment_v1.1.json
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@ -58,13 +58,13 @@
"caravel_pin_index": ["2:2"] "caravel_pin_index": ["2:2"]
}, },
{ {
"fpga_pin_type": "io_isol_n", "fpga_pin_type": "IO_ISOL_N",
"fpga_pin_index": "0:0", "fpga_pin_index": "0:0",
"caravel_pin_type": ["input"], "caravel_pin_type": ["input"],
"caravel_pin_index": ["1:1"] "caravel_pin_index": ["1:1"]
}, },
{ {
"fpga_pin_type": "test_en", "fpga_pin_type": "Test_en",
"fpga_pin_index": "0:0", "fpga_pin_index": "0:0",
"caravel_pin_type": ["input"], "caravel_pin_type": ["input"],
"caravel_pin_index": ["0:0"] "caravel_pin_index": ["0:0"]