diff --git a/ARCH/openfpga_arch_template/ql_ap3_8x8_arch_vpr_routing_skywater130nm_fdhd_cc_openfpga.xml b/ARCH/openfpga_arch_template/ql_ap3_8x8_arch_vpr_routing_skywater130nm_fdhd_cc_openfpga.xml index f588f71..bf6d542 100644 --- a/ARCH/openfpga_arch_template/ql_ap3_8x8_arch_vpr_routing_skywater130nm_fdhd_cc_openfpga.xml +++ b/ARCH/openfpga_arch_template/ql_ap3_8x8_arch_vpr_routing_skywater130nm_fdhd_cc_openfpga.xml @@ -86,6 +86,21 @@ If your standard cell provider does not offer the exact truth table, you can simply swap the inputs as shown in the example below --> + + + + + + + + + + 10e-12 5e-12 + + + 10e-12 5e-12 + + @@ -133,7 +148,7 @@ - + @@ -149,10 +164,11 @@ - + + @@ -220,19 +236,21 @@ - - - + + + - - + + + + - + diff --git a/ARCH/vpr_arch/ql_ap3_8x8_arch_vpr_routing.xml b/ARCH/vpr_arch/ql_ap3_8x8_arch_vpr_routing.xml index 163b9e2..72d7146 100644 --- a/ARCH/vpr_arch/ql_ap3_8x8_arch_vpr_routing.xml +++ b/ARCH/vpr_arch/ql_ap3_8x8_arch_vpr_routing.xml @@ -11,11 +11,11 @@ - - + + - + @@ -37,17 +37,6 @@ - - - - - - - - - - - @@ -104,7 +93,11 @@ SUPER_LOGIC_CELL.CO - + + + + + @@ -167,7 +160,7 @@ - + @@ -214,7 +207,7 @@ - + @@ -222,13 +215,13 @@ - - + + - - + + @@ -317,18 +310,18 @@ - + - + - - - - + + + + @@ -336,9 +329,9 @@ - + - + @@ -360,15 +353,14 @@ - - - - - - - - - + + + + + + + + BLK2REG @@ -454,7 +446,7 @@ - + @@ -469,7 +461,7 @@ routing - +