From 4128f4cd1bd7e33d76886c64886452d5dbdcb900 Mon Sep 17 00:00:00 2001 From: Lalit Sharma Date: Thu, 7 Jan 2021 01:15:41 -0800 Subject: [PATCH] Enabling custom yosys script only for and gate design, will enable later for other designs when yosys submodule is updated --- .../generate_testbench/config/task_template.conf | 2 -- 1 file changed, 2 deletions(-) diff --git a/SCRIPT/skywater_openfpga_task/k4_N8_reset_softadder_caravel_cc_fdhd_32x32/generate_testbench/config/task_template.conf b/SCRIPT/skywater_openfpga_task/k4_N8_reset_softadder_caravel_cc_fdhd_32x32/generate_testbench/config/task_template.conf index 0d568f5..b68fe46 100644 --- a/SCRIPT/skywater_openfpga_task/k4_N8_reset_softadder_caravel_cc_fdhd_32x32/generate_testbench/config/task_template.conf +++ b/SCRIPT/skywater_openfpga_task/k4_N8_reset_softadder_caravel_cc_fdhd_32x32/generate_testbench/config/task_template.conf @@ -60,9 +60,7 @@ bench0_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3. bench1_top = and2_latch bench1_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys bench2_top = bin2bcd -bench2_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys bench3_top = counter -bench3_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/quicklogic_yosys_flow_ap3.ys bench4_top = routing_test # RS decoder needs 1.5k LUT4, exceeding device capacity bench5_top = rs_decoder_top