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[Script] Try auto number of simulation clock cycles

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tangxifan 2020-12-02 19:33:28 -07:00
parent 3a097b38af
commit 2db2b468fe
1 changed files with 1 additions and 1 deletions
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SCRIPT/openfpga_simulation_setting/efpga_12x12_sim_openfpga.xml
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@ -11,7 +11,7 @@
As the FPGA core does not share the clock with Caravel SoC
the actual clock frequency could be higher
-->
<operating frequency="50e6" num_cycles="100" slack="0.2"/>
<operating frequency="50e6" num_cycles="auto" slack="0.2"/>
<!-- Use 50MHz as the Caravel SoC can operate at 50MHz
As the FPGA core does not share the clock with Caravel SoC
the actual programming clock frequency could be higher