diff --git a/SCRIPT/skywater_openfpga_task/k4_N8_reset_caravel_cc_fdhd_12x12/generate_sdc/config/task_template.conf b/SCRIPT/skywater_openfpga_task/k4_N8_reset_caravel_cc_fdhd_12x12/generate_sdc/config/task_template.conf
index a857d7a..32618a5 100644
--- a/SCRIPT/skywater_openfpga_task/k4_N8_reset_caravel_cc_fdhd_12x12/generate_sdc/config/task_template.conf
+++ b/SCRIPT/skywater_openfpga_task/k4_N8_reset_caravel_cc_fdhd_12x12/generate_sdc/config/task_template.conf
@@ -25,7 +25,7 @@ openfpga_sdc_output_dir=${SKYWATER_OPENFPGA_HOME}/SDC/k4_N8_reset_caravel_io_FPG
 external_fabric_key_file=${SKYWATER_OPENFPGA_HOME}/ARCH/fabric_key/fabric_key_12x12.xml
 
 [ARCHITECTURES]
-arch0=${SKYWATER_OPENFPGA_HOME}/ARCH/vpr_arch/k4_frac_N8_reset_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
+arch0=${SKYWATER_OPENFPGA_HOME}/ARCH/vpr_arch/k4_frac_N8_tileable_reset_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
 
 [BENCHMARKS]
 bench0=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/and2/and2.v
diff --git a/SCRIPT/skywater_openfpga_task/k4_N8_reset_caravel_cc_fdhd_12x12/generate_testbench/config/task_template.conf b/SCRIPT/skywater_openfpga_task/k4_N8_reset_caravel_cc_fdhd_12x12/generate_testbench/config/task_template.conf
index 6b5ce05..6fe9240 100644
--- a/SCRIPT/skywater_openfpga_task/k4_N8_reset_caravel_cc_fdhd_12x12/generate_testbench/config/task_template.conf
+++ b/SCRIPT/skywater_openfpga_task/k4_N8_reset_caravel_cc_fdhd_12x12/generate_testbench/config/task_template.conf
@@ -26,7 +26,7 @@ openfpga_fabric_verilog_netlist=${SKYWATER_OPENFPGA_HOME}/HDL/k4_N8_reset_carave
 external_fabric_key_file=${SKYWATER_OPENFPGA_HOME}/ARCH/fabric_key/fabric_key_12x12.xml
 
 [ARCHITECTURES]
-arch0=${SKYWATER_OPENFPGA_HOME}/ARCH/vpr_arch/k4_frac_N8_reset_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
+arch0=${SKYWATER_OPENFPGA_HOME}/ARCH/vpr_arch/k4_frac_N8_tileable_reset_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
 
 [BENCHMARKS]
 bench0=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/and2/and2.v