From 22d0aaafeb2f97ea4f3eba3082e338d2ff92bd96 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Tue, 17 Nov 2020 11:47:47 -0700
Subject: [PATCH] [Arch] Move global pins to the first of pin list in vpr
 architecture to ease backend scripts

---
 ...e_register_scan_chain_nonLR_caravel_io_skywater130nm.xml | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/ARCH/vpr_arch/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml b/ARCH/vpr_arch/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
index 92ea39f..336743e 100644
--- a/ARCH/vpr_arch/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
+++ b/ARCH/vpr_arch/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
@@ -144,10 +144,10 @@
       </fc>
       <!--pinlocations pattern="spread"/-->
       <pinlocations pattern="custom">
-        <loc side="left">clb.clk</loc>
-        <loc side="top">clb.reg_in clb.sc_in clb.O[7:0] clb.I0 clb.I0i clb.I1 clb.I1i clb.I2 clb.I2i clb.I3 clb.I3i</loc>
+        <loc side="left"></loc>
+        <loc side="top">clb.clk clb.reg_in clb.sc_in clb.reg_out clb.sc_out clb.O[7:0] clb.I0 clb.I0i clb.I1 clb.I1i clb.I2 clb.I2i clb.I3 clb.I3i</loc>
         <loc side="right">clb.O[15:8] clb.I4 clb.I4i clb.I5 clb.I5i clb.I6 clb.I6i clb.I7 clb.I7i</loc>
-        <loc side="bottom">clb.reg_out clb.sc_out</loc>
+        <loc side="bottom"></loc>
       </pinlocations>
     </tile>
   </tiles>