From 1b0fbed7073744555b87bc444e08a2ca8fb0cb17 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Fri, 9 Oct 2020 22:37:39 -0600 Subject: [PATCH] [Documentation] Format README --- README.md | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/README.md b/README.md index 1fa4be0..57a8ebe 100644 --- a/README.md +++ b/README.md @@ -2,17 +2,17 @@ FPGA tape-outs using the open-source Skywater 130nm PDK and OpenFPGA * Keep this folder clean and organized as follows - - DOC: documentation of the project - - ARCH: Architecture XML and other input files which OpenFPGA requires to generate Verilog netlists - - BENCHMARK: Benchmarks to be tested on the FPGA fabric - - HDL: Hardware description netlists for the FPGA fabrics - - SDC: design constraints - - SCRIPT: Scripts to setup, run OpenFPGA etc. - - TESTBENCH: Verilog testbenches generated by OpenFPGA - - PDK: Technology files linked from skywater opensource pdk - - SNPS\_ICC2: scripts and workspace of Synopsys IC Compiler 2 + - **DOC**: documentation of the project + - **ARCH**: Architecture XML and other input files which OpenFPGA requires to generate Verilog netlists + - **BENCHMARK**: Benchmarks to be tested on the FPGA fabric + - **HDL**: Hardware description netlists for the FPGA fabrics + - **SDC**: design constraints + - **SCRIPT**: Scripts to setup, run OpenFPGA etc. + - **TESTBENCH**: Verilog testbenches generated by OpenFPGA + - **PDK**: Technology files linked from skywater opensource pdk + - **SNPS\_ICC2**: scripts and workspace of Synopsys IC Compiler 2 Keep a README inside the folder about the ICC2 version and how-to-use. - - MSIM: scripts and workspace of verification using Mentor ModelSim + - **MSIM**: scripts and workspace of verification using Mentor ModelSim * Note: - Please **ONLY** place folders under this directory