diff --git a/TESTBENCH/caravel_dv/and2_latch_test/Makefile b/TESTBENCH/caravel_dv/and2_latch_test/Makefile new file mode 100644 index 0000000..fa25fc2 --- /dev/null +++ b/TESTBENCH/caravel_dv/and2_latch_test/Makefile @@ -0,0 +1,30 @@ +FIRMWARE_PATH = ../common + +GCC_PATH?=/research/ece/lnis/USERS/DARPA_ERI/tools/riscv32i/bin +GCC_PREFIX?=riscv32-unknown-elf + +.SUFFIXES: + +PATTERN = and2_latch_test_caravel + +all: ${PATTERN:=.hex} + +hex: ${PATTERN:=.hex} + +%.elf: %.c $(FIRMWARE_PATH)/sections.lds $(FIRMWARE_PATH)/start.s + ${GCC_PATH}/${GCC_PREFIX}-gcc -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(FIRMWARE_PATH)/start.s $< + +%.hex: %.elf + ${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@ + # to fix flash base address + sed -i 's/@10000000/@00000000/g' $@ + +%.bin: %.elf + ${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@ + +# ---- Clean ---- + +clean: + rm -f *.elf *.hex *.bin *.vvp *.vcd *.log + +.PHONY: clean hex all diff --git a/TESTBENCH/caravel_dv/and2_latch_test/and2_latch_test_caravel.c b/TESTBENCH/caravel_dv/and2_latch_test/and2_latch_test_caravel.c new file mode 100644 index 0000000..59a82b6 --- /dev/null +++ b/TESTBENCH/caravel_dv/and2_latch_test/and2_latch_test_caravel.c @@ -0,0 +1,114 @@ +#include "../common/defs.h" + +/* + * Scan-chain Test: + * - Configures directions for control ports + * +==========+===============+===========+ + * | GPIO | Functionality | Direction | + * +==========+===============+===========+ + * | GPIO[0] | TEST_EN | input | + * +----------+---------------+-----------+ + * | GPIO[1] | IO_ISOL_N | input | + * +----------+---------------+-----------+ + * | GPIO[2] | RESET | input | + * +----------+---------------+-----------+ + * | GPIO[3] | PROG_RESET | input | + * +----------+---------------+-----------+ + * | GPIO[11] | SC_TAIL | output | + * +----------+---------------+-----------+ + * | GPIO[12] | CCFF_HEAD | input | + * +----------+---------------+-----------+ + * | GPIO[25] | MODE_SWITCH) | input | + * +----------+---------------+-----------+ + * | GPIO[26] | SC_HEAD | input | + * +----------+---------------+-----------+ + * | GPIO[35] | CCFF_TAIL | output | + * +----------+---------------+-----------+ + * | GPIO[36] | CLK | input | + * +----------+---------------+-----------+ + * | GPIO[37] | PROG_CLK | input | + * +----------+---------------+-----------+ + * + * - Configure unused FPGA data I/Os to be input + * - Configure used FPGA data I/Os + * + * +==========+===============+===========+ + * | GPIO | Functionality | Direction | + * +==========+===============+===========+ + * | GPIO[24] | a | input | + * +----------+---------------+-----------+ + * | GPIO[27] | b | input | + * +----------+---------------+-----------+ + * | GPIO[28] | c | output | + * +----------+---------------+-----------+ + * | GPIO[23] | d | output | + * +----------+---------------+-----------+ + +*/ + +void main() { + /* + IO Control Registers + | DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN | + | 3-bits | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | + + Output: 0000_0110_0000_1110 (0x1808) = GPIO_MODE_USER_STD_OUTPUT + | DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN | + | 110 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | + + + Input: 0000_0001_0000_1111 (0x0402) = GPIO_MODE_USER_STD_INPUT_NOPULL + | DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN | + | 001 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | + + */ + + // By default all the I/Os are in input mode + reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_2 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_3 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_4 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_6 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_7 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_8 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_9 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_10 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_12 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_13 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_14 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_17 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_18 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_19 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_22 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_24 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_25 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_26 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_27 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_29 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_30 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_31 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_32 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_33 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_34 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_36 = GPIO_MODE_USER_STD_INPUT_NOPULL; + reg_mprj_io_37 = GPIO_MODE_USER_STD_INPUT_NOPULL; + // Only specify those should be in output mode + reg_mprj_io_11 = GPIO_MODE_USER_STD_OUTPUT; + reg_mprj_io_35 = GPIO_MODE_USER_STD_OUTPUT; + + // Implementation outputs + reg_mprj_io_23 = GPIO_MODE_USER_STD_OUTPUT; + reg_mprj_io_28 = GPIO_MODE_USER_STD_OUTPUT; + + /* Apply configuration */ + reg_mprj_xfer = 1; + while (reg_mprj_xfer == 1); + +} + diff --git a/TESTBENCH/caravel_dv/and2_latch_test/and2_latch_test_caravel.hex b/TESTBENCH/caravel_dv/and2_latch_test/and2_latch_test_caravel.hex new file mode 100755 index 0000000..89aa53d --- /dev/null +++ b/TESTBENCH/caravel_dv/and2_latch_test/and2_latch_test_caravel.hex @@ -0,0 +1,58 @@ +@00000000 +93 00 00 00 93 01 00 00 13 02 00 00 93 02 00 00 +13 03 00 00 93 03 00 00 13 04 00 00 93 04 00 00 +13 05 00 00 93 05 00 00 13 06 00 00 93 06 00 00 +13 07 00 00 93 07 00 00 13 08 00 00 93 08 00 00 +13 09 00 00 93 09 00 00 13 0A 00 00 93 0A 00 00 +13 0B 00 00 93 0B 00 00 13 0C 00 00 93 0C 00 00 +13 0D 00 00 93 0D 00 00 13 0E 00 00 93 0E 00 00 +13 0F 00 00 93 0F 00 00 17 05 00 00 13 05 45 31 +93 05 00 00 13 06 00 00 63 D8 C5 00 14 41 94 C1 +11 05 91 05 E3 CC C5 FE 13 05 00 00 93 05 00 00 +63 57 B5 00 23 20 05 00 11 05 E3 4D B5 FE 71 28 +01 A0 01 00 B7 02 00 28 13 03 00 12 23 90 62 00 +A3 81 02 00 05 C6 21 4F 93 73 F6 0F 93 DE 73 00 +23 80 D2 01 93 EE 0E 01 23 80 D2 01 86 03 93 F3 +F3 0F 7D 1F E3 14 0F FE 23 80 62 00 A1 C9 13 0F +00 02 83 23 05 00 A1 4F 93 DE F3 01 23 80 D2 01 +93 EE 0E 01 23 80 D2 01 83 CE 02 00 93 FE 2E 00 +93 DE 1E 00 86 03 B3 E3 D3 01 7D 1F 63 17 0F 00 +23 20 75 00 11 05 83 23 05 00 FD 1F E3 96 0F FC +FD 15 F1 F1 63 04 0F 00 23 20 75 00 13 03 00 08 +A3 81 62 00 82 80 01 00 00 00 41 11 22 C6 00 08 +B7 07 00 26 93 87 07 02 13 07 20 40 98 C3 B7 07 +00 26 93 87 47 02 13 07 20 40 98 C3 B7 07 00 26 +93 87 87 02 13 07 20 40 98 C3 B7 07 00 26 93 87 +C7 02 13 07 20 40 98 C3 B7 07 00 26 93 87 07 03 +13 07 20 40 98 C3 B7 07 00 26 93 87 47 03 13 07 +20 40 98 C3 B7 07 00 26 93 87 87 03 13 07 20 40 +98 C3 B7 07 00 26 93 87 C7 03 13 07 20 40 98 C3 +B7 07 00 26 93 87 07 04 13 07 20 40 98 C3 B7 07 +00 26 93 87 47 04 13 07 20 40 98 C3 B7 07 00 26 +93 87 87 04 13 07 20 40 98 C3 B7 07 00 26 93 87 +07 05 13 07 20 40 98 C3 B7 07 00 26 93 87 47 05 +13 07 20 40 98 C3 B7 07 00 26 93 87 87 05 13 07 +20 40 98 C3 B7 07 00 26 93 87 C7 05 13 07 20 40 +98 C3 B7 07 00 26 93 87 07 06 13 07 20 40 98 C3 +B7 07 00 26 93 87 47 06 13 07 20 40 98 C3 B7 07 +00 26 93 87 87 06 13 07 20 40 98 C3 B7 07 00 26 +93 87 C7 06 13 07 20 40 98 C3 B7 07 00 26 93 87 +07 07 13 07 20 40 98 C3 B7 07 00 26 93 87 47 07 +13 07 20 40 98 C3 B7 07 00 26 93 87 87 07 13 07 +20 40 98 C3 B7 07 00 26 93 87 07 08 13 07 20 40 +98 C3 B7 07 00 26 93 87 47 08 13 07 20 40 98 C3 +B7 07 00 26 93 87 87 08 13 07 20 40 98 C3 B7 07 +00 26 93 87 C7 08 13 07 20 40 98 C3 B7 07 00 26 +93 87 47 09 13 07 20 40 98 C3 B7 07 00 26 93 87 +87 09 13 07 20 40 98 C3 B7 07 00 26 93 87 C7 09 +13 07 20 40 98 C3 B7 07 00 26 93 87 07 0A 13 07 +20 40 98 C3 B7 07 00 26 93 87 47 0A 13 07 20 40 +98 C3 B7 07 00 26 93 87 87 0A 13 07 20 40 98 C3 +B7 07 00 26 93 87 07 0B 13 07 20 40 98 C3 B7 07 +00 26 93 87 47 0B 13 07 20 40 98 C3 B7 07 00 26 +93 87 C7 04 09 67 13 07 87 80 98 C3 B7 07 00 26 +93 87 C7 0A 09 67 13 07 87 80 98 C3 B7 07 00 26 +93 87 C7 07 09 67 13 07 87 80 98 C3 B7 07 00 26 +93 87 07 09 09 67 13 07 87 80 98 C3 B7 07 00 26 +05 47 98 C3 01 00 B7 07 00 26 98 43 85 47 E3 0C +F7 FE 01 00 32 44 41 01 82 80 00 00 diff --git a/TESTBENCH/caravel_dv/and2_latch_test/and2_latch_test_caravel.v.tar.gz b/TESTBENCH/caravel_dv/and2_latch_test/and2_latch_test_caravel.v.tar.gz new file mode 100644 index 0000000..271a000 Binary files /dev/null and b/TESTBENCH/caravel_dv/and2_latch_test/and2_latch_test_caravel.v.tar.gz differ