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Figure and hyperlink updates for Custom Cells Documentation

This commit is contained in:
Grant Brown 2021-04-05 17:50:06 -06:00
parent f5e5372187
commit 17c2046d17
1 changed files with 9 additions and 9 deletions
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18
DOC/source/datasheet/sofa_chd/custom_cells/custom_cells.rst
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@ -15,7 +15,7 @@ Traditionally, larger multiplexers are built using trees of smaller multiplexers
Multiplexers trees lead to large power and timing constraints that limit FPGA performance. FPGA fabrics use complementary pass gate logic (CPL) to replace multiplexer trees with single level inverted transmission gate derived multiplexers, as illustrated below: Multiplexers trees lead to large power and timing constraints that limit FPGA performance. FPGA fabrics use complementary pass gate logic (CPL) to replace multiplexer trees with single level inverted transmission gate derived multiplexers, as illustrated below:
.. image:: figures/fpga_mux.png .. image:: figures/fpga_mux.png
:height: 400px :height: 300px
:width: 800px :width: 800px
:align: center :align: center
:alt: Single Level FPGA Multiplexer :alt: Single Level FPGA Multiplexer
@ -36,7 +36,7 @@ SKY130_UUOPENFPGA_CC_HD_INVMUX2_1
- Schematic: - Schematic:
.. image:: figures/sky130_fd_sc_hd_mux2_1\ schematic.png .. image:: figures/sky130_fd_sc_hd_mux2_1\ schematic.png
:height: 400px :height: 350px
:width: 500px :width: 500px
:align: center :align: center
:alt: Sky130_uuopenfpga_cc_hd_invmux2_1 Schematic :alt: Sky130_uuopenfpga_cc_hd_invmux2_1 Schematic
@ -44,7 +44,7 @@ SKY130_UUOPENFPGA_CC_HD_INVMUX2_1
- Layout:\ - Layout:\
.. image:: figures/sky130_fd_sc_hd_mux2_1\ gds.png .. image:: figures/sky130_fd_sc_hd_mux2_1\ gds.png
:height: 450px :height: 400px
:width: 800px :width: 800px
:align: center :align: center
:alt: Sky130_uuopenfpga_cc_hd_invmux2_1 Layout :alt: Sky130_uuopenfpga_cc_hd_invmux2_1 Layout
@ -73,7 +73,7 @@ Our custom multiplexer provides over a 31\% reduction in propagation delay.
`SKY130_UUOPENFPGA_CC_HD_INVMUX2_1 Cell Characterization`_ `SKY130_UUOPENFPGA_CC_HD_INVMUX2_1 Cell Characterization`_
.. _`SKY130_UUOPENFPGA_CC_HD_INVMUX2_1 Cell Characterization`: https://github.com/GrantBrown1994/SOFA/blob/documentation/DOC/source/datasheet/sofa_chd/custom_cells/cell_eval/SKY130_UUOPENFPGA_CC_HD_INVMUX2_1.pdf .. _`SKY130_UUOPENFPGA_CC_HD_INVMUX2_1 Cell Characterization`: https://github.com/lnis-uofu/SOFA/blob/master/DOC/source/datasheet/sofa_chd/custom_cells/cell_eval/SKY130_UUOPENFPGA_CC_HD_INVMUX2_1.pdf
.. INVMUX2_1 .. INVMUX2_1
@ -91,15 +91,15 @@ SKY130_UUOPENFPGA_CC_HD_INVMUX3_1
- Schematic: - Schematic:
.. image:: figures/sky130_fd_sc_hd_mux3_1\ schematic.png .. image:: figures/sky130_fd_sc_hd_mux3_1\ schematic.png
:height: 600px :height: 550px
:width: 600px :width: 500px
:align: center :align: center
:alt: Sky130_uuopenfpga_cc_hd_invmux3_1 Schematic :alt: Sky130_uuopenfpga_cc_hd_invmux3_1 Schematic
- Layout: - Layout:
.. image:: figures/sky130_fd_sc_hd_mux3_1\ gds.png .. image:: figures/sky130_fd_sc_hd_mux3_1\ gds.png
:height: 400px :height: 350px
:width: 1100px :width: 1100px
:align: center :align: center
:alt: Sky130_uuopenfpga_cc_hd_invmux3_1 Layout :alt: Sky130_uuopenfpga_cc_hd_invmux3_1 Layout
@ -128,6 +128,6 @@ Our custom multiplexer provides over a 27\% reduction in propagation delay.
`SKY130_UUOPENFPGA_CC_HD_INVMUX3_1 Cell Characterization`_ `SKY130_UUOPENFPGA_CC_HD_INVMUX3_1 Cell Characterization`_
.. _`SKY130_UUOPENFPGA_CC_HD_INVMUX3_1 Cell Characterization`: https://github.com/GrantBrown1994/SOFA/blob/documentation/DOC/source/datasheet/sofa_chd/custom_cells/cell_eval/SKY130_UUOPENFPGA_CC_HD_INVMUX3_1.pdf .. _`SKY130_UUOPENFPGA_CC_HD_INVMUX3_1 Cell Characterization`: https://github.com/lnis-uofu/SOFA/blob/master/DOC/source/datasheet/sofa_chd/custom_cells/cell_eval/SKY130_UUOPENFPGA_CC_HD_INVMUX3_1.pdf
.. INVMUX3_1 .. INVMUX3_1