[Testbench] Update post-PnR testbenches to synchornize with latest netlist

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tangxifan 2020-11-28 11:09:55 -07:00

parent 0f0133951c

commit 0c9953a26e

2 changed files with 6 additions and 77 deletions

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TESTBENCH/common/post_pnr_fpga_cells.v (Stored with Git LFS)

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TESTBENCH/k4_N8_caravel_io_FPGA_12x12_fdhd_cc/postpnr/verilog_testbench/scff_test_post_pnr_include_netlists.v (Stored with Git LFS)

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