mirror of https://github.com/lnis-uofu/SOFA.git
11 lines
487 B
Markdown
11 lines
487 B
Markdown
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# Skywater PDK
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This directory is the workspace for running Synopsys Design Compiler for FPGA primitives
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This required to synthesis decoders in FPGA fabrics
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Please keep this directory clean and organize as follows:
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- **HDL**: Any HDL to synthesis
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- **SCRIPT**: Scripts to enable Design Compile runs
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- **RPT**: Report files from Design Compiler runs
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- **TEMP**: workspace for Design Compiler projects
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- READMD is the only file allowed in the directory, others should be sub-directories.
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