mirror of https://github.com/lnis-uofu/SOFA.git
28 lines
643 B
Tcl
28 lines
643 B
Tcl
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echo "=========================="
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pwd
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echo "=========================="
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set projectname ${PROJECTNAME}
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set benchmark ${BENCHMARK}
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set top_tb ${TOP_TB}
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#in ms
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set simtime ${SIMTIME}
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set unit ${UNIT}
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#Path were both tcl script are located
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set project_path "${MODELSIM_PROJ_DIR}/msim_projects/"
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#Path were the verilog files are located
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set verilog_files ${VERILOG_PATH}/*_include_netlists_resolved.v
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#Source the tcl script
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source ${MODELSIM_PROJ_DIR}/${BENCHMARK}_autocheck_proc.tcl
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#Execute the top level procedure
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try {
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top_create_new_project $$projectname $$verilog_files $$project_path $$simtime $$unit $$top_tb
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} finally {
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quit
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}
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