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OpenFPGA
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Xifan Tang fe13168f8f Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
abc_with_bb_support Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
ace2 Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
fpga_flow Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
tutorial initial commit of black-box doc 2018-07-26 13:58:58 -06:00
vpr7_rram Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
.gitignore ignored vpr output files 2018-07-18 10:50:37 -06:00
.gitmodules added tangxifan-eda-tools as a submodule 2018-06-28 12:59:12 -06:00
LICENSE Create LICENSE 2018-06-26 21:52:08 -07:00
getting_started.md added submodule instructions 2018-06-29 13:30:44 -06:00
jupyter_example.ipynb moved architecture documentation to new file 2018-07-16 13:21:41 -06:00