OpenFPGA/vpr7_x2p/vpr/ARCH
AurelienUoU 74ee6bad7f Update spice path in architecture 2019-05-29 10:08:58 -06:00
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.regression_k6_N10_sram_chain_HC.xml Verilog verification with Travis 2019-05-15 15:57:05 -06:00
.travis_k6_N10_sram_chain_HC.xml Update spice path in architecture 2019-05-29 10:08:58 -06:00
k6_N10_sram_chain_HC_template.xml skip rotating mirror detection which is too time-consuming 2019-05-25 23:41:46 -06:00