22 lines
331 B
Verilog
22 lines
331 B
Verilog
// Creating a scaleable adder
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module adder_8(cout, sum, a, b, cin);
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parameter size = 8; /* declare a parameter. default required */
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output cout;
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output [size-1:0] sum; // sum uses the size parameter
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input cin;
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input [size-1:0] a, b; // 'a' and 'b' use the size parameter
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assign {cout, sum} = a + b + cin;
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endmodule
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