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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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f9dc7c1b54
OpenFPGA
/
openfpga_flow
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benchmarks
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quicklogic_tests
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cavlc_top
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Lalit Sharma
d4c5a5655a
Removing blif file as well as and2 testcase
2021-02-19 08:55:17 -08:00
..
rtl
Adding quicklogic tests and updating the corresponding conf file to run them
2021-02-16 23:08:38 -08:00