OpenFPGA/yosys/techlibs/xilinx
tangxifan 4d62dc1c3e Upgrade to yosys-0.9 2019-11-27 14:40:39 -07:00
..
tests
.gitignore
Makefile.inc
arith_map.v
brams.txt
brams_bb.v
brams_init.py
brams_map.v
cells_map.v
cells_sim.v Upgrade to yosys-0.9 2019-11-27 14:40:39 -07:00
cells_xtra.sh Upgrade to yosys-0.9 2019-11-27 14:40:39 -07:00
cells_xtra.v Upgrade to yosys-0.9 2019-11-27 14:40:39 -07:00
drams.txt Upgrade to yosys-0.9 2019-11-27 14:40:39 -07:00
drams_map.v Upgrade to yosys-0.9 2019-11-27 14:40:39 -07:00
ff_map.v
lut_map.v
synth_xilinx.cc Upgrade to yosys-0.9 2019-11-27 14:40:39 -07:00