OpenFPGA/yosys/techlibs/coolrunner2/xc2_dff.lib

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library(xc2_dff) {
cell(FDCP) {
area: 1;
ff("IQ", "IQN") { clocked_on: C;
next_state: D;
clear: "CLR";
preset: "PRE"; }
pin(C) { direction: input;
clock: true; }
pin(D) { direction: input; }
pin(Q) { direction: output;
function: "IQ"; }
pin(CLR) { direction: input; }
pin(PRE) { direction: input; }
}
cell(FDCP_N) {
area: 1;
ff("IQ", "IQN") { clocked_on: "!C";
next_state: D;
clear: "CLR";
preset: "PRE"; }
pin(C) { direction: input;
clock: true; }
pin(D) { direction: input; }
pin(Q) { direction: output;
function: "IQ"; }
pin(CLR) { direction: input; }
pin(PRE) { direction: input; }
}
}