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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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f57495feba
OpenFPGA
/
vpr7_x2p
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tangxifan
f57495feba
Now we can also auto-generate the Verilog for a mux2 std cell
2019-08-06 15:19:01 -06:00
..
libarchfpga
start adding submodules of local encoders to multiplexer
2019-08-06 14:17:55 -06:00
libpcre
update travis configuration and clean up repository
2019-06-07 22:19:11 -06:00
libprinthandler
update travis configuration and clean up repository
2019-06-07 22:19:11 -06:00
vpr
Now we can also auto-generate the Verilog for a mux2 std cell
2019-08-06 15:19:01 -06:00
CMakeLists.txt
Add latest abc and update ace dependence
2019-05-03 18:56:03 -06:00