735 lines
24 KiB
Python
735 lines
24 KiB
Python
#!/usr/bin/env python3
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#
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# yosys -- Yosys Open SYnthesis Suite
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#
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# Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
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#
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# Permission to use, copy, modify, and/or distribute this software for any
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# purpose with or without fee is hereby granted, provided that the above
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# copyright notice and this permission notice appear in all copies.
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#
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# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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#
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import os, sys, getopt, re
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##yosys-sys-path##
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from smtio import SmtIo, SmtOpts, MkVcd
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from collections import defaultdict
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skip_steps = 0
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step_size = 1
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num_steps = 20
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vcdfile = None
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cexfile = None
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vlogtbfile = None
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inconstr = list()
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outconstr = None
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gentrace = False
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tempind = False
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dumpall = False
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assume_skipped = None
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final_only = False
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topmod = None
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noinfo = False
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so = SmtOpts()
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def usage():
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print("""
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yosys-smtbmc [options] <yosys_smt2_output>
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-t <num_steps>
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-t <skip_steps>:<num_steps>
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-t <skip_steps>:<step_size>:<num_steps>
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default: skip_steps=0, step_size=1, num_steps=20
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-g
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generate an arbitrary trace that satisfies
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all assertions and assumptions.
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-i
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instead of BMC run temporal induction
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-m <module_name>
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name of the top module
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--smtc <constr_filename>
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read constraints file
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--cex <cex_filename>
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read cex file as written by ABC's "write_cex -n"
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--noinfo
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only run the core proof, do not collect and print any
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additional information (e.g. which assert failed)
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--final-only
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only check final constraints, assume base case
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--assume-skipped <start_step>
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assume asserts in skipped steps in BMC.
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no assumptions are created for skipped steps
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before <start_step>.
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--dump-vcd <vcd_filename>
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write trace to this VCD file
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(hint: use 'write_smt2 -wires' for maximum
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coverage of signals in generated VCD file)
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--dump-vlogtb <verilog_filename>
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write trace as Verilog test bench
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--dump-smtc <constr_filename>
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write trace as constraints file
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--dump-all
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when using -g or -i, create a dump file for each
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step. The character '%' is replaces in all dump
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filenames with the step number.
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""" + so.helpmsg())
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sys.exit(1)
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try:
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opts, args = getopt.getopt(sys.argv[1:], so.shortopts + "t:igm:", so.longopts +
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["final-only", "assume-skipped=", "smtc=", "cex=", "dump-vcd=", "dump-vlogtb=", "dump-smtc=", "dump-all", "noinfo"])
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except:
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usage()
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for o, a in opts:
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if o == "-t":
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a = a.split(":")
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if len(a) == 1:
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num_steps = int(a[0])
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elif len(a) == 2:
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skip_steps = int(a[0])
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num_steps = int(a[1])
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elif len(a) == 3:
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skip_steps = int(a[0])
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step_size = int(a[1])
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num_steps = int(a[2])
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else:
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assert 0
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elif o == "--assume-skipped":
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assume_skipped = int(a)
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elif o == "--final-only":
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final_only = True
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elif o == "--smtc":
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inconstr.append(a)
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elif o == "--cex":
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cexfile = a
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elif o == "--dump-vcd":
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vcdfile = a
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elif o == "--dump-vlogtb":
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vlogtbfile = a
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elif o == "--dump-smtc":
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outconstr = a
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elif o == "--dump-all":
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dumpall = True
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elif o == "--noinfo":
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noinfo = True
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elif o == "-i":
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tempind = True
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elif o == "-g":
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gentrace = True
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elif o == "-m":
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topmod = a
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elif so.handle(o, a):
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pass
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else:
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usage()
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if len(args) != 1:
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usage()
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constr_final_start = None
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constr_asserts = defaultdict(list)
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constr_assumes = defaultdict(list)
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constr_write = list()
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for fn in inconstr:
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current_states = None
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current_line = 0
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with open(fn, "r") as f:
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for line in f:
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current_line += 1
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if line.startswith("#"):
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continue
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tokens = line.split()
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if len(tokens) == 0:
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continue
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if tokens[0] == "initial":
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current_states = set()
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if not tempind:
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current_states.add(0)
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continue
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if tokens[0] == "final":
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constr_final = True
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if len(tokens) == 1:
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current_states = set(["final-%d" % i for i in range(0, num_steps+1)])
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constr_final_start = 0
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elif len(tokens) == 2:
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i = int(tokens[1])
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assert i < 0
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current_states = set(["final-%d" % i for i in range(-i, num_steps+1)])
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constr_final_start = -i if constr_final_start is None else min(constr_final_start, -i)
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else:
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assert 0
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continue
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if tokens[0] == "state":
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current_states = set()
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if not tempind:
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for token in tokens[1:]:
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tok = token.split(":")
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if len(tok) == 1:
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current_states.add(int(token))
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elif len(tok) == 2:
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lower = int(tok[0])
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if tok[1] == "*":
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upper = num_steps
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else:
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upper = int(tok[1])
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for i in range(lower, upper+1):
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current_states.add(i)
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else:
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assert 0
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continue
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if tokens[0] == "always":
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if len(tokens) == 1:
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current_states = set(range(0, num_steps+1))
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elif len(tokens) == 2:
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i = int(tokens[1])
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assert i < 0
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current_states = set(range(-i, num_steps+1))
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else:
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assert 0
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continue
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if tokens[0] == "assert":
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assert current_states is not None
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for state in current_states:
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constr_asserts[state].append(("%s:%d" % (fn, current_line), " ".join(tokens[1:])))
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continue
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if tokens[0] == "assume":
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assert current_states is not None
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for state in current_states:
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constr_assumes[state].append(("%s:%d" % (fn, current_line), " ".join(tokens[1:])))
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continue
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if tokens[0] == "write":
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constr_write.append(" ".join(tokens[1:]))
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continue
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if tokens[0] == "logic":
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so.logic = " ".join(tokens[1:])
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continue
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assert 0
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def get_constr_expr(db, state, final=False, getvalues=False):
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if final:
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if ("final-%d" % state) not in db:
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return ([], [], []) if getvalues else "true"
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else:
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if state not in db:
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return ([], [], []) if getvalues else "true"
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netref_regex = re.compile(r'(^|[( ])\[(-?[0-9]+:|)([^\]]*)\](?=[ )]|$)')
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def replace_netref(match):
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state_sel = match.group(2)
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if state_sel == "":
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st = state
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elif state_sel[0] == "-":
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st = state + int(state_sel[:-1])
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else:
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st = int(state_sel[:-1])
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expr = smt.net_expr(topmod, "s%d" % st, smt.get_path(topmod, match.group(3)))
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return match.group(1) + expr
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expr_list = list()
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for loc, expr in db[("final-%d" % state) if final else state]:
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actual_expr = netref_regex.sub(replace_netref, expr)
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if getvalues:
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expr_list.append((loc, expr, actual_expr))
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else:
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expr_list.append(actual_expr)
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if getvalues:
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loc_list, expr_list, acual_expr_list = zip(*expr_list)
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value_list = smt.get_list(acual_expr_list)
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return loc_list, expr_list, value_list
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if len(expr_list) == 0:
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return "true"
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if len(expr_list) == 1:
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return expr_list[0]
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return "(and %s)" % " ".join(expr_list)
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smt = SmtIo(opts=so)
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if noinfo and vcdfile is None and vlogtbfile is None and outconstr is None:
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smt.produce_models = False
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def print_msg(msg):
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print("%s %s" % (smt.timestamp(), msg))
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sys.stdout.flush()
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print_msg("Solver: %s" % (so.solver))
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with open(args[0], "r") as f:
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for line in f:
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smt.write(line)
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for line in constr_write:
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smt.write(line)
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if topmod is None:
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topmod = smt.topmod
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assert topmod is not None
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assert topmod in smt.modinfo
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if cexfile is not None:
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with open(cexfile, "r") as f:
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cex_regex = re.compile(r'([^\[@=]+)(\[\d+\])?([^@=]*)(@\d+)=([01])')
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for entry in f.read().split():
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match = cex_regex.match(entry)
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assert match
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name, bit, extra_name, step, val = match.group(1), match.group(2), match.group(3), match.group(4), match.group(5)
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if extra_name != "":
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continue
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if name not in smt.modinfo[topmod].inputs:
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continue
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if bit is None:
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bit = 0
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else:
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bit = int(bit[1:-1])
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step = int(step[1:])
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val = int(val)
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if smt.modinfo[topmod].wsize[name] == 1:
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assert bit == 0
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smtexpr = "(= [%s] %s)" % (name, "true" if val else "false")
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else:
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smtexpr = "(= ((_ extract %d %d) [%s]) #b%d)" % (bit, bit, name, val)
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# print("cex@%d: %s" % (step, smtexpr))
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constr_assumes[step].append((cexfile, smtexpr))
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def write_vcd_trace(steps_start, steps_stop, index):
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filename = vcdfile.replace("%", index)
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print_msg("Writing trace to VCD file: %s" % (filename))
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with open(filename, "w") as vcd_file:
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vcd = MkVcd(vcd_file)
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path_list = list()
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for netpath in sorted(smt.hiernets(topmod)):
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hidden_net = False
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for n in netpath:
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if n.startswith("$"):
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hidden_net = True
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if not hidden_net:
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vcd.add_net([topmod] + netpath, smt.net_width(topmod, netpath))
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path_list.append(netpath)
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for i in range(steps_start, steps_stop):
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vcd.set_time(i)
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value_list = smt.get_net_bin_list(topmod, path_list, "s%d" % i)
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for path, value in zip(path_list, value_list):
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vcd.set_net([topmod] + path, value)
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vcd.set_time(steps_stop)
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def write_vlogtb_trace(steps_start, steps_stop, index):
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filename = vlogtbfile.replace("%", index)
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print_msg("Writing trace to Verilog testbench: %s" % (filename))
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with open(filename, "w") as f:
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print("module testbench;", file=f)
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print(" reg [4095:0] vcdfile;", file=f)
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print(" reg clock = 0, genclock = 1;", file=f)
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primary_inputs = list()
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clock_inputs = set()
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for name in smt.modinfo[topmod].inputs:
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if name in ["clk", "clock", "CLK", "CLOCK"]:
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clock_inputs.add(name)
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width = smt.modinfo[topmod].wsize[name]
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primary_inputs.append((name, width))
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for name, width in primary_inputs:
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if name in clock_inputs:
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print(" wire [%d:0] PI_%s = clock;" % (width-1, name), file=f)
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else:
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print(" reg [%d:0] PI_%s;" % (width-1, name), file=f)
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print(" %s UUT (" % topmod, file=f)
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print(",\n".join(" .{name}(PI_{name})".format(name=name) for name, _ in primary_inputs), file=f)
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print(" );", file=f)
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print(" initial begin", file=f)
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print(" if ($value$plusargs(\"vcd=%s\", vcdfile)) begin", file=f)
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print(" $dumpfile(vcdfile);", file=f)
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print(" $dumpvars(0, testbench);", file=f)
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print(" end", file=f)
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print(" while (genclock) begin", file=f)
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print(" #5; clock = 0;", file=f)
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print(" #5; clock = 1;", file=f)
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print(" end", file=f)
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print(" end", file=f)
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print(" initial begin", file=f)
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regs = sorted(smt.hiernets(topmod, regs_only=True))
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regvals = smt.get_net_bin_list(topmod, regs, "s%d" % steps_start)
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print(" #1;", file=f)
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for reg, val in zip(regs, regvals):
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hidden_net = False
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for n in reg:
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if n.startswith("$"):
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hidden_net = True
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print(" %sUUT.%s = %d'b%s;" % ("// " if hidden_net else "", ".".join(reg), len(val), val), file=f)
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mems = sorted(smt.hiermems(topmod))
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for mempath in mems:
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abits, width, ports = smt.mem_info(topmod, "s%d" % steps_start, mempath)
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mem = smt.mem_expr(topmod, "s%d" % steps_start, mempath)
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addr_expr_list = list()
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for i in range(steps_start, steps_stop):
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for j in range(ports):
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addr_expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, j))
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addr_list = set()
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for val in smt.get_list(addr_expr_list):
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addr_list.add(smt.bv2int(val))
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expr_list = list()
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for i in addr_list:
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expr_list.append("(select %s #b%s)" % (mem, format(i, "0%db" % abits)))
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for i, val in zip(addr_list, smt.get_list(expr_list)):
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val = smt.bv2bin(val)
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print(" UUT.%s[%d] = %d'b%s;" % (".".join(mempath), i, len(val), val), file=f)
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for i in range(steps_start, steps_stop):
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pi_names = [[name] for name, _ in primary_inputs if name not in clock_inputs]
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pi_values = smt.get_net_bin_list(topmod, pi_names, "s%d" % i)
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print(" #1;", file=f)
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print(" // state %d" % i, file=f)
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if i > 0:
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print(" @(posedge clock);", file=f)
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for name, val in zip(pi_names, pi_values):
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print(" PI_%s <= %d'b%s;" % (".".join(name), len(val), val), file=f)
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print(" genclock = 0;", file=f)
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print(" end", file=f)
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print("endmodule", file=f)
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def write_constr_trace(steps_start, steps_stop, index):
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filename = outconstr.replace("%", index)
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print_msg("Writing trace to constraints file: %s" % (filename))
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with open(filename, "w") as f:
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primary_inputs = list()
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for name in smt.modinfo[topmod].inputs:
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width = smt.modinfo[topmod].wsize[name]
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primary_inputs.append((name, width))
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if steps_start == 0:
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print("initial", file=f)
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else:
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print("state %d" % steps_start, file=f)
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regnames = sorted(smt.hiernets(topmod, regs_only=True))
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regvals = smt.get_net_list(topmod, regnames, "s%d" % steps_start)
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for name, val in zip(regnames, regvals):
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print("assume (= [%s] %s)" % (".".join(name), val), file=f)
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mems = sorted(smt.hiermems(topmod))
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for mempath in mems:
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abits, width, ports = smt.mem_info(topmod, "s%d" % steps_start, mempath)
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mem = smt.mem_expr(topmod, "s%d" % steps_start, mempath)
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addr_expr_list = list()
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for i in range(steps_start, steps_stop):
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for j in range(ports):
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addr_expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, j))
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addr_list = set((smt.bv2int(val) for val in smt.get_list(addr_expr_list)))
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expr_list = list()
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for i in addr_list:
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expr_list.append("(select %s #b%s)" % (mem, format(i, "0%db" % abits)))
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for i, val in zip(addr_list, smt.get_list(expr_list)):
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print("assume (= (select [%s] #b%s) %s)" % (".".join(mempath), format(i, "0%db" % abits), val), file=f)
|
|
|
|
for k in range(steps_start, steps_stop):
|
|
print("", file=f)
|
|
print("state %d" % k, file=f)
|
|
|
|
pi_names = [[name] for name, _ in sorted(primary_inputs)]
|
|
pi_values = smt.get_net_list(topmod, pi_names, "s%d" % k)
|
|
|
|
for name, val in zip(pi_names, pi_values):
|
|
print("assume (= [%s] %s)" % (".".join(name), val), file=f)
|
|
|
|
|
|
def write_trace(steps_start, steps_stop, index):
|
|
if vcdfile is not None:
|
|
write_vcd_trace(steps_start, steps_stop, index)
|
|
|
|
if vlogtbfile is not None:
|
|
write_vlogtb_trace(steps_start, steps_stop, index)
|
|
|
|
if outconstr is not None:
|
|
write_constr_trace(steps_start, steps_stop, index)
|
|
|
|
|
|
def print_failed_asserts_worker(mod, state, path):
|
|
assert mod in smt.modinfo
|
|
|
|
if smt.get("(|%s_a| %s)" % (mod, state)) in ["true", "#b1"]:
|
|
return
|
|
|
|
for cellname, celltype in smt.modinfo[mod].cells.items():
|
|
print_failed_asserts_worker(celltype, "(|%s_h %s| %s)" % (mod, cellname, state), path + "." + cellname)
|
|
|
|
for assertfun, assertinfo in smt.modinfo[mod].asserts.items():
|
|
if smt.get("(|%s| %s)" % (assertfun, state)) in ["false", "#b0"]:
|
|
print_msg("Assert failed in %s: %s" % (path, assertinfo))
|
|
|
|
|
|
def print_failed_asserts(state, final=False):
|
|
if noinfo: return
|
|
loc_list, expr_list, value_list = get_constr_expr(constr_asserts, state, final=final, getvalues=True)
|
|
|
|
for loc, expr, value in zip(loc_list, expr_list, value_list):
|
|
if smt.bv2int(value) == 0:
|
|
print_msg("Assert %s failed: %s" % (loc, expr))
|
|
|
|
if not final:
|
|
print_failed_asserts_worker(topmod, "s%d" % state, topmod)
|
|
|
|
|
|
def print_anyconsts_worker(mod, state, path):
|
|
assert mod in smt.modinfo
|
|
|
|
for cellname, celltype in smt.modinfo[mod].cells.items():
|
|
print_anyconsts_worker(celltype, "(|%s_h %s| %s)" % (mod, cellname, state), path + "." + cellname)
|
|
|
|
for fun, info in smt.modinfo[mod].anyconsts.items():
|
|
print_msg("Value for anyconst in %s (%s): %d" % (path, info, smt.bv2int(smt.get("(|%s| %s)" % (fun, state)))))
|
|
|
|
|
|
def print_anyconsts(state):
|
|
if noinfo: return
|
|
print_anyconsts_worker(topmod, "s%d" % state, topmod)
|
|
|
|
|
|
if tempind:
|
|
retstatus = False
|
|
skip_counter = step_size
|
|
for step in range(num_steps, -1, -1):
|
|
smt.write("(declare-fun s%d () |%s_s|)" % (step, topmod))
|
|
smt.write("(assert (|%s_u| s%d))" % (topmod, step))
|
|
smt.write("(assert (|%s_h| s%d))" % (topmod, step))
|
|
smt.write("(assert (not (|%s_is| s%d)))" % (topmod, step))
|
|
smt.write("(assert %s)" % get_constr_expr(constr_assumes, step))
|
|
|
|
if step == num_steps:
|
|
smt.write("(assert (not (and (|%s_a| s%d) %s)))" % (topmod, step, get_constr_expr(constr_asserts, step)))
|
|
|
|
else:
|
|
smt.write("(assert (|%s_t| s%d s%d))" % (topmod, step, step+1))
|
|
smt.write("(assert (|%s_a| s%d))" % (topmod, step))
|
|
smt.write("(assert %s)" % get_constr_expr(constr_asserts, step))
|
|
|
|
if step > num_steps-skip_steps:
|
|
print_msg("Skipping induction in step %d.." % (step))
|
|
continue
|
|
|
|
skip_counter += 1
|
|
if skip_counter < step_size:
|
|
print_msg("Skipping induction in step %d.." % (step))
|
|
continue
|
|
|
|
skip_counter = 0
|
|
print_msg("Trying induction in step %d.." % (step))
|
|
|
|
if smt.check_sat() == "sat":
|
|
if step == 0:
|
|
print("%s Temporal induction failed!" % smt.timestamp())
|
|
print_anyconsts(num_steps)
|
|
print_failed_asserts(num_steps)
|
|
write_trace(step, num_steps+1, '%')
|
|
|
|
elif dumpall:
|
|
print_anyconsts(num_steps)
|
|
print_failed_asserts(num_steps)
|
|
write_trace(step, num_steps+1, "%d" % step)
|
|
|
|
else:
|
|
print("%s Temporal induction successful." % smt.timestamp())
|
|
retstatus = True
|
|
break
|
|
|
|
|
|
else: # not tempind
|
|
step = 0
|
|
retstatus = True
|
|
while step < num_steps:
|
|
smt.write("(declare-fun s%d () |%s_s|)" % (step, topmod))
|
|
smt.write("(assert (|%s_u| s%d))" % (topmod, step))
|
|
smt.write("(assert (|%s_h| s%d))" % (topmod, step))
|
|
smt.write("(assert %s)" % get_constr_expr(constr_assumes, step))
|
|
|
|
if step == 0:
|
|
smt.write("(assert (|%s_i| s0))" % (topmod))
|
|
smt.write("(assert (|%s_is| s0))" % (topmod))
|
|
|
|
else:
|
|
smt.write("(assert (|%s_t| s%d s%d))" % (topmod, step-1, step))
|
|
smt.write("(assert (not (|%s_is| s%d)))" % (topmod, step))
|
|
|
|
if step < skip_steps:
|
|
if assume_skipped is not None and step >= assume_skipped:
|
|
print_msg("Skipping step %d (and assuming pass).." % (step))
|
|
smt.write("(assert (|%s_a| s%d))" % (topmod, step))
|
|
smt.write("(assert %s)" % get_constr_expr(constr_asserts, step))
|
|
else:
|
|
print_msg("Skipping step %d.." % (step))
|
|
step += 1
|
|
continue
|
|
|
|
last_check_step = step
|
|
for i in range(1, step_size):
|
|
if step+i < num_steps:
|
|
smt.write("(declare-fun s%d () |%s_s|)" % (step+i, topmod))
|
|
smt.write("(assert (|%s_u| s%d))" % (topmod, step+i))
|
|
smt.write("(assert (|%s_h| s%d))" % (topmod, step+i))
|
|
smt.write("(assert (|%s_t| s%d s%d))" % (topmod, step+i-1, step+i))
|
|
smt.write("(assert %s)" % get_constr_expr(constr_assumes, step+i))
|
|
last_check_step = step+i
|
|
|
|
if not gentrace:
|
|
if not final_only:
|
|
if last_check_step == step:
|
|
print_msg("Checking asserts in step %d.." % (step))
|
|
else:
|
|
print_msg("Checking asserts in steps %d to %d.." % (step, last_check_step))
|
|
smt.write("(push 1)")
|
|
|
|
smt.write("(assert (not (and %s)))" % " ".join(["(|%s_a| s%d)" % (topmod, i) for i in range(step, last_check_step+1)] +
|
|
[get_constr_expr(constr_asserts, i) for i in range(step, last_check_step+1)]))
|
|
|
|
if smt.check_sat() == "sat":
|
|
print("%s BMC failed!" % smt.timestamp())
|
|
print_anyconsts(step)
|
|
for i in range(step, last_check_step+1):
|
|
print_failed_asserts(i)
|
|
write_trace(0, last_check_step+1, '%')
|
|
retstatus = False
|
|
break
|
|
|
|
smt.write("(pop 1)")
|
|
|
|
if (constr_final_start is not None) or (last_check_step+1 != num_steps):
|
|
for i in range(step, last_check_step+1):
|
|
smt.write("(assert (|%s_a| s%d))" % (topmod, i))
|
|
smt.write("(assert %s)" % get_constr_expr(constr_asserts, i))
|
|
|
|
if constr_final_start is not None:
|
|
for i in range(step, last_check_step+1):
|
|
if i < constr_final_start:
|
|
continue
|
|
|
|
print_msg("Checking final constraints in step %d.." % (i))
|
|
smt.write("(push 1)")
|
|
|
|
smt.write("(assert %s)" % get_constr_expr(constr_assumes, i, final=True))
|
|
smt.write("(assert (not %s))" % get_constr_expr(constr_asserts, i, final=True))
|
|
|
|
if smt.check_sat() == "sat":
|
|
print("%s BMC failed!" % smt.timestamp())
|
|
print_anyconsts(i)
|
|
print_failed_asserts(i, final=True)
|
|
write_trace(0, i+1, '%')
|
|
retstatus = False
|
|
break
|
|
|
|
smt.write("(pop 1)")
|
|
if not retstatus:
|
|
break
|
|
|
|
else: # gentrace
|
|
for i in range(step, last_check_step+1):
|
|
smt.write("(assert (|%s_a| s%d))" % (topmod, i))
|
|
smt.write("(assert %s)" % get_constr_expr(constr_asserts, i))
|
|
|
|
print_msg("Solving for step %d.." % (last_check_step))
|
|
if smt.check_sat() != "sat":
|
|
print("%s No solution found!" % smt.timestamp())
|
|
retstatus = False
|
|
break
|
|
|
|
elif dumpall:
|
|
print_anyconsts(0)
|
|
write_trace(0, last_check_step+1, "%d" % step)
|
|
|
|
step += step_size
|
|
|
|
if gentrace:
|
|
print_anyconsts(0)
|
|
write_trace(0, num_steps, '%')
|
|
|
|
|
|
smt.write("(exit)")
|
|
smt.wait()
|
|
|
|
print_msg("Status: %s" % ("PASSED" if retstatus else "FAILED (!)"))
|
|
sys.exit(0 if retstatus else 1)
|