63 lines
1.9 KiB
C++
63 lines
1.9 KiB
C++
#ifndef IO_MAP_H
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#define IO_MAP_H
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/********************************************************************
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* Include header files required by the data structure definition
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*******************************************************************/
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#include "io_map_fwd.h"
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#include "openfpga_port.h"
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#include "vtr_vector.h"
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/* Begin namespace openfpga */
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namespace openfpga {
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/********************************************************************
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* This is a data structure storing io mapping information
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* - the net-to-I/O mapping
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* - each I/O directionality
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*******************************************************************/
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class IoMap {
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public: /* Types and ranges */
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enum e_direction {
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IO_MAP_DIR_INPUT,
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IO_MAP_DIR_OUTPUT,
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NUM_IO_MAP_DIR_TYPES
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};
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typedef vtr::vector<IoMapId, IoMapId>::const_iterator io_map_iterator;
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typedef vtr::Range<io_map_iterator> io_map_range;
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public: /* Public aggregators */
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/* Find all io mapping */
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io_map_range io_map() const;
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/* Get the port of the io that is mapped */
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BasicPort io_port(IoMapId io_map_id) const;
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/* Get the net of the io that is mapped to */
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BasicPort io_net(IoMapId io_map_id) const;
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/* Query on if an io is configured as an input */
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bool is_io_input(IoMapId io_map_id) const;
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/* Query on if an io is configured as an output */
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bool is_io_output(IoMapId io_map_id) const;
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public: /* Public mutators */
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/* Create a new I/O mapping */
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IoMapId create_io_mapping(const BasicPort& port, const BasicPort& net,
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e_direction dir);
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public: /* Public validators/invalidators */
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bool valid_io_map_id(IoMapId io_map_id) const;
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private: /* Internal Data */
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vtr::vector<IoMapId, IoMapId> io_map_ids_;
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vtr::vector<IoMapId, BasicPort> io_ports_;
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vtr::vector<IoMapId, BasicPort> mapped_nets_;
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vtr::vector<IoMapId, e_direction> io_directionality_;
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};
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} /* End namespace openfpga*/
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#endif
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