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OpenFPGA/abc_with_bb_support/JAMIESON_TESTS
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Xifan Tang fe13168f8f Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
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logsyn_techmap4.script Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
logsyn_techmap4_mini.script Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
lut_lib4.txt Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
mini_example1.4.blif Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
mini_example1.blif Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
mini_example2.4.blif Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
mini_example2.blif Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
sample.blif Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
sample2.blif Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
sample3.blif Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00
sample4.blif Add ABC and ACE2, fix bugs for fpga_flow and VPR 2018-07-27 22:54:52 -06:00