2606 lines
56 KiB
Plaintext
2606 lines
56 KiB
Plaintext
# Benchmark "tseng" written by ABC on Tue Mar 12 09:44:40 2019
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.model tseng
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.inputs clock tin_pv10_4_4_ tin_pv11_4_4_ tin_pv6_7_7_ tin_pv2_0_0_ \
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tin_pv10_3_3_ tin_pv1_2_2_ tin_pv11_3_3_ tin_pv4_3_3_ tin_pv10_2_2_ \
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tin_pv11_2_2_ tin_pv6_0_0_ tin_pv2_1_1_ tin_pv10_1_1_ tin_pv1_3_3_ \
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preset_0_0_ tin_pv11_1_1_ tin_pv4_4_4_ tin_pready_0_0_ tin_pv10_0_0_ \
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tin_pv11_0_0_ tin_pv6_1_1_ tin_pv2_2_2_ tin_pv1_4_4_ tin_pv4_5_5_ \
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tin_pv6_2_2_ tin_pv2_3_3_ tin_pv1_5_5_ tin_pv4_6_6_ tin_pv6_3_3_ \
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tin_pv2_4_4_ tin_pv1_6_6_ tin_pv4_7_7_ tin_pv6_4_4_ tin_pv2_5_5_ \
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tin_pv1_7_7_ tin_pv4_0_0_ tin_pv6_5_5_ tin_pv2_6_6_ tin_pv10_7_7_ \
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tin_pv1_0_0_ tin_pv11_7_7_ tin_pv4_1_1_ tin_pv10_6_6_ tin_pv11_6_6_ \
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tin_pv6_6_6_ tin_pv2_7_7_ preset tin_pv10_5_5_ tin_pv1_1_1_ tin_pv11_5_5_ \
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tin_pv4_2_2_
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.outputs pv14_2_2_ pv12_3_3_ pv10_4_4_ pv7_5_5_ pv3_6_6_ pv15_2_2_ \
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pv13_3_3_ pv11_4_4_ pv6_7_7_ pv2_0_0_ pv14_1_1_ pv12_2_2_ pv10_3_3_ \
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pv9_0_0_ pv5_1_1_ pv1_2_2_ pv15_1_1_ pv13_2_2_ pv11_3_3_ pv8_2_2_ pv4_3_3_ \
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pv14_0_0_ pv12_1_1_ pv10_2_2_ pv7_6_6_ pv3_7_7_ pv15_0_0_ pv13_1_1_ \
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pv11_2_2_ pv6_0_0_ pv2_1_1_ pv12_0_0_ pv10_1_1_ pv9_1_1_ pv5_2_2_ pv1_3_3_ \
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pv13_0_0_ pv11_1_1_ pv8_3_3_ pv4_4_4_ pready_0_0_ pv10_0_0_ pv7_7_7_ \
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pv3_0_0_ pv11_0_0_ pv6_1_1_ pv2_2_2_ pv9_2_2_ pv5_3_3_ pv1_4_4_ pv8_4_4_ \
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pv4_5_5_ pv7_0_0_ pv3_1_1_ pv6_2_2_ pv2_3_3_ pv9_3_3_ pv5_4_4_ pv1_5_5_ \
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pv8_5_5_ pv4_6_6_ pv7_1_1_ pv3_2_2_ pv6_3_3_ pv2_4_4_ pv9_4_4_ pv5_5_5_ \
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pv1_6_6_ pv8_6_6_ pv4_7_7_ pv7_2_2_ pv3_3_3_ pv6_4_4_ pv2_5_5_ pv14_7_7_ \
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pv9_5_5_ pv5_6_6_ pv1_7_7_ pv15_7_7_ pv8_7_7_ pv4_0_0_ pv14_6_6_ pv12_7_7_ \
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pv7_3_3_ pv3_4_4_ pv15_6_6_ pv13_7_7_ pv6_5_5_ pv2_6_6_ pdn pv14_5_5_ \
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pv12_6_6_ pv10_7_7_ pv9_6_6_ pv5_7_7_ pv1_0_0_ pv15_5_5_ pv13_6_6_ \
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pv11_7_7_ pv8_0_0_ pv4_1_1_ pv14_4_4_ pv12_5_5_ pv10_6_6_ pv7_4_4_ \
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pv3_5_5_ pv15_4_4_ pv13_5_5_ pv11_6_6_ pv6_6_6_ pv2_7_7_ pv14_3_3_ \
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pv12_4_4_ pv10_5_5_ pv9_7_7_ pv5_0_0_ pv1_1_1_ pv15_3_3_ pv13_4_4_ \
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pv11_5_5_ pv8_1_1_ pv4_2_2_
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.latch n349_1 pdn re clock 0
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.latch n353 n_n4142 re clock 0
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.latch n358 n_n3936 re clock 0
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.latch n363 n_n3574 re clock 0
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.latch n368 n_n3008 re clock 0
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.latch n373 n_n3726 re clock 0
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.latch n378 n_n3604 re clock 0
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.latch n383 n_n3144 re clock 0
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.latch n388 n_n3782 re clock 0
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.latch n393 n_n3067 re clock 0
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.latch n398 n_n4258 re clock 0
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.latch n403 n_n3225 re clock 0
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.latch n408 n_n3180 re clock 0
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.latch n413 n_n3274 re clock 0
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.latch n418 n_n3475 re clock 0
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.latch n423 n_n3687 re clock 0
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.latch n428 n_n3381 re clock 0
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.latch n433 n_n3098 re clock 0
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.latch n438 n_n4108 re clock 0
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.latch n443 n_n3497 re clock 0
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.latch n448 n_n3793 re clock 0
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.latch n453 n_n4316 re clock 0
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.latch n458 n_n4349 re clock 0
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.latch n463 n_n3029 re clock 0
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.latch n468 n_n3619 re clock 0
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.latch n473 n_n3264 re clock 0
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.latch n478 n_n3780 re clock 0
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.latch n483 ndn3_4 re clock 0
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.latch n488 n_n4114 re clock 0
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.latch n493 n_n3146 re clock 0
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.latch n498 n_n3511 re clock 0
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.latch n503 n_n3152 re clock 0
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.latch n508 n_n3833 re clock 0
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.latch n513 n_n4282 re clock 0
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.latch n518 n_n3305 re clock 0
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.latch n523 n_n4392 re clock 0
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.latch n528 n_n4224 re clock 0
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.latch n533 n_n3198 re clock 0
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.latch n538 n_n3204 re clock 0
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.latch n543 n_n3024 re clock 0
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.latch n548 n_n4139 re clock 0
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.latch n553 ndn3_15 re clock 0
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.latch n558 n_n3133 re clock 0
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.latch n563 n_n4074 re clock 0
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.latch n568 n_n3270 re clock 0
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.latch n573 n_n3858 re clock 0
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.latch n578 n_n3456 re clock 0
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.latch n583 n_n3521 re clock 0
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.latch n588 n_n3081 re clock 0
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.latch n593 n_n4381 re clock 0
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.latch n598 n_n3670 re clock 0
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.latch n603 n_n4211 re clock 0
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.latch n608 n_n3493 re clock 0
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.latch n613 n_n3495 re clock 0
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.latch n618 n_n3916 re clock 0
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.latch n623 n_n3195 re clock 0
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.latch n628 n_n3525 re clock 0
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.latch n633 n_n3729 re clock 0
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.latch n638 n_n3876 re clock 0
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.latch n643 ndn3_5 re clock 0
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.latch n648 n_n3549 re clock 0
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.latch n653 n_n3489 re clock 0
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.latch n658 n_n3764 re clock 0
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.latch n663 n_n3281 re clock 0
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.latch n668 n_n3707 re clock 0
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.latch n673 n_n3517 re clock 0
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.latch n678 n_n4160 re clock 0
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.latch n683 n_n4222 re clock 0
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.latch n688 n_n3012 re clock 0
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.latch n693 n_n4071 re clock 0
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.latch n698 n_n3372 re clock 0
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.latch n703 n_n3344 re clock 0
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.latch n708 n_n3688 re clock 0
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.latch n713 n_n3079 re clock 0
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.latch n718 n_n3313 re clock 0
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.latch n723 n_n3411 re clock 0
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.latch n728 n_n3231 re clock 0
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.latch n733 n_n3396 re clock 0
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.latch n738 n_n3432 re clock 0
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.latch n743 n_n3606 re clock 0
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.latch n748 n_n3733 re clock 0
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.latch n753 n_n3556 re clock 0
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.latch n758 n_n4040 re clock 0
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.latch n763 n_n3120 re clock 0
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.latch n768 n_n3221 re clock 0
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.latch n773 n_n3173 re clock 0
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.latch n778 n_n3851 re clock 0
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.latch n783 n_n3113 re clock 0
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.latch n788 n_n3242 re clock 0
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.latch n793 n_n3118 re clock 0
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.latch n798 n_n3376 re clock 0
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.latch n803 n_n4089 re clock 0
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.latch n808 n_n3044 re clock 0
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.latch n813 n_n3627 re clock 0
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.latch n818 n_n3035 re clock 0
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.latch n823 n_n3111 re clock 0
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.latch n828 n_n3321 re clock 0
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.latch n833 n_n3443 re clock 0
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.latch n838 n_n3215 re clock 0
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.latch n843 ndn3_10 re clock 0
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.latch n848 n_n4172 re clock 0
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.latch n853 nlc1_2 re clock 0
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.latch n858 n_n3590 re clock 0
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.latch n863 n_n4110 re clock 0
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.latch n868 n_n3576 re clock 0
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.latch n873 n_n4129 re clock 0
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.latch n878 n_n4189 re clock 0
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.latch n883 n_n4286 re clock 0
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.latch n888 n_n4383 re clock 0
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.latch n893 n_n3567 re clock 0
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.latch n898_1 n_n3892 re clock 0
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.latch n903_1 n_n3075 re clock 0
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.latch n908_1 n_n3354 re clock 0
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.latch n913_1 n_n3465 re clock 0
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.latch n918_1 ndn3_6 re clock 0
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.latch n923_1 n_n3617 re clock 0
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.latch n928_1 n_n4162 re clock 0
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.latch n933_1 n_n3207 re clock 0
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.latch n938_1 n_n4120 re clock 0
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.latch n943_1 n_n3065 re clock 0
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.latch n948_1 n_n4005 re clock 0
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.latch n953_1 n_n3266 re clock 0
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.latch n958_1 n_n4337 re clock 0
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.latch n963_1 n_n3600 re clock 0
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.latch n968_1 n_n3415 re clock 0
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.latch n973_1 n_n4243 re clock 0
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.latch n978_1 n_n3872 re clock 0
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.latch n983_1 n_n3648 re clock 0
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.latch n988_1 n_n3358 re clock 0
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.latch n993_1 n_n3350 re clock 0
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.latch n998_1 ndn3_7 re clock 0
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.latch n1003_1 n_n3116 re clock 0
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.latch n1008_1 n_n3583 re clock 0
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.latch n1013_1 n_n3906 re clock 0
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.latch n1018_1 n_n4131 re clock 0
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.latch n1023_1 n_n3316 re clock 0
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.latch n1028_1 n_n3061 re clock 0
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.latch n1033_1 n_n3048 re clock 0
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.latch n1038_1 n_n3886 re clock 0
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.latch n1043_1 n_n3919 re clock 0
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.latch n1048_1 n_n3128 re clock 0
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.latch n1053_1 n_n3995 re clock 0
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.latch n1058_1 n_n4213 re clock 0
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.latch n1063_1 n_n3761 re clock 0
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.latch n1068_1 ndn3_8 re clock 0
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.latch n1073_1 n_n3252 re clock 0
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.latch n1078_1 n_n4366 re clock 0
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.latch n1083_1 n_n3328 re clock 0
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.latch n1088_1 n_n3988 re clock 0
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.latch n1093_1 n_n3348 re clock 0
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.latch n1098_1 n_n3544 re clock 0
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.latch n1103_1 n_n3101 re clock 0
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.latch n1108_1 n_n4279 re clock 0
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.latch n1113_1 n_n3896 re clock 0
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.latch n1118_1 n_n3736 re clock 0
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.latch n1123_1 n_n4251 re clock 0
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.latch n1128_1 n_n3650 re clock 0
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.latch n1133_1 n_n3307 re clock 0
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.latch n1138_1 n_n4294 re clock 0
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.latch n1143_1 n_n4334 re clock 0
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.latch n1148_1 n_n3955 re clock 0
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.latch n1153_1 n_n4164 re clock 0
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.latch n1158_1 n_n3155 re clock 0
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.latch n1163_1 n_n3749 re clock 0
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.latch n1168_1 n_n4233 re clock 0
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.latch n1173_1 n_n4347 re clock 0
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.latch n1178_1 n_n3826 re clock 0
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.latch n1183_1 n_n3360 re clock 0
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.latch n1188_1 n_n3458 re clock 0
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.latch n1193_1 n_n3093 re clock 0
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.latch n1198_1 n_n3157 re clock 0
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.latch n1203_1 n_n3506 re clock 0
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.latch n1208_1 n_n3161 re clock 0
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.latch n1213_1 n_n3319 re clock 0
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.latch n1218_1 n_n3429 re clock 0
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.latch n1223_1 n_n3971 re clock 0
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.latch n1228_1 n_n3449 re clock 0
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.latch n1233_1 n_n4270 re clock 0
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.latch n1238_1 n_n4288 re clock 0
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.latch n1243_1 n_n3183 re clock 0
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.latch n1248_1 n_n3130 re clock 0
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.latch n1253_1 n_n4047 re clock 0
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.latch n1258 n_n3978 re clock 0
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.latch n1263_1 n_n3239 re clock 0
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.latch n1268_1 n_n4145 re clock 0
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.latch n1273_1 n_n3890 re clock 0
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.latch n1278_1 n_n4003 re clock 0
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.latch n1283_1 n_n3091 re clock 0
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.latch n1288_1 n_n3985 re clock 0
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.latch n1293_1 n_n3326 re clock 0
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.latch n1298_1 n_n4052 re clock 0
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.latch n1303_1 nsr4_2 re clock 0
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.latch n1308_1 n_n4099 re clock 0
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.latch n1313_1 n_n4375 re clock 0
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.latch n1318_1 n_n4067 re clock 0
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.latch n1323_1 n_n4290 re clock 0
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.latch n1328_1 n_n3898 re clock 0
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.latch n1333_1 n_n4122 re clock 0
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.latch n1338_1 n_n3774 re clock 0
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.latch n1343_1 n_n3014 re clock 0
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.latch n1348_1 n_n4241 re clock 0
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.latch n1353_1 n_n3952 re clock 0
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.latch n1358_1 n_n3237 re clock 0
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.latch n1363_1 n_n3968 re clock 0
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.latch n1368_1 n_n3922 re clock 0
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.latch n1373_1 n_n3551 re clock 0
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.latch n1378_1 n_n3379 re clock 0
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.latch n1383_1 n_n4275 re clock 0
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.latch n1388_1 n_n3570 re clock 0
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.latch n1393_1 n_n3854 re clock 0
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.latch n1398_1 n_n4057 re clock 0
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.latch n1403_1 n_n3451 re clock 0
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.latch n1408_1 n_n4037 re clock 0
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.latch n1413_1 n_n3408 re clock 0
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.latch n1418_1 n_n4229 re clock 0
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.latch n1423_1 n_n4201 re clock 0
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.latch n1428_1 n_n3339 re clock 0
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.latch n1433_1 n_n4362 re clock 0
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.latch n1438_1 n_n3483 re clock 0
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.latch n1443_1 n_n3557 re clock 0
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.latch n1448_1 n_n4185 re clock 0
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.latch n1453_1 n_n3069 re clock 0
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.latch n1458_1 n_n3643 re clock 0
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.latch n1463_1 n_n3404 re clock 0
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.latch n1468_1 n_n3057 re clock 0
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.latch n1473_1 n_n3020 re clock 0
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.latch n1478_1 n_n3828 re clock 0
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.latch n1483_1 n_n3631 re clock 0
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.latch n1488_1 n_n3138 re clock 0
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.latch n1493_1 nsr1_2 re clock 0
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.latch n1498_1 n_n4065 re clock 0
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.latch n1503_1 n_n3679 re clock 0
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.latch n1508_1 n_n3287 re clock 0
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.latch n1513_1 n_n4351 re clock 0
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.latch n1518_1 n_n4059 re clock 0
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.latch n1523_1 n_n3436 re clock 0
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.latch n1528_1 nen3_10 re clock 0
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.latch n1533_1 n_n3461 re clock 0
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.latch n1538_1 n_n4012 re clock 0
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.latch n1543_1 n_n3051 re clock 0
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.latch n1548_1 n_n3073 re clock 0
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.latch n1553_1 n_n3777 re clock 0
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.latch n1558_1 n_n3709 re clock 0
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.latch n1563_1 n_n3946 re clock 0
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.latch n1568_1 n_n3085 re clock 0
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.latch n1573_1 n_n3259 re clock 0
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.latch n1578_1 n_n3504 re clock 0
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.latch n1583_1 n_n4045 re clock 0
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.latch n1588_1 n_n3954 re clock 0
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.latch n1593_1 n_n3136 re clock 0
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.latch n1598_1 n_n4372 re clock 0
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.latch n1603_1 n_n4236 re clock 0
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.latch n1608_1 n_n3040 re clock 0
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.latch n1613_1 n_n3874 re clock 0
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.latch n1618_1 n_n3999 re clock 0
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.latch n1623_1 n_n3223 re clock 0
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.latch n1628_1 ndn1_34 re clock 0
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.latch n1633_1 n_n3743 re clock 0
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.latch n1638_1 n_n3657 re clock 0
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.latch n1643_1 n_n3213 re clock 0
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.latch n1648_1 n_n3095 re clock 0
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.latch n1653_1 n_n3663 re clock 0
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.latch n1658_1 n_n3724 re clock 0
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.latch n1663_1 n_n3038 re clock 0
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.latch n1668_1 n_n3370 re clock 0
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.latch n1673_1 n_n3624 re clock 0
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.latch n1678_1 n_n3578 re clock 0
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.latch n1683_1 n_n3713 re clock 0
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.latch n1688_1 n_n3089 re clock 0
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.latch n1693_1 n_n3211 re clock 0
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.latch n1698_1 n_n3367 re clock 0
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.latch n1703_1 n_n3434 re clock 0
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.latch n1708_1 n_n3126 re clock 0
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.latch n1713_1 n_n4192 re clock 0
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.latch n1718_1 n_n4136 re clock 0
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.latch n1723_1 n_n3053 re clock 0
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.latch n1728_1 n_n3938 re clock 0
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.latch n1733_1 n_n3769 re clock 0
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.latch n1738_1 n_n4390 re clock 0
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.latch n1743_1 nsr3_17 re clock 0
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.latch n1748_1 n_n3903 re clock 0
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.latch n1753_1 n_n3658 re clock 0
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.latch n1758_1 nrq3_11 re clock 0
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.latch n1763_1 n_n3818 re clock 0
|
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.latch n1768_1 n_n3533 re clock 0
|
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.latch n1773_1 n_n3463 re clock 0
|
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.latch n1778_1 n_n3175 re clock 0
|
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.latch n1783_1 n_n3055 re clock 0
|
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.latch n1788_1 n_n3202 re clock 0
|
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.latch n1793_1 n_n3385 re clock 0
|
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.latch n1798_1 n_n4077 re clock 0
|
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.latch n1803_1 n_n3142 re clock 0
|
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.latch n1808_1 n_n3901 re clock 0
|
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.latch n1813_1 n_n3934 re clock 0
|
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.latch n1818_1 n_n3823 re clock 0
|
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.latch n1823_1 n_n3722 re clock 0
|
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.latch n1828_1 n_n4309 re clock 0
|
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.latch n1833_1 n_n4159 re clock 0
|
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.latch n1838_1 n_n4330 re clock 0
|
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.latch n1843_1 n_n3836 re clock 0
|
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.latch n1848_1 n_n3470 re clock 0
|
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.latch n1853_1 n_n3331 re clock 0
|
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.latch n1858_1 n_n3883 re clock 0
|
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.latch n1863_1 n_n4299 re clock 0
|
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.latch n1868_1 n_n4157 re clock 0
|
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.latch n1873_1 ndn3_9 re clock 0
|
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.latch n1878_1 n_n3208 re clock 0
|
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.latch n1883_1 n_n3190 re clock 0
|
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.latch n1888_1 n_n4029 re clock 0
|
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.latch n1893_1 n_n3042 re clock 0
|
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.latch n1898_1 nsr3_14 re clock 0
|
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.latch n1903_1 n_n4151 re clock 0
|
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.latch n1908_1 n_n3188 re clock 0
|
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.latch n1913_1 n_n4303 re clock 0
|
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.latch n1918_1 n_n3250 re clock 0
|
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.latch n1923_1 n_n3170 re clock 0
|
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.latch n1928_1 n_n3758 re clock 0
|
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.latch n1933_1 n_n3910 re clock 0
|
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.latch n1938_1 n_n3108 re clock 0
|
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.latch n1943_1 n_n3150 re clock 0
|
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.latch n1948_1 n_n4320 re clock 0
|
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.latch n1953_1 n_n4360 re clock 0
|
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.latch n1958_1 n_n4247 re clock 0
|
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.latch n1963_1 n_n4199 re clock 0
|
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.latch n1968_1 n_n3966 re clock 0
|
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.latch n1973_1 n_n3766 re clock 0
|
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.latch n1978_1 n_n4021 re clock 0
|
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.latch n1983_1 n_n4062 re clock 0
|
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.latch n1988_1 n_n3514 re clock 0
|
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.latch n1993_1 n_n3572 re clock 0
|
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.latch n1998_1 n_n4166 re clock 0
|
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.latch n2003_1 n_n3976 re clock 0
|
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.latch n2008_1 n_n3394 re clock 0
|
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.latch n2013_1 n_n4095 re clock 0
|
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.latch n2018_1 n_n3863 re clock 0
|
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.latch n2023_1 n_n3720 re clock 0
|
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.latch n2028_1 ngfdn_3 re clock 0
|
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.latch n2033_1 n_n3756 re clock 0
|
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.latch n2038_1 n_n3667 re clock 0
|
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.latch n2043_1 n_n3342 re clock 0
|
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.latch n2048_1 n_n3529 re clock 0
|
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.latch n2053_1 n_n4209 re clock 0
|
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.latch n2058_1 n_n4324 re clock 0
|
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.latch n2063_1 n_n3337 re clock 0
|
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.latch n2068_1 n_n4227 re clock 0
|
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.latch n2073_1 n_n4153 re clock 0
|
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.latch n2078_1 n_n3831 re clock 0
|
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.latch n2083_1 n_n3233 re clock 0
|
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.latch n2088_1 n_n3413 re clock 0
|
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.latch n2093_1 n_n4182 re clock 0
|
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.latch n2098 n_n3841 re clock 0
|
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.latch n2103_1 n_n3441 re clock 0
|
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.latch n2108_1 n_n4026 re clock 0
|
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.latch n2113_1 n_n4342 re clock 0
|
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.latch n2118_1 n_n4102 re clock 0
|
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.latch n2123_1 n_n3277 re clock 0
|
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.latch n2128_1 n_n4180 re clock 0
|
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.latch n2133_1 n_n3878 re clock 0
|
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.latch n2138_1 n_n3931 re clock 0
|
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.latch n2143_1 n_n3845 re clock 0
|
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.latch n2148_1 n_n3865 re clock 0
|
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.latch n2153_1 n_n3486 re clock 0
|
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.latch n2158_1 n_n4056 re clock 0
|
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.latch n2163_1 n_n3674 re clock 0
|
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.latch n2168_1 n_n3959 re clock 0
|
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.latch n2173_1 n_n3608 re clock 0
|
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.latch n2178_1 n_n4080 re clock 0
|
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.latch n2183_1 n_n4018 re clock 0
|
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.latch n2188_1 n_n4354 re clock 0
|
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.latch n2193_1 n_n3797 re clock 0
|
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.latch n2198_1 n_n3739 re clock 0
|
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.latch n2203_1 n_n3646 re clock 0
|
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.latch n2208_1 n_n3099 re clock 0
|
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.latch n2213_1 n_n3537 re clock 0
|
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.latch n2218_1 n_n3806 re clock 0
|
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.latch n2223_1 n_n3087 re clock 0
|
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.latch n2228_1 n_n4105 re clock 0
|
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.latch n2233_1 n_n3262 re clock 0
|
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.latch n2238_1 n_n4125 re clock 0
|
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.latch n2243_1 n_n3814 re clock 0
|
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.latch n2248_1 n_n4093 re clock 0
|
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.latch n2253_1 nsr3_3 re clock 0
|
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|
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.names n_n3042 tin_pv10_4_4_ n_n4136 pv10_4_4_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4120 tin_pv11_4_4_ n_n3966 pv11_4_4_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4164 tin_pv6_7_7_ n_n3370 pv6_7_7_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3211 tin_pv2_0_0_ n_n3910 pv2_0_0_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4129 tin_pv10_3_3_ n_n3213 pv10_3_3_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3470 tin_pv1_2_2_ n_n3537 pv1_2_2_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3432 tin_pv11_3_3_ n_n3583 pv11_3_3_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3489 tin_pv4_3_3_ n_n4309 pv4_3_3_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3065 tin_pv10_2_2_ n_n3549 pv10_2_2_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3152 tin_pv11_2_2_ n_n3823 pv11_2_2_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3029 tin_pv6_0_0_ n_n3506 pv6_0_0_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3999 tin_pv2_1_1_ n_n3646 pv2_1_1_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3872 tin_pv10_1_1_ n_n3270 pv10_1_1_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3441 tin_pv1_3_3_ n_n4180 pv1_3_3_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4185 tin_pv11_1_1_ n_n4142 pv11_1_1_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4110 tin_pv4_4_4_ n_n3627 pv4_4_4_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4108 tin_pready_0_0_ n_n3354 pready_0_0_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4282 tin_pv10_0_0_ n_n4209 pv10_0_0_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3233 tin_pv11_0_0_ n_n3514 pv11_0_0_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3144 tin_pv6_1_1_ n_n3952 pv6_1_1_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4354 tin_pv2_2_2_ n_n3202 pv2_2_2_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3863 tin_pv1_4_4_ n_n3806 pv1_4_4_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3087 tin_pv4_5_5_ n_n3733 pv4_5_5_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3307 tin_pv6_2_2_ n_n3138 pv6_2_2_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3874 tin_pv2_3_3_ n_n3465 pv2_3_3_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3101 tin_pv1_5_5_ n_n3313 pv1_5_5_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3774 tin_pv4_6_6_ n_n3413 pv4_6_6_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3204 tin_pv6_3_3_ n_n3486 pv6_3_3_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3643 tin_pv2_4_4_ n_n3133 pv2_4_4_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4018 tin_pv1_6_6_ n_n3118 pv1_6_6_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4114 tin_pv4_7_7_ n_n4166 pv4_7_7_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3093 tin_pv6_4_4_ n_n4065 pv6_4_4_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4059 tin_pv2_5_5_ n_n3780 pv2_5_5_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3544 tin_pv1_7_7_ n_n4199 pv1_7_7_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3826 tin_pv4_0_0_ n_n3517 pv4_0_0_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3348 tin_pv6_5_5_ n_n4189 pv6_5_5_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3120 tin_pv2_6_6_ n_n3385 pv2_6_6_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3521 tin_pv10_7_7_ n_n3225 pv10_7_7_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3551 tin_pv1_0_0_ n_n4192 pv1_0_0_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3360 tin_pv11_7_7_ n_n3376 pv11_7_7_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4089 tin_pv4_1_1_ n_n3722 pv4_1_1_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3570 tin_pv10_6_6_ n_n3342 pv10_6_6_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3504 tin_pv11_6_6_ n_n4279 pv11_6_6_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3836 tin_pv6_6_6_ n_n3429 pv6_6_6_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4131 tin_pv2_7_7_ n_n3126 pv2_7_7_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3381 tin_pv10_5_5_ n_n4247 pv10_5_5_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3215 tin_pv1_1_1_ n_n3183 pv1_1_1_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3081 tin_pv11_5_5_ n_n3207 pv11_5_5_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n4347 tin_pv4_2_2_ n_n4372 pv4_2_2_
|
|
01- 1
|
|
1-1 1
|
|
.names n_n3475 n1385 n1373 n1378 n418
|
|
011- 1
|
|
110- 1
|
|
1--1 1
|
|
.names n_n4145 n_n4366 n_n3898 n1374 n1373
|
|
011- 1
|
|
01-1 1
|
|
0-11 1
|
|
100- 1
|
|
10-0 1
|
|
1-00 1
|
|
.names n_n3916 n_n4047 n1375 n1374
|
|
11- 1
|
|
1-0 1
|
|
-10 1
|
|
.names n_n3769 n_n4229 n1376 n1375
|
|
00- 1
|
|
0-0 1
|
|
-00 1
|
|
.names n_n3901 n_n4316 n1377 n1376
|
|
11- 1
|
|
1-0 1
|
|
-10 1
|
|
.names n_n3934 n_n3976 n_n4222 n_n4125 n1377
|
|
111- 0
|
|
11-1 0
|
|
--11 0
|
|
.names preset n1384 n1379 n_n4056 n1378
|
|
000- 1
|
|
00-1 1
|
|
.names n_n4045 n1383 n1380 n1379
|
|
110 1
|
|
.names n_n3658 n_n3604 n1381 n1382 n1380
|
|
0-11 1
|
|
10-- 1
|
|
.names n_n3533 n_n4201 n_n3968 n_n3922 n1381
|
|
0000 1
|
|
.names n_n3892 n_n4071 n_n4349 n_n4337 n1382
|
|
0000 1
|
|
.names nsr3_14 nsr3_17 n1383
|
|
10 1
|
|
.names n_n4057 n_n4056 n_n3557 n1384
|
|
110 1
|
|
.names n1384 preset n1385
|
|
10 1
|
|
.names n_n4366 n1385 n_n3898 n1374 n1378 n1078_1
|
|
0101- 1
|
|
0110- 1
|
|
1100- 1
|
|
1111- 1
|
|
1---1 1
|
|
.names n1388 n_n4334 n1414 n_n4012 n1412 n1143_1
|
|
10111 1
|
|
110-- 1
|
|
11-0- 1
|
|
11--0 1
|
|
.names preset n1409 n1389 n_n3831 n_n3709 n1388
|
|
1---- 0
|
|
-1110 0
|
|
.names n_n4093 n_n4067 n_n4360 n1397 n1390 n_n3833 n1389
|
|
1011-- 1
|
|
101-1- 1
|
|
10-11- 1
|
|
11---1 1
|
|
.names n_n4270 n_n3841 n1391 n1396 n_n4224 n_n4251 n1390
|
|
000100 1
|
|
0010-- 1
|
|
001-1- 1
|
|
001--1 1
|
|
0100-- 1
|
|
010-1- 1
|
|
010--1 1
|
|
011100 1
|
|
1000-- 1
|
|
100-1- 1
|
|
100--1 1
|
|
101100 1
|
|
110100 1
|
|
1110-- 1
|
|
111-1- 1
|
|
111--1 1
|
|
.names n_n4224 n_n4251 n1396 n_n4145 n_n3898 n1392 n1391
|
|
000-1- 1
|
|
000--0 1
|
|
0111-- 1
|
|
011-10 1
|
|
0-011- 1
|
|
0-01-0 1
|
|
101-1- 1
|
|
101--0 1
|
|
10-1-- 1
|
|
-001-- 1
|
|
-00-10 1
|
|
-1111- 1
|
|
-111-0 1
|
|
---110 1
|
|
.names n_n3916 n_n4229 n1395 n1394 n1393 n1392
|
|
000-- 1
|
|
00-0- 1
|
|
0-00- 1
|
|
0---0 1
|
|
-00-0 1
|
|
-0-00 1
|
|
--000 1
|
|
.names n_n4330 n_n4160 n_n4159 n_n4383 n_n4182 n1393
|
|
01--- 1
|
|
0-1-- 1
|
|
0--1- 1
|
|
0---1 1
|
|
10000 1
|
|
.names n_n4182 n_n4160 n_n4159 n_n4383 n1394
|
|
01-- 1
|
|
0-1- 1
|
|
0--1 1
|
|
1000 1
|
|
.names n_n4383 n_n4160 n_n4159 n_n3976 n_n4222 n_n4316 n1395
|
|
000--- 0
|
|
1110-- 0
|
|
11--0- 0
|
|
1-100- 0
|
|
1----0 0
|
|
-110-0 0
|
|
-1--00 0
|
|
---000 0
|
|
.names n_n4160 n_n4159 n_n4383 n_n4182 n_n4330 n1396
|
|
00000 1
|
|
.names n_n4299 n_n4362 n1402 n1399 n1398 n1397
|
|
110-- 1
|
|
11-1- 1
|
|
1-01- 1
|
|
1---0 1
|
|
-10-0 1
|
|
-1-10 1
|
|
--010 1
|
|
.names n_n4251 n_n4145 n_n4224 n_n3898 n1396 n1392 n1398
|
|
000110 1
|
|
00100- 1
|
|
0010-1 1
|
|
001-01 1
|
|
00-001 1
|
|
0101-1 1
|
|
010-00 1
|
|
010-11 1
|
|
011-10 1
|
|
01-010 1
|
|
01-100 1
|
|
01-111 1
|
|
1001-1 1
|
|
100-00 1
|
|
100-11 1
|
|
101-10 1
|
|
10-010 1
|
|
10-100 1
|
|
10-111 1
|
|
110110 1
|
|
11100- 1
|
|
1110-1 1
|
|
111-01 1
|
|
11-001 1
|
|
.names n_n3898 n1400 n1399
|
|
00 1
|
|
11 1
|
|
.names n1401 n_n3916 n_n4229 n1395 n1394 n1393 n1400
|
|
0111-- 1
|
|
011-1- 1
|
|
01-11- 1
|
|
01---1 1
|
|
0-11-1 1
|
|
0-1-11 1
|
|
0--111 1
|
|
1000-- 1
|
|
100-0- 1
|
|
10-00- 1
|
|
10---0 1
|
|
1-00-0 1
|
|
1-0-00 1
|
|
1--000 1
|
|
.names n_n4224 n_n4160 n_n4159 n_n4383 n_n4182 n_n4330 n1401
|
|
01---- 1
|
|
0-1--- 1
|
|
0--1-- 1
|
|
0---1- 1
|
|
0----1 1
|
|
100000 1
|
|
.names n_n3876 n_n4258 n1408 n1404 n1403 n1402
|
|
000-- 1
|
|
00-1- 1
|
|
0-01- 1
|
|
0---0 1
|
|
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
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11 1
|
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|
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11--- 1
|
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|
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101- 1
|
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11-1 1
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|
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11- 1
|
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1-1 1
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|
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1000-1 1
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|
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0-00- 1
|
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1---0 1
|
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|
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|
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|
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|
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100- 1
|
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11-1 1
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00-1 1
|
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101- 1
|
|
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|
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|
|
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|
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|
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|
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|
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1011 1
|
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1101 1
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|
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|
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10 1
|
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|
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010 1
|
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100 1
|
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11--- 1
|
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|
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|
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|
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100 1
|
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111 1
|
|
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0-00-1 1
|
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0-0-01 1
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0--001 1
|
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|
|
111-1- 1
|
|
11-11- 1
|
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11---0 1
|
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1-11-0 1
|
|
1-1-10 1
|
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111-- 1
|
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11-1- 1
|
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1-11- 1
|
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1---1 1
|
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|
|
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|
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|
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|
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11-1- 1
|
|
1-01- 1
|
|
1---1 1
|
|
-10-1 1
|
|
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|
|
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|
|
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|
|
01--- 1
|
|
0-111 1
|
|
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|
|
00- 1
|
|
0-0 1
|
|
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|
|
01- 1
|
|
0-1 1
|
|
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|
|
01- 1
|
|
0-1 1
|
|
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|
|
01- 1
|
|
0-1 1
|
|
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|
|
00-1 1
|
|
101- 1
|
|
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|
|
10 1
|
|
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|
|
11-- 1
|
|
--11 1
|
|
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|
|
01- 1
|
|
0-1 1
|
|
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|
|
01- 1
|
|
0-1 1
|
|
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|
|
11-- 1
|
|
--11 1
|
|
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|
|
01- 1
|
|
0-1 1
|
|
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|
|
11--- 1
|
|
--111 1
|
|
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|
|
00-0- 1
|
|
01--0 1
|
|
0-1-- 1
|
|
.names n1496 n_n3497 n1494 n_n3901 n1380 n443
|
|
11--- 1
|
|
--110 1
|
|
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|
|
11-- 1
|
|
--10 1
|
|
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|
|
00-1 1
|
|
100- 1
|
|
.names n1534 n1529 n1542 n1540 n1536 n1528
|
|
0011- 1
|
|
001-0 1
|
|
00-10 1
|
|
0100- 1
|
|
010-1 1
|
|
01-01 1
|
|
1000- 1
|
|
100-1 1
|
|
10-01 1
|
|
1111- 1
|
|
111-0 1
|
|
11-10 1
|
|
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|
|
0--- 0
|
|
-110 0
|
|
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|
|
10-- 0
|
|
--11 0
|
|
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|
|
10 1
|
|
.names nrq3_11 ngfdn_3 n1532
|
|
10 1
|
|
.names ngfdn_3 ndn3_15 n1533
|
|
10 1
|
|
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|
|
1---- 0
|
|
-11-- 0
|
|
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|
|
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|
|
111 1
|
|
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|
|
00--- 1
|
|
0-110 1
|
|
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|
|
10-- 0
|
|
--11 0
|
|
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|
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1---- 0
|
|
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|
|
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|
|
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|
|
1110 1
|
|
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|
|
0--- 0
|
|
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|
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|
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10-- 0
|
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|
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|
|
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|
|
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|
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|
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11-- 0
|
|
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|
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|
00-1 1
|
|
101- 1
|
|
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|
|
10 1
|
|
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|
|
01- 1
|
|
0-1 1
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01- 1
|
|
0-1 1
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01- 1
|
|
0-1 1
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|
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|
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1---11 1
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|
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|
|
000- 1
|
|
00-1 1
|
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|
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|
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1-0 1
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|
|
0-1 1
|
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|
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|
|
0-1 1
|
|
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|
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11-- 1
|
|
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|
|
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|
|
01- 1
|
|
0-1 1
|
|
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|
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000 1
|
|
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|
|
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|
|
0-1 1
|
|
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|
|
000 0
|
|
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|
|
11 1
|
|
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|
|
01- 1
|
|
0-1 1
|
|
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01- 1
|
|
0-1 1
|
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00-1 1
|
|
101- 1
|
|
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|
|
001 1
|
|
010 1
|
|
100 1
|
|
111 1
|
|
.names n1565 preset pv4_5_5_ n_n4224 n528
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