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OpenFPGA
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OpenFPGA/openfpga_flow/arch
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tangxifan 20cf4acda0 add readme for architecture file naming 2020-07-01 09:54:13 -06:00
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template hotfix on removing dangling inputs from GSB, which are CLB direct output 2020-03-08 13:54:49 -06:00
vpr_only_templates add readme for architecture file naming 2020-07-01 09:54:13 -06:00
winbond90 debugged rram mux branch Verilog generation 2019-09-02 16:21:29 -06:00