23 lines
760 B
Verilog
23 lines
760 B
Verilog
`timescale 1ns / 1ns // timescale time_unit/time_presicion
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`define cavlc_idle_bit 0
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`define cavlc_read_total_coeffs_bit 1
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`define cavlc_read_t1s_flags_bit 2
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`define cavlc_read_level_prefix_bit 3
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`define cavlc_read_level_suffix_bit 4
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`define cavlc_calc_level_bit 5
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`define cavlc_read_total_zeros_bit 6
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`define cavlc_read_run_befores_bit 7
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`define cavlc_idle_s 8'b00000001
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`define cavlc_read_total_coeffs_s 8'b00000010
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`define cavlc_read_t1s_flags_s 8'b00000100
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`define cavlc_read_level_prefix_s 8'b00001000
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`define cavlc_read_level_suffix_s 8'b00010000
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`define cavlc_calc_level_s 8'b00100000
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`define cavlc_read_total_zeros_s 8'b01000000
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`define cavlc_read_run_befores_s 8'b10000000
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