tangxifan aded675633 rename files in fpga bitstream library to be consistent with conventions		2020-06-21 13:06:39 -06:00
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src	rename files in fpga bitstream library to be consistent with conventions	2020-06-21 13:06:39 -06:00
test_blif	add missing files for micro benchmarks	2020-03-20 11:08:55 -06:00
test_openfpga_arch	now inout must be global port and I/O port so that it will appear in the top-level module	2020-04-08 16:54:08 -06:00
test_script	bug fix in pnr sdc grid writer for module paths in hierarchical view	2020-06-11 19:31:05 -06:00
test_vpr_arch	add arch file with spy pads	2020-04-22 12:56:09 -06:00
CMakeLists.txt	Move fpga_bitstream to the libopenfpga library and add XML reader	2020-06-20 18:25:17 -06:00