riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
OpenFPGA/openfpga_flow/openfpga_yosys_techlib
History
tangxifan cea43c2c45 [HDL] Add SPRAM module to generic yosys tech lib for openfpga usage 2021-03-16 18:04:31 -06:00
..
openfpga_adders_sim.v [HDL] Add SPRAM module to generic yosys tech lib for openfpga usage 2021-03-16 18:04:31 -06:00
openfpga_arith_map.v [Script] Rename yosys script supporting bram and restructure techlib files 2021-03-16 16:16:53 -06:00
openfpga_brams.txt [Script] Rename yosys script supporting bram and restructure techlib files 2021-03-16 16:16:53 -06:00
openfpga_brams_map.v [Script] Rename yosys script supporting bram and restructure techlib files 2021-03-16 16:16:53 -06:00
openfpga_brams_sim.v [HDL] Add SPRAM module to generic yosys tech lib for openfpga usage 2021-03-16 18:04:31 -06:00