tangxifan d61d88f12e [core] fixed some bugs in verilog writer due to renaming		2023-09-16 18:13:22 -07:00
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src	[core] fixed some bugs in verilog writer due to renaming	2023-09-16 18:13:22 -07:00
CMakeLists.txt	[lib] rename lib to namemanager as a unified library to provide naming support on FPGA modules	2023-09-15 13:51:14 -07:00