213 lines
11 KiB
Bash
Executable File
213 lines
11 KiB
Bash
Executable File
#!/bin/bash
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set -e
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source openfpga.sh
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PYTHON_EXEC=python3.8
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###############################################
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# OpenFPGA Shell with VPR8
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##############################################
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echo -e "Basic regression tests";
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echo -e "Testing configuration chain of a K4N4 FPGA";
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run-task basic_tests/full_testbench/configuration_chain $@
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run-task basic_tests/full_testbench/configuration_chain_no_time_stamp $@
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run-task basic_tests/full_testbench/configuration_chain_use_reset $@
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run-task basic_tests/full_testbench/configuration_chain_use_resetb $@
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run-task basic_tests/full_testbench/configuration_chain_use_set $@
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run-task basic_tests/full_testbench/configuration_chain_use_setb $@
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run-task basic_tests/full_testbench/configuration_chain_use_set_reset $@
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run-task basic_tests/full_testbench/configuration_chain_config_enable_scff $@
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run-task basic_tests/full_testbench/multi_region_configuration_chain $@
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run-task basic_tests/full_testbench/fast_configuration_chain $@
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run-task basic_tests/full_testbench/fast_configuration_chain_use_set $@
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run-task basic_tests/full_testbench/smart_fast_configuration_chain $@
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run-task basic_tests/full_testbench/smart_fast_multi_region_configuration_chain $@
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run-task basic_tests/preconfig_testbench/configuration_chain $@
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run-task basic_tests/preconfig_testbench/configuration_chain_config_done_io $@
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run-task basic_tests/preconfig_testbench/configuration_chain_no_time_stamp $@
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echo -e "Testing fram-based configuration protocol of a K4N4 FPGA";
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run-task basic_tests/full_testbench/configuration_frame $@
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run-task basic_tests/full_testbench/smart_fast_configuration_frame $@
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run-task basic_tests/full_testbench/fast_configuration_frame $@
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run-task basic_tests/full_testbench/fast_configuration_frame_use_set $@
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run-task basic_tests/full_testbench/configuration_frame_ccff $@
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run-task basic_tests/full_testbench/configuration_frame_scff $@
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run-task basic_tests/full_testbench/configuration_frame_use_reset $@
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run-task basic_tests/full_testbench/configuration_frame_use_resetb $@
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run-task basic_tests/full_testbench/configuration_frame_use_set $@
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run-task basic_tests/full_testbench/configuration_frame_use_setb $@
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run-task basic_tests/full_testbench/configuration_frame_use_set_reset $@
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run-task basic_tests/full_testbench/multi_region_configuration_frame $@
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run-task basic_tests/full_testbench/smart_fast_multi_region_configuration_frame $@
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run-task basic_tests/preconfig_testbench/configuration_frame $@
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echo -e "Testing memory bank configuration protocol of a K4N4 FPGA";
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run-task basic_tests/full_testbench/memory_bank $@
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run-task basic_tests/full_testbench/memory_bank_use_reset $@
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run-task basic_tests/full_testbench/memory_bank_use_resetb $@
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run-task basic_tests/full_testbench/memory_bank_use_set $@
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run-task basic_tests/full_testbench/memory_bank_use_setb $@
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run-task basic_tests/full_testbench/memory_bank_use_set_reset $@
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run-task basic_tests/full_testbench/multi_region_memory_bank $@
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run-task basic_tests/full_testbench/fast_memory_bank $@
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run-task basic_tests/full_testbench/fast_memory_bank_use_set $@
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run-task basic_tests/full_testbench/smart_fast_memory_bank $@
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run-task basic_tests/full_testbench/smart_fast_multi_region_memory_bank $@
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run-task basic_tests/preconfig_testbench/memory_bank $@
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echo -e "Testing physical design friendly memory bank configuration protocol of a K4N4 FPGA";
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run-task basic_tests/full_testbench/ql_memory_bank $@
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run-task basic_tests/full_testbench/ql_memory_bank_use_wlr $@
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run-task basic_tests/full_testbench/multi_region_ql_memory_bank $@
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run-task basic_tests/full_testbench/ql_memory_bank_flatten $@
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run-task basic_tests/full_testbench/ql_memory_bank_flatten_use_wlr $@
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run-task basic_tests/full_testbench/ql_memory_bank_shift_register $@
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run-task basic_tests/full_testbench/ql_memory_bank_shift_register_use_wlr $@
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run-task basic_tests/full_testbench/ql_memory_bank_shift_register_multi_chain $@
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echo -e "Testing testbenches without self checking features";
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run-task basic_tests/full_testbench/full_testbench_without_self_checking $@
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run-task basic_tests/preconfig_testbench/preconfigured_testbench_without_self_checking $@
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echo -e "Testing standalone (flatten memory) configuration protocol of a K4N4 FPGA";
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run-task basic_tests/full_testbench/flatten_memory $@
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run-task basic_tests/preconfig_testbench/flatten_memory $@
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echo -e "Testing fixed device layout and routing channel width";
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run-task basic_tests/fixed_device_support $@
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echo -e "Testing fabric Verilog generation only";
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run-task basic_tests/generate_fabric $@
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echo -e "Testing Verilog testbench generation only";
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run-task basic_tests/generate_testbench $@
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echo -e "Testing separated Verilog fabric netlists and testbench locations";
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run-task basic_tests/custom_fabric_netlist_location $@
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echo -e "Testing user-defined simulation settings: clock frequency and number of cycles";
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run-task basic_tests/fixed_simulation_settings/fixed_operating_clock_freq $@
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run-task basic_tests/fixed_simulation_settings/fixed_operating_clock_freq_no_ace $@
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# TODO: This feature is temporarily out of test due to the emergency in delivering netlists for multi-chain shift-register memory bank
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#run-task basic_tests/fixed_simulation_settings/fixed_shift_register_clock_freq $@
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echo -e "Testing Secured FPGA fabrics";
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run-task basic_tests/fabric_key/generate_vanilla_key $@
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run-task basic_tests/fabric_key/generate_multi_region_vanilla_key $@
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run-task basic_tests/fabric_key/generate_random_key $@
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run-task basic_tests/fabric_key/generate_random_key_ql_memory_bank $@
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run-task basic_tests/fabric_key/load_external_key $@
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run-task basic_tests/fabric_key/load_external_key_cc_fpga $@
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run-task basic_tests/fabric_key/load_external_key_multi_region_cc_fpga $@
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run-task basic_tests/fabric_key/load_external_key_qlbank_fpga $@
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run-task basic_tests/fabric_key/load_external_key_multi_region_qlbank_fpga $@
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run-task basic_tests/fabric_key/load_external_key_qlbanksr_multi_chain_fpga $@
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# TODO: This feature is temporarily out of test due to the emergency in delivering netlists for multi-chain shift-register memory bank
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#run-task basic_tests/fabric_key/load_external_key_multi_region_qlbanksr_fpga $@
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echo -e "Testing K4 series FPGA";
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echo -e "Testing K4N4 with facturable LUTs";
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run-task basic_tests/k4_series/k4n4_frac_lut $@
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echo -e "Testing K4N4 with asynchronous reset";
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run-task basic_tests/k4_series/k4n4_fracff $@
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echo -e "Testing K4N4 with negative edge clocks";
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run-task basic_tests/k4_series/k4n4_fracff2edge $@
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echo -e "Testing K4N4 with hard adders";
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run-task basic_tests/k4_series/k4n4_adder $@
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echo -e "Testing K4N4 without local routing architecture";
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run-task basic_tests/k4_series/k4n4_no_local_routing $@
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echo -e "Testing K4N4 with block RAM";
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run-task basic_tests/k4_series/k4n4_bram $@
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echo -e "Testing K4N4 with LUTRAM";
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run-task basic_tests/k4_series/k4n4_lutram $@
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echo -e "Testing K4N4 with multiple lengths of routing segments";
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run-task basic_tests/k4_series/k4n4_L124 $@
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echo -e "Testing K4N4 with 32-bit fracturable multiplier";
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run-task basic_tests/k4_series/k4n4_frac_mult $@
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echo -e "Testing K4N5 with pattern based local routing";
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run-task basic_tests/k4_series/k4n5_pattern_local_routing $@
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echo -e "Testing different tile organizations";
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echo -e "Testing tiles with pins only on top and left sides";
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run-task basic_tests/tile_organization/top_left_custom_pins $@
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echo -e "Testing tiles with pins only on top and right sides";
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run-task basic_tests/tile_organization/top_right_custom_pins $@
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echo -e "Testing tiles with pins only on bottom and right sides";
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run-task basic_tests/tile_organization/bottom_right_custom_pins $@
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echo -e "Testing tiles with I/O in center grid";
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run-task basic_tests/tile_organization/tileable_io $@
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echo -e "Testing global port definition from tiles";
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run-task basic_tests/global_tile_ports/global_tile_clock $@
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run-task basic_tests/global_tile_ports/global_tile_reset $@
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run-task basic_tests/global_tile_ports/global_tile_4clock $@
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run-task basic_tests/global_tile_ports/global_tile_4clock_pin $@
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echo -e "Testing configuration chain of a K4N4 FPGA using .blif generated by yosys+verific";
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run-task basic_tests/verific_test $@
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echo -e "Testing explicit multi verilog files";
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run-task basic_tests/explicit_multi_verilog_files $@
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echo -e "Test the remove of runtime directories"
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clear-task-run basic_tests/explicit_multi_verilog_files $@
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echo -e "Testing write GSB to files";
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run-task basic_tests/write_gsb/write_gsb_to_xml $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_exclude_rr_info $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_exclude_cbx $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_exclude_cby $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_exclude_cbx_cby $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_exclude_sb $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_exclude_sb_cbx $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_exclude_sb_cby $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_include_sb_cbx_cby $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_include_single_cbx $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_include_single_cby $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_include_single_sb $@
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run-task basic_tests/write_gsb/write_gsb_to_xml_compress_routing $@
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run-task basic_tests/write_gsb/write_unique_gsb_to_xml $@
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run-task basic_tests/write_gsb/write_unique_gsb_to_xml_compress_routing $@
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echo -e "Testing bus group features";
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run-task basic_tests/bus_group/preconfig_testbench_explicit_mapping $@
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run-task basic_tests/bus_group/preconfig_testbench_implicit_mapping $@
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run-task basic_tests/bus_group/full_testbench_explicit_mapping $@
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run-task basic_tests/bus_group/full_testbench_implicit_mapping $@
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echo -e "Testing fix pins features";
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run-task basic_tests/fix_pins $@
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run-task basic_tests/constrain_pin_location $@
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echo -e "Testing project templates";
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run-task template_tasks/vpr_blif_template $@
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run-task template_tasks/yosys_vpr_template $@
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run-task template_tasks/vtr_benchmarks_template $@
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echo -e "Testing create tsk from template and run task"
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create-task _task_copy basic_tests/generate_fabric
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run-task _task_copy
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echo -e "Testing output files without time stamp";
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run-task basic_tests/no_time_stamp $@
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# Run git-diff to ensure no changes on the golden netlists
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# Switch to root path in case users are running the tests in another location
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cd ${OPENFPGA_PATH}
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pwd
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git config --global --add safe.directory ${OPENFPGA_PATH}
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git log
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git diff --name-status -- ':${OPENFPGA_PATH}/openfpga_flow/tasks/basic_tests/no_time_stamp/golden_outputs_no_time_stamp/**'
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if git diff --name-status --exit-code -- ':${OPENFPGA_PATH}/openfpga_flow/tasks/basic_tests/no_time_stamp/golden_outputs_no_time_stamp/**'; then
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echo -e "Golden netlist remain unchanged"
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else
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echo -e "Detect changes in golden netlists"; exit 1;
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fi
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cd -
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# Repgression test to test multi-user enviroment
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# Note: Keep this task as the last one!!!
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cp -r */*/basic_tests/full_testbench/configuration_chain /tmp/
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cd /tmp/ && run-task configuration_chain $@
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cd -
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