28 lines
1.0 KiB
Bash
Executable File
28 lines
1.0 KiB
Bash
Executable File
#! /bin/bash
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# Exit if error occurs
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set -e
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# Make sure a clear start
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pwd_path="$PWD"
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task_name="k6_N10_regression_TT"
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config_file="$PWD/configs/regression/${task_name}.conf"
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bench_txt="$PWD/benchmarks/List/mcnc_benchmark.txt"
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rpt_file="$PWD/csv_rpts/fpga_spice/${task_name}.csv"
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task_file="$PWD/vpr_fpga_spice_task_lists/${task_name}"
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verilog_path="${PWD}/regression_MCNC"
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# FPGA-SPICE
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rm -rf ${pwd_path}/results
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cd ${pwd_path}/scripts
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# SRAM FPGA
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# TT case
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perl fpga_flow.pl -conf ${config_file} -benchmark ${bench_txt} -rpt ${rpt_file} -N 10 -K 6 -ace_d 0.5 -power -remove_designs -multi_thread 1 -vpr_fpga_x2p_rename_illegal_port -vpr_fpga_verilog -vpr_fpga_verilog_dir $verilog_path -vpr_fpga_bitstream_generator -vpr_fpga_verilog_print_autocheck_top_testbench -vpr_fpga_verilog_include_timing -vpr_fpga_verilog_include_signal_init -vpr_fpga_verilog_formal_verification_top_netlist -fix_route_chan_width-vpr_fpga_verilog_include_icarus_simulator
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rm -rf ${pwd_path}/results
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rm -rf $verilog_path
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cd ${pwd_path}
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echo "Netlists successfully generated"
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exit 0
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